I found one header file for x86 that implement the TLB flushing -
include/asm-x86/tlbflush.h (the different implementation are used are
used because of the diff generation of x86:
static inline void __native_flush_tlb(void)
{
write_cr3(read_cr3());
}
(my questions: WHAT IS THE DIFF
On Feb 6, 2008 7:54 PM, Peter Teoh [EMAIL PROTECTED] wrote:
I found one header file for x86 that implement the TLB flushing -
include/asm-x86/tlbflush.h (the different implementation are used are
used because of the diff generation of x86:
static inline void __native_flush_tlb(void)
{
Hi...
On 2/5/08, sahlot arvind [EMAIL PROTECTED] wrote:
TLB entries are filled by H/W and not explicitly by kernel. Whenever MMU
translates VA to PA it caches that translation into TLB. If TLB is full then
MMU uses its own algorithms to replace some entry in TLB e.g. MMU might
consider TLB
AFAIK, by using certain instructions...you can manually insert
entry/entries to TLB. Same thing to deleting TLB entries.
Yes you can insert/delete entries in TLB manually. Though I am not sure but
AFAIK, linux kernel does do this.
Please correct if I am wrong.
Regards
On 2/5/08, Mulyadi
hadling tlb is architecture specific thing, so its better to search
the manuals of corresponding processor to find out appropriate
instructions to manipulate TLB entries.
AFAI can recall INVLPG is used to invalidate specific pte in TLB.
regards,
mahaveer darade
On 2/5/08, sahlot arvind [EMAIL
Hi,
I'm trying to understand the MMU operations am wondering where is
the kernel code where the kernel interfaces with the this piece of
hardware?
Can some one help me in understanding that what all are the
responsibilities of the kernel, and what is it the hardware takes care
of automatically?
E.g. who fills, flushes refills the TLB entries?
TLB entries are filled by H/W and not explicitly by kernel. Whenever MMU
translates VA to PA it caches that translation into TLB. If TLB is full then
MMU uses its own algorithms to replace some entry in TLB e.g. MMU might
consider TLB as circular
