On 2011-05-31 03:25, BrillyWu wrote:
Hi, Jan
patch which has
been checked. It can be compiled without any error and work
normally.
The patch v3 is here now.
The above text can't be used as a commit log, so this needs to be
fixed.
Moreover, your patch still contains at least on
On Tue, May 31, 2011 at 2:53 AM, Asias He asias.he...@gmail.com wrote:
TAP based network performance with ioeventfd
Heh, so how did it look _before_ ioeventfd? Did performance improve
and how much?
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* Borislav Petkov b...@alien8.de wrote:
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -121,7 +121,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker
*walker,
gva_t addr, u32 access)
{
pt_element_t pte;
- pt_element_t __user *ptep_user;
+
Hi, Jan
I am sure I have checked it with the scripts/checkpatch.pl, and it
shows no error or warning. Maybe I should check whether my windows
editor and mail client can work well before sending it to
you. I 'm
sorry.
Sorry, you are right. Your patch revealed a bug in the checkpatch
On 2011-05-31 09:39, BrillyWu wrote:
Hi, Jan
I am sure I have checked it with the scripts/checkpatch.pl, and it
shows no error or warning. Maybe I should check whether my windows
editor and mail client can work well before sending it to
you. I 'm
sorry.
Sorry, you are right. Your patch
On Tue, 31 May 2011 09:38:24 +0200
Ingo Molnar mi...@elte.hu wrote:
* Borislav Petkov b...@alien8.de wrote:
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -121,7 +121,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker
*walker,
gva_t addr, u32 access)
On 05/31/2011 10:38 AM, Ingo Molnar wrote:
* Borislav Petkovb...@alien8.de wrote:
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -121,7 +121,7 @@ static int FNAME(walk_addr_generic)(struct guest_walker
*walker,
gva_t addr, u32 access)
{
pt_element_t pte;
-
Blue, this does not trigger the missing braces warning:
Do you mean the bug is that it can not trigger missing
braces warining?
The script fails to detect missing braces as marked below.
It seems that there is no missing braces in my patch, but some
unnecessary braces.
There are no
The following series of patches enable KVM to exploit the hardware
hypervisor mode on 64-bit Power ISA Book3S machines. At present only
POWER7 is supported, but it would be easy to add other processors.
Running the KVM host in hypervisor mode means that the guest can use
both supervisor mode and
This moves the slb field, which represents the state of the emulated
SLB, from the kvmppc_vcpu_book3s struct to the kvm_vcpu_arch, and the
hpte_hash_[v]pte[_long] fields from kvm_vcpu_arch to kvmppc_vcpu_book3s.
This is in accord with the principle that the kvm_vcpu_arch struct
represents the
On Mon, May 30, 2011 at 06:19:14PM +0300, Avi Kivity wrote:
On 05/30/2011 06:15 PM, Jan Kiszka wrote:
On 2011-05-30 17:10, Roedel, Joerg wrote:
On Mon, May 30, 2011 at 11:04:02AM -0400, Jan Kiszka wrote:
On 2011-05-30 16:38, Nadav Har'El wrote:
On Mon, May 30, 2011, Jan Kiszka wrote
On 05/31/2011 11:44 AM, Daniel P. Berrange wrote:
I think it's safe to drop -enable-nesting immediately. Dan, does
libvirt make use of it?
Yes, but it should be safe to drop it. Currently, if the user specifies
a CPU with the 'svm' flag present in libvirt guest XML, then we will
pass args
On Tue, May 31, 2011 at 11:20:55AM +0300, Avi Kivity wrote:
On 05/31/2011 10:38 AM, Ingo Molnar wrote:
* Borislav Petkovb...@alien8.de wrote:
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -121,7 +121,7 @@ static int FNAME(walk_addr_generic)(struct
guest_walker *walker,
On Tue, May 31, 2011 at 04:58:16AM -0400, Avi Kivity wrote:
On 05/31/2011 11:44 AM, Daniel P. Berrange wrote:
I think it's safe to drop -enable-nesting immediately. Dan, does
libvirt make use of it?
Yes, but it should be safe to drop it. Currently, if the user specifies
a CPU with
On 05/31/2011 10:58 AM, Avi Kivity wrote:
But qemu will complain about an option it can't parse.
The presence of -enable-nesting is inferred from the help text.
Paolo
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More
On 05/31/2011 12:15 PM, Paolo Bonzini wrote:
On 05/31/2011 10:58 AM, Avi Kivity wrote:
But qemu will complain about an option it can't parse.
The presence of -enable-nesting is inferred from the help text.
Okay, so it can be safely dropped.
--
error compiling committee.c: too many
On 31/05/11 13:47, Borislav Petkov wrote:
Looks like a KSM issue. Disabling CONFIG_KSM should at least stop your
machine from oopsing.
Adding linux-mm.
I initially thought that, so the second panic was produced with KSM
disabled from boot.
echo 0 /sys/kernel/mm/ksm/run
If you still
Am 30.05.2011 20:02, schrieb Marcelo Tosatti:
On Mon, May 30, 2011 at 02:16:41PM +0200, Markus Schade wrote:
On Thu, 26 May 2011, Joerg Roedel wrote:
On Thu, May 26, 2011 at 05:20:32PM +0200, Markus Schade wrote:
I have re-added the missing 4 lines to ept_update_paging_mode_cr0 in
vmx.c,
There are several fields in struct kvmppc_book3s_shadow_vcpu that
temporarily store bits of host state while a guest is running,
rather than anything relating to the particular guest or vcpu.
This splits them out into a new kvmppc_host_state structure and
modifies the definitions in asm-offsets.c
Instead of doing the kvm_guest_enter/exit() and local_irq_dis/enable()
calls in powerpc.c, this moves them down into the subarch-specific
book3s_pr.c and booke.c. This eliminates an extra local_irq_enable()
call in book3s_pr.c, and will be needed for when we do SMT4 guest
support in the book3s
From: David Gibson d...@au1.ibm.com
This improves I/O performance for guests using the PAPR
paravirtualization interface by making the H_PUT_TCE hcall faster, by
implementing it in real mode. H_PUT_TCE is used for updating virtual
IOMMU tables, and is used both for virtual I/O and for real I/O
Instead of branching out-of-line with the DO_KVM macro to check if we
are in a KVM guest at the time of an interrupt, this moves the KVM
check inline in the first-level interrupt handlers. This speeds up
the non-KVM case and makes sure that none of the interrupt handlers
are missing the check.
In hypervisor mode, the LPCR controls several aspects of guest
partitions, including virtual partition memory mode, and also controls
whether the hypervisor decrementer interrupts are enabled. This sets
up LPCR at boot time so that guest partitions will use a virtual real
memory area (VRMA)
Doing so means that we don't have to save the flags anywhere and gets
rid of the last reference to to_book3s(vcpu) in arch/powerpc/kvm/book3s.c.
Doing so is OK because a program interrupt won't be generated at the
same time as any other synchronous interrupt. If a program interrupt
and an
This arranges for the top-level arch/powerpc/kvm/powerpc.c file to
pass down some of the calls it gets to the lower-level subarchitecture
specific code. The lower-level implementations (in booke.c and book3s.c)
are no-ops. The coming book3s_hv.c will need this.
Signed-off-by: Paul Mackerras
This adds the infrastructure for handling PAPR hcalls in the kernel,
either early in the guest exit path while we are still in real mode,
or later once the MMU has been turned back on and we are in the full
kernel context. The advantage of handling hcalls in real mode if
possible is that we avoid
This lifts the restriction that book3s_hv guests can only run one
hardware thread per core, and allows them to use up to 4 threads
per core on POWER7. The host still has to run single-threaded.
This capability is advertised to qemu through a new KVM_CAP_PPC_SMT
capability. The return value of
* Avi Kivity a...@redhat.com wrote:
On 05/31/2011 10:38 AM, Ingo Molnar wrote:
* Borislav Petkovb...@alien8.de wrote:
+++ b/arch/x86/kvm/paging_tmpl.h
@@ -121,7 +121,7 @@ static int FNAME(walk_addr_generic)(struct
guest_walker *walker,
gva_t addr, u32
From brill...@viatech.com.cn
When KVM is running on VIA CPU with host cpu's model, the
feautures of VIA CPU will be passed into kvm guest by calling
the CPUID instruction for Centaur.
Signed-off-by: BrillyWubrill...@viatech.com.cn
Signed-off-by: KaryJinkary...@viatech.com.cn
---
On Tue, May 31, 2011 at 05:26:10PM +0800, Brad Campbell wrote:
On 31/05/11 13:47, Borislav Petkov wrote:
Looks like a KSM issue. Disabling CONFIG_KSM should at least stop your
machine from oopsing.
Adding linux-mm.
I initially thought that, so the second panic was produced with KSM
On 31.05.2011, at 08:40, Paul Mackerras wrote:
The following series of patches enable KVM to exploit the hardware
hypervisor mode on 64-bit Power ISA Book3S machines. At present only
POWER7 is supported, but it would be easy to add other processors.
Running the KVM host in hypervisor mode
On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote:
Thinking about the testability of this a bit more ... how much
effort would it be to get this code running on a 970MP with SLOF?
There should only be a few POWER7 specific pieces, right?
Do you have a 970MP that has a usable
On 31.05.2011, at 14:35, Paul Mackerras wrote:
On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote:
Thinking about the testability of this a bit more ... how much
effort would it be to get this code running on a 970MP with SLOF?
There should only be a few POWER7 specific pieces,
On Mon, 2011-05-30 at 14:57 -0400, Mathieu Desnoyers wrote:
* Sasha Levin (levinsasha...@gmail.com) wrote:
On Mon, 2011-05-30 at 13:38 -0400, Mathieu Desnoyers wrote:
* Sasha Levin (levinsasha...@gmail.com) wrote:
On Sun, 2011-05-29 at 22:54 -0400, Mathieu Desnoyers wrote:
Please
* Sasha Levin levinsasha...@gmail.com wrote:
I've started working on converting our MMIO code to use RCU rbtree.
Well, why would we want to switch the MMIO code away from the brlock
right now? mmio tree reconfigurations are very, very rare.
Won't something like the qcow cache be more
Juan Quintela quint...@redhat.com wrote:
Please send in any agenda items you are interested in covering.
Thanks, Juan.
As there is no agenda, call got cancelled.
See you next week, Juan.
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On Tue, 2011-05-31 at 15:09 +0200, Ingo Molnar wrote:
* Sasha Levin levinsasha...@gmail.com wrote:
I've started working on converting our MMIO code to use RCU rbtree.
Well, why would we want to switch the MMIO code away from the brlock
right now? mmio tree reconfigurations are very, very
On Fri, May 27, 2011 at 02:19:04PM +0200, Jan Kiszka wrote:
With this series applied, we are finally at a level of almost zero
redundancy between QEMU upstream and the qemu-kvm tree. The last major
duplication to be removed is the original io-thread implementation and
everything related to it:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have prepared to work on a feature called Disk I/O limits for
qemu-kvm projeect.
This feature will enable the user to cap disk I/O amount performed by a
VM.It is important for some storage resources to be
On 05/31/2011 08:45 AM, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have prepared to work on a feature called Disk I/O limits for qemu-kvm
projeect.
This feature will enable the user to cap disk I/O amount performed by a
VM.It is
On Tue, May 31, 2011 at 09:45:37AM -0400, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have prepared to work on a feature called Disk I/O limits for
qemu-kvm projeect.
This feature will enable the user to cap disk I/O amount
On Tue, May 31, 2011 at 08:50:40AM -0500, Anthony Liguori wrote:
On 05/31/2011 08:45 AM, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have prepared to work on a feature called Disk I/O limits for
qemu-kvm projeect.
This feature
On Tue, May 31, 2011 at 02:56:46PM +0100, Daniel P. Berrange wrote:
On Tue, May 31, 2011 at 09:45:37AM -0400, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have prepared to work on a feature called Disk I/O limits for
qemu-kvm
On Tue, May 31, 2011 at 10:10:37AM -0400, Vivek Goyal wrote:
On Tue, May 31, 2011 at 02:56:46PM +0100, Daniel P. Berrange wrote:
On Tue, May 31, 2011 at 09:45:37AM -0400, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have
On 31/05/11 18:38, Borislav Petkov wrote:
On Tue, May 31, 2011 at 05:26:10PM +0800, Brad Campbell wrote:
On 31/05/11 13:47, Borislav Petkov wrote:
Looks like a KSM issue. Disabling CONFIG_KSM should at least stop your
machine from oopsing.
Adding linux-mm.
I initially thought that, so the
On 05/31/2011 09:04 AM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 08:50:40AM -0500, Anthony Liguori wrote:
On 05/31/2011 08:45 AM, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
I have prepared to work on a feature called Disk I/O limits for
On Tue, May 31, 2011 at 03:19:56PM +0100, Daniel P. Berrange wrote:
On Tue, May 31, 2011 at 10:10:37AM -0400, Vivek Goyal wrote:
On Tue, May 31, 2011 at 02:56:46PM +0100, Daniel P. Berrange wrote:
On Tue, May 31, 2011 at 09:45:37AM -0400, Vivek Goyal wrote:
On Mon, May 30, 2011 at
* Sasha Levin levinsasha...@gmail.com wrote:
On Tue, 2011-05-31 at 15:09 +0200, Ingo Molnar wrote:
* Sasha Levin levinsasha...@gmail.com wrote:
I've started working on converting our MMIO code to use RCU rbtree.
Well, why would we want to switch the MMIO code away from the brlock
* Daniel P. Berrange berra...@redhat.com [2011-05-31 09:25]:
On Tue, May 31, 2011 at 10:10:37AM -0400, Vivek Goyal wrote:
On Tue, May 31, 2011 at 02:56:46PM +0100, Daniel P. Berrange wrote:
On Tue, May 31, 2011 at 09:45:37AM -0400, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM
On Sat, May 28, 2011 at 02:12:30PM +0300, Sasha Levin wrote:
Document KVM_IOEVENTFD that can be used to receive
notifications of PIO/MMIO events without triggering
an exit.
Cc: Avi Kivity a...@redhat.com
Cc: Marcelo Tosatti mtosa...@redhat.com
Signed-off-by: Sasha Levin
On Tue, 2011-05-31 at 10:18 +0300, Pekka Enberg wrote:
On Tue, May 31, 2011 at 2:53 AM, Asias He asias.he...@gmail.com wrote:
TAP based network performance with ioeventfd
Heh, so how did it look _before_ ioeventfd? Did performance improve
and how much?
Asias, did you use TCP or UDP values
On Sun, May 29, 2011 at 07:41:57PM +0800, Yang, Wei Y wrote:
This patch adds SMEP handling when setting CR4.
Signed-off-by: Yang, Wei wei.y.y...@intel.com
Signed-off-by: Shan, Haitao haitao.s...@intel.com
Signed-off-by: Li, Xin xin...@intel.com
---
arch/x86/kvm/x86.c | 15
On Tue, May 31, 2011 at 09:25:31AM -0500, Anthony Liguori wrote:
On 05/31/2011 09:04 AM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 08:50:40AM -0500, Anthony Liguori wrote:
On 05/31/2011 08:45 AM, Vivek Goyal wrote:
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
Hello, all,
On Wed, May 25, 2011 at 11:01:22PM +0300, Nadav Har'El wrote:
Hi,
This is the eleventh iteration of the nested VMX patch set, and hopefully the
last in this format.
Improvements in this version over the previous one include:
* Overhauled vmcs, cpu, and launched handling (new
On 05/31/2011 08:52 PM, Marcelo Tosatti wrote:
On Sun, May 29, 2011 at 07:41:57PM +0800, Yang, Wei Y wrote:
This patch adds SMEP handling when setting CR4.
Signed-off-by: Yang, Weiwei.y.y...@intel.com
Signed-off-by: Shan, Haitaohaitao.s...@intel.com
Signed-off-by: Li,
On Sun, May 29, 2011 at 09:52:00PM +0900, Takuya Yoshikawa wrote:
The patch set does not change anything functionally.
Once the code becomes a bit tidier, I will try more performance related
changes.
Takuya
Applied, thanks.
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On 05/31/2011 12:59 PM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 09:25:31AM -0500, Anthony Liguori wrote:
On 05/31/2011 09:04 AM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 08:50:40AM -0500, Anthony Liguori wrote:
On 05/31/2011 08:45 AM, Vivek Goyal wrote:
On Mon, May 30, 2011 at
On Tue, May 31, 2011 at 09:05:35PM +0300, Avi Kivity wrote:
if (is_long_mode(vcpu)) {
if (!(cr4 X86_CR4_PAE))
return 1;
A new field in vcpu-arch.mmu.base_role for smep is required
for shadow MMU (similar to nxe).
I plan to add that with my cr0.wp=0
On 05/31/2011 09:48 PM, Marcelo Tosatti wrote:
On Tue, May 31, 2011 at 09:05:35PM +0300, Avi Kivity wrote:
if (is_long_mode(vcpu)) {
if (!(cr4 X86_CR4_PAE))
return 1;
A new field in vcpu-arch.mmu.base_role for smep is required
On Tue, May 31, 2011 at 4:25 PM, Ingo Molnar mi...@elte.hu wrote:
* Sasha Levin levinsasha...@gmail.com wrote:
On Tue, 2011-05-31 at 15:09 +0200, Ingo Molnar wrote:
* Sasha Levin levinsasha...@gmail.com wrote:
I've started working on converting our MMIO code to use RCU rbtree.
Well,
On Tue, May 31, 2011 at 01:39:47PM -0500, Anthony Liguori wrote:
On 05/31/2011 12:59 PM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 09:25:31AM -0500, Anthony Liguori wrote:
On 05/31/2011 09:04 AM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 08:50:40AM -0500, Anthony Liguori wrote:
On
* Prasad Joshi prasadjoshi...@gmail.com wrote:
May be the DD of 1G file was a wrong test to calculate the
performance. Sasha had asked me to run boniee++ for performance
numbers. [...]
It's difficult to test IO performance. One way to 'stabilize' such
measurements would be to create a
On Mon, May 30, 2011 at 01:09:23PM +0800, Zhi Yong Wu wrote:
[..]
3.) How the users enable and play with it
QEMU -drive option will be extended so that disk I/O limits can be
specified on its command line, such as -drive [iops=xxx,][throughput=xxx] or
-drive
On May 31, 2011, at 8:50 AM, Alexander Graf wrote:
On 31.05.2011, at 14:35, Paul Mackerras wrote:
On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote:
Thinking about the testability of this a bit more ... how much
effort would it be to get this code running on a 970MP with
On May 27, 2011, at 9:07 PM, Segher Boessenkool wrote:
If HDEC expires when interrupts are off, the HDEC interrupt stays
pending until interrupts get re-enabled. I'm not sure exactly what
the conditions are that cause an HDEC interrupt to get lost, but they
seem to involve at least a
On Tue, May 31 2011 at 2:39pm -0400,
Anthony Liguori anth...@codemonkey.ws wrote:
On 05/31/2011 12:59 PM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 09:25:31AM -0500, Anthony Liguori wrote:
On 05/31/2011 09:04 AM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 08:50:40AM -0500, Anthony Liguori
On 05/31/2011 03:48 PM, Mike Snitzer wrote:
On Tue, May 31 2011 at 2:39pm -0400,
Anthony Liguorianth...@codemonkey.ws wrote:
Are you referring to merging taking place which can change the definition
of IOPS as seen by guest?
No, with qcow2, it may take multiple real IOPs for what the guest
On Tue, 31 May 2011, Brad Campbell wrote:
On 31/05/11 18:38, Borislav Petkov wrote:
On Tue, May 31, 2011 at 05:26:10PM +0800, Brad Campbell wrote:
On 31/05/11 13:47, Borislav Petkov wrote:
Looks like a KSM issue. Disabling CONFIG_KSM should at least stop your
machine from oopsing.
Sure, but that shouldn't happen with HDEC during the odd 50
instructions that it takes to enter the guest :)
It's more like 500 insns, including some ptesync, so lots of cycles
too.
I don't think its actually that bad.
There's a loop of 128 iterations of 3 insns.
I'm not saying it is
On 05/31/2011 02:24 PM, Vivek Goyal wrote:
On Tue, May 31, 2011 at 01:39:47PM -0500, Anthony Liguori wrote:
On 05/31/2011 12:59 PM, Vivek Goyal wrote:
Ok, so we seem to be talking of two requirements.
- A consistent experience to guest
- Isolation between VMs.
If this qcow2 mapping/metada
On 01/06/11 06:31, Hugh Dickins wrote:
Brad, my suspicion is that in each case the top 16 bits of RDX have been
mysteriously corrupted from to , causing the general protection
faults. I don't understand what that has to do with KSM.
No, nor do I. The panic I reproduced with KSM off
On 01/06/11 06:31, Hugh Dickins wrote:
Brad, my suspicion is that in each case the top 16 bits of RDX have been
mysteriously corrupted from to , causing the general protection
faults. I don't understand what that has to do with KSM.
But it's only a suspicion, because I can't make
Hello,
On Wed, Jun 01, 2011 at 08:37:25AM +0800, Brad Campbell wrote:
On 01/06/11 06:31, Hugh Dickins wrote:
Brad, my suspicion is that in each case the top 16 bits of RDX have been
mysteriously corrupted from to , causing the general protection
faults. I don't understand what
Hi,
Again, sorry for taking so long, but I just don't send stuff without looking
through it. This is meant to go into Michael's PCI branch, if it does.
Some of the changes include:
- some fixes (one thanks to David Gibson) and cleanups
- macro magic for exporting clones of the DMA
This introduces replacements for memory access functions like
cpu_physical_memory_read(). The new interface can handle address
translation and access checking through an IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
Makefile.target |2 +-
hw/dma_rw.c |
IOMMUs can now be hooked onto the PCI bus. This makes use of the generic
DMA layer.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/pci.c |7 +++
hw/pci.h |9 +
hw/pci_internals.h |1 +
3 files changed, 17 insertions(+), 0
This introduces emulation for the AMD IOMMU, described in AMD I/O
Virtualization Technology (IOMMU) Specification.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
Makefile.target |2 +-
hw/amd_iommu.c | 712 +++
Emulated PCI IDE controllers now use the memory access interface. This
also allows an emulated IOMMU to translate and check accesses.
Map invalidation results in cancelling DMA transfers. Since the guest OS
can't properly recover the DMA results in case the mapping is changed,
this is a fairly
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/rtl8139.c | 98 ++---
1 files changed, 52 insertions(+), 46 deletions(-)
diff --git a/hw/rtl8139.c
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/eepro100.c | 95 ++--
1 files changed, 51 insertions(+), 44 deletions(-)
diff --git a/hw/eepro100.c
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/ac97.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/ac97.c b/hw/ac97.c
index d71072d..bad38fb 100644
--- a/hw/ac97.c
+++
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/es1370.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/es1370.c b/hw/es1370.c
index 40cb48c..1645dbd 100644
---
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/e1000.c | 27 +++
1 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/hw/e1000.c b/hw/e1000.c
index f160bfc..acfd329
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/lsi53c895a.c | 24
1 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/usb-uhci.c | 26 ++
1 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c
index
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/usb-ohci.c | 46 +++---
1 files changed, 31 insertions(+), 15 deletions(-)
diff --git a/hw/usb-ohci.c
This allows the device to work properly with an emulated IOMMU.
Signed-off-by: Eduard - Gabriel Munteanu eduard.munte...@linux360.ro
---
hw/pcnet-pci.c |5 +++--
1 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/pcnet-pci.c b/hw/pcnet-pci.c
index 9415a1e..6c2186e 100644
---
On 06/01/2011 12:32 AM, Sasha Levin wrote:
On Tue, 2011-05-31 at 10:18 +0300, Pekka Enberg wrote:
On Tue, May 31, 2011 at 2:53 AM, Asias He asias.he...@gmail.com wrote:
TAP based network performance with ioeventfd
Heh, so how did it look _before_ ioeventfd? Did performance improve
and how
From: brill...@viatech.com.cn
When KVM is running on VIA CPU with host cpu's model, the
feautures of VIA CPU will be passed into kvm guest by calling
the CPUID instruction for Centaur.
Signed-off-by: BrillyWubrill...@viatech.com.cn
Signed-off-by: KaryJinkary...@viatech.com.cn
---
On 01/06/11 09:15, Andrea Arcangeli wrote:
Hello,
On Wed, Jun 01, 2011 at 08:37:25AM +0800, Brad Campbell wrote:
On 01/06/11 06:31, Hugh Dickins wrote:
Brad, my suspicion is that in each case the top 16 bits of RDX have been
mysteriously corrupted from to , causing the general
On Tue, May 31, 2011 at 03:55:49PM -0400, Vivek Goyal wrote:
Date: Tue, 31 May 2011 15:55:49 -0400
From: Vivek Goyal vgo...@redhat.com
To: Zhi Yong Wu wu...@linux.vnet.ibm.com
Cc: kw...@redhat.com, aligu...@us.ibm.com, stefa...@linux.vnet.ibm.com,
kvm@vger.kernel.org,
On Tue, May 31, 2011 at 03:55:49PM -0400, Vivek Goyal wrote:
Date: Tue, 31 May 2011 15:55:49 -0400
From: Vivek Goyal vgo...@redhat.com
To: Zhi Yong Wu wu...@linux.vnet.ibm.com
Cc: kw...@redhat.com, aligu...@us.ibm.com, stefa...@linux.vnet.ibm.com,
kvm@vger.kernel.org,
On Wed, 1 Jun 2011, Andrea Arcangeli wrote:
On Wed, Jun 01, 2011 at 08:37:25AM +0800, Brad Campbell wrote:
On 01/06/11 06:31, Hugh Dickins wrote:
Brad, my suspicion is that in each case the top 16 bits of RDX have been
mysteriously corrupted from to , causing the general
On Tue, May 31, 2011 at 02:50:20PM +0200, Alexander Graf wrote:
On 31.05.2011, at 14:35, Paul Mackerras wrote:
On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote:
Thinking about the testability of this a bit more ... how much
effort would it be to get this code running on
On Wed, Jun 01, 2011 at 12:34:43AM +0200, Segher Boessenkool wrote:
There's a loop of 128 iterations of 3 insns.
I'm not saying it is actually bad, just that that 50 is slightly off ;-)
That would be the TLB invalidation. On POWER7 we only need to do that
if the virtual cpu last ran on a
On Tue, May 31, 2011 at 5:35 AM, Paul Mackerras pau...@samba.org wrote:
On Tue, May 31, 2011 at 12:40:31PM +0200, Alexander Graf wrote:
Thinking about the testability of this a bit more ... how much
effort would it be to get this code running on a 970MP with SLOF?
There should only be a few
The following series of patches enable KVM to exploit the hardware
hypervisor mode on 64-bit Power ISA Book3S machines. At present only
POWER7 is supported, but it would be easy to add other processors.
Running the KVM host in hypervisor mode means that the guest can use
both supervisor mode and
This moves the slb field, which represents the state of the emulated
SLB, from the kvmppc_vcpu_book3s struct to the kvm_vcpu_arch, and the
hpte_hash_[v]pte[_long] fields from kvm_vcpu_arch to kvmppc_vcpu_book3s.
This is in accord with the principle that the kvm_vcpu_arch struct
represents the
There are several fields in struct kvmppc_book3s_shadow_vcpu that
temporarily store bits of host state while a guest is running,
rather than anything relating to the particular guest or vcpu.
This splits them out into a new kvmppc_host_state structure and
modifies the definitions in asm-offsets.c
Instead of branching out-of-line with the DO_KVM macro to check if we
are in a KVM guest at the time of an interrupt, this moves the KVM
check inline in the first-level interrupt handlers. This speeds up
the non-KVM case and makes sure that none of the interrupt handlers
are missing the check.
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