On Tue, May 15, 2012 at 10:55:19PM -0300, Marcelo Tosatti wrote:
On Tue, May 15, 2012 at 05:36:19PM +0300, Michael S. Tsirkin wrote:
Implementation of PV EOI using shared memory.
This reduces the number of exits an interrupt
causes as much as by half.
The idea is simple: there's a bit,
On Tue, May 15, 2012 at 10:51:24PM -0300, Marcelo Tosatti wrote:
On Tue, May 15, 2012 at 05:36:12PM +0300, Michael S. Tsirkin wrote:
The idea is simple: there's a bit, per APIC, in guest memory,
that tells the guest that it does not need EOI.
Guest tests it using a single est and clear
This patch set exports offsets of VMCS fields as note information for
kdump. We call it VMCSINFO. The purpose of VMCSINFO is to retrieve
runtime state of guest machine image, such as registers, in host
machine's crash dump as VMCS format. The problem is that VMCS internal
is hidden by Intel in its
This patch provides a set of variables to hold the VMCSINFO and also
some helper functions to help fill the VMCSINFO.
Signed-off-by: zhangyanfei zhangyan...@cn.fujitsu.com
---
arch/x86/include/asm/vmcsinfo.h | 34 +
arch/x86/kernel/Makefile|2 +
A new module named vmcsinfo-intel is used to fill VMCSINFO. And
this module depends on kvm-intel and kvm module. So we should
export some symbols of kvm-intel and kvm module that are needed
by vmcsinfo-intel.
Signed-off-by: zhangyanfei zhangyan...@cn.fujitsu.com
---
arch/x86/include/asm/vmx.h |
This patch implements a new module named vmcsinfo-intel. The
module fills VMCSINFO with the VMCS revision identifier,
and encoded offsets of VMCS fields.
Note, offsets of fields below will not be filled into VMCSINFO:
1. fields defined in Intel specification (Intel® 64 and
IA-32 Architectures
This patch creates two sysfs files to export where VMCSINFO is
allocated and what maximum size of VMCSINFO is, as below:
$ cat /sys/kernel/vmcsinfo
1cb88a0
$ cat /sys/kernel/vmcsinfo_maxsize
1000
/sys/kernel/vmcsinfo shows the physical address of VMCSINFO,
while
We create two new sysfs files, vmcsinfo and vmcsinfo_maxsize. And
here we add an Documentation/ABI entry for them.
Signed-off-by: zhangyanfei zhangyan...@cn.fujitsu.com
---
Documentation/ABI/testing/sysfs-kernel-vmcsinfo | 16
1 files changed, 16 insertions(+), 0 deletions(-)
On 05/16/2012 02:50 AM, Greg KH wrote:
On Tue, May 15, 2012 at 08:06:57AM -0700, Andrew Stiegmann (stieg) wrote:
In an effort to improve the out-of-the-box experience with Linux
kernels for VMware users, VMware is working on readying the Virtual
Machine Communication Interface (vmw_vmci) and
On Tue, May 15, 2012 at 10:55:19PM -0300, Marcelo Tosatti wrote:
On Tue, May 15, 2012 at 05:36:19PM +0300, Michael S. Tsirkin wrote:
Implementation of PV EOI using shared memory.
This reduces the number of exits an interrupt
causes as much as by half.
The idea is simple: there's a bit,
On 05/16/2012 04:08 AM, Xudong Hao wrote:
Add kernel parameter to control A/D bits support, it's on by default.
Signed-off-by: Haitao Shan haitao.s...@intel.com
Signed-off-by: Xudong Hao xudong@intel.com
---
arch/x86/kvm/vmx.c | 12
1 files changed, 12 insertions(+), 0
Code in book3s_64_mmu_hv.c, which is in the modular part of HV KVM,
needs to access kvm_hpt_order, which is defined in the built-in part.
Therefore we need to export it.
Signed-off-by: Paul Mackerras pau...@samba.org
---
Alex, it's up to you whether you apply this on your kvm-ppc-next branch
or
On 05/16/2012 11:17 AM, Paul Mackerras wrote:
Code in book3s_64_mmu_hv.c, which is in the modular part of HV KVM,
needs to access kvm_hpt_order, which is defined in the built-in part.
Therefore we need to export it.
Signed-off-by: Paul Mackerraspau...@samba.org
---
Alex, it's up to you whether
On 05/16/2012 04:04 AM, Xudong Hao wrote:
EPT A/D bits enable VMMs to efficiently implement memory management and page
classification algorithms to optimize VM memory operations such as
de-fragmentation, paging, live-migration, and check-pointing.
The series of patches enable the EPT access
On 05/15/2012 11:25 PM, Andrew Morton wrote:
On Tue, 15 May 2012 11:02:17 +0300
Avi Kivity a...@redhat.com wrote:
On 05/14/2012 04:29 PM, Takuya Yoshikawa wrote:
On Sun, 13 May 2012 13:20:46 +0300
Avi Kivity a...@redhat.com wrote:
I don't feel that the savings is worth the extra
-Original Message-
From: Avi Kivity [mailto:a...@redhat.com]
Sent: Wednesday, May 16, 2012 5:15 PM
To: Xudong Hao
Cc: kvm@vger.kernel.org; linux-ker...@vger.kernel.org; Shan, Haitao; Zhang,
Xiantao; Hao, Xudong
Subject: Re: [PATCH 2/4] Add parameter to control A/D bits support
On
Add kernel parameter to control A/D bits support, it's on by default.
Changes from v1:
-Use bool type for enable_ept_ad_bit.
-Use eptad to replace ept_ad_bits.
Signed-off-by: Haitao Shan haitao.s...@intel.com
Signed-off-by: Xudong Hao xudong@intel.com
---
arch/x86/kvm/vmx.c | 12
On 2012-05-16 00:27, Marcelo Tosatti wrote:
On Thu, May 10, 2012 at 06:02:52PM -0300, Jan Kiszka wrote:
This patch basically adds kvm_irqchip_send_msi, a service for sending
arbitrary MSI messages to KVM's in-kernel irqchip models.
As the current KVI API requires us to establish a static
Signed-off-by: Avi Kivity a...@redhat.com
---
scripts/kvm/vmxcap | 13 +
1 file changed, 13 insertions(+)
diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index a74ce71..cbe6440 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -22,6 +22,7 @@
I'm looking at reducing the interrupt overhead for virtualized guests:
some workloads spend a large part of their time processing interrupts.
This patchset supplies infrastructure to reduce the IRQ ack overhead on
x86: the idea is to add an eoi_write callback that we can then optimize
without
The idea is simple: there's a bit, per APIC, in guest memory,
that tells the guest that it does not need EOI.
Guest tests it using a single est and clear operation - this is
necessary so that host can detect interrupt nesting - and if set, it can
skip the EOI MSR.
I run a simple microbenchmark to
__test_and_clear_bit is actually atomic with respect
to the local CPU. Add a note saying that KVM on x86
relies on this behaviour so people don't accidentaly break it.
Also warn not to rely on this in portable code.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
Implementation of PV EOI using shared memory.
This reduces the number of exits an interrupt
causes as much as by half.
The idea is simple: there's a bit, per APIC, in guest memory,
that tells the guest that it does not need EOI.
We set it before injecting an interrupt and clear
before injecting a
Document the new EOI MSR. Couldn't decide whether this change belongs
conceptually on guest or host side, so a separate patch.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
Documentation/virtual/kvm/msr.txt | 32
1 files changed, 32 insertions(+), 0
Commit eb0dc6d0368072236dcd086d7fdc17fd3c4574d4 introduced apic
attention bitmask but kvm still syncs lapic unconditionally.
As that commit suggested and in anticipation of adding more attention
bits, only sync lapic if(apic_attention).
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
From: Benjamin Herrenschmidt b...@kernel.crashing.org
The code forgot to scramble the VSIDs the way we normally do
and was basically using the proto VSID directly with the MMU.
This means that in practice, KVM used random VSIDs that could
collide with segments used by other user space programs.
Anyone please commits or provides any useful insights? Really appreciate~
Hailong
-Original Message-
From: Hailong Yang [mailto:hailong.yang1...@gmail.com]
Sent: Tuesday, May 15, 2012 6:48 PM
To: kvm@vger.kernel.org
Subject: Descriptions about KVM performance counters
Dear all,
Hi Avi,
There are a few bugs in 3.4 that really should be fixed before people can
be all happy and fuzzy about KVM on PowerPC. These fixes are:
* fix POWER7 bare metal with PR=y
* fix deadlock on HV=y book3s_64 mode in low memory cases
* fix invalid MMU scope of PR=y mode on book3s_64,
In addition to normal priviledged instruction traps, we can also receive
emulation assist traps on newer hardware that has the HV bit set.
Handle that one the same way as a privileged instruction, including the
instruction fetching. That way we don't execute old instructions that we
happen to
From: Benjamin Herrenschmidt b...@kernel.crashing.org
The code forgot to scramble the VSIDs the way we normally do
and was basically using the proto VSID directly with the MMU.
This means that in practice, KVM used random VSIDs that could
collide with segments used by other user space programs.
When jumping back into the kernel to code that knows that it would be
using HSRR registers instead of SRR registers, we need to make sure we
pass it all information on where to jump to in HSRR registers.
Unfortunately, we used r10 to store the information to distinguish between
the HSRR and SRR
From: Paul Mackerras pau...@samba.org
When handling the H_BULK_REMOVE hypercall, we were forgetting to
invalidate and unlock the hashed page table entry (HPTE) in the case
where the page had been paged out. This fixes it by clearing the
first doubleword of the HPTE in that case.
This fixes a
When running on a system that is HV capable, some interrupts use HSRR
SPRs instead of the normal SRR SPRs. These are also used in the Linux
handlers to jump back to code after an interrupt got processed.
Unfortunately, in our jump back to the real host handler after we've
done the context switch
On 05/16/2012 04:05 PM, Alexander Graf wrote:
Hi Avi,
There are a few bugs in 3.4 that really should be fixed before people can
be all happy and fuzzy about KVM on PowerPC. These fixes are:
* fix POWER7 bare metal with PR=y
* fix deadlock on HV=y book3s_64 mode in low memory cases
*
When reinjecting host interrupt requests in the exit handler code,
let's also tell the interrupt handler which interrupt number we're
coming from.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/booke.c | 12 +++-
1 files changed, 7 insertions(+), 5 deletions(-)
diff
On 05/16/2012 03:23 PM, Avi Kivity wrote:
On 05/16/2012 04:05 PM, Alexander Graf wrote:
Hi Avi,
There are a few bugs in 3.4 that really should be fixed before people can
be all happy and fuzzy about KVM on PowerPC. These fixes are:
* fix POWER7 bare metal with PR=y
* fix deadlock on
On 05/15/2012 05:09 PM, Alex Williamson wrote:
On Tue, 2012-05-15 at 13:56 -0600, Bjorn Helgaas wrote:
On Mon, May 14, 2012 at 4:49 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Mon, 2012-05-14 at 16:02 -0600, Bjorn Helgaas wrote:
On Fri, May 11, 2012 at 4:56 PM, Alex Williamson
On 05/16/2012 04:28 PM, Alexander Graf wrote:
On 05/16/2012 03:23 PM, Avi Kivity wrote:
On 05/16/2012 04:05 PM, Alexander Graf wrote:
Hi Avi,
There are a few bugs in 3.4 that really should be fixed before
people can
be all happy and fuzzy about KVM on PowerPC. These fixes are:
* fix
On Wed, 16 May 2012 12:21:53 +0300
Avi Kivity a...@redhat.com wrote:
On 05/16/2012 04:04 AM, Xudong Hao wrote:
EPT A/D bits enable VMMs to efficiently implement memory management and
page classification algorithms to optimize VM memory operations such as
de-fragmentation, paging,
On 05/16/2012 04:35 PM, Takuya Yoshikawa wrote:
On Wed, 16 May 2012 12:21:53 +0300
Avi Kivity a...@redhat.com wrote:
On 05/16/2012 04:04 AM, Xudong Hao wrote:
EPT A/D bits enable VMMs to efficiently implement memory management and
page classification algorithms to optimize VM memory
On Mon, 2012-05-14 at 21:39 +0300, Michael S. Tsirkin wrote:
Hello Mike,
Have you tested this patch? I think the difference between macvtap
and
tap is tap forwarding the packet to bridge. The zerocopy is disabled
in
this case.
Shirley
Testing in progress, but the patchset I
Linus, please pull from:
git://git.kernel.org/pub/scm/virt/kvm/kvm.git master
To receive urgent KVM PPC updates, quoting Alexander Graf:
There are a few bugs in 3.4 that really should be fixed before people can
be all happy and fuzzy about KVM on PowerPC. These fixes are:
* fix POWER7
On Wed, May 16, 2012 at 02:45:50PM +0300, Michael S. Tsirkin wrote:
I'm looking at reducing the interrupt overhead for virtualized guests:
some workloads spend a large part of their time processing interrupts.
This patchset supplies infrastructure to reduce the IRQ ack overhead on
x86: the
On Wed, May 16, 2012 at 02:46:12PM +0300, Michael S. Tsirkin wrote:
Implementation of PV EOI using shared memory.
This reduces the number of exits an interrupt
causes as much as by half.
The idea is simple: there's a bit, per APIC, in guest memory,
that tells the guest that it does not need
Hi Ingo, please cosider the following patches for tip.git and for
3.5.
This patchset includes just the core bits for the eoi optimization.
Please note that even though I numbered it PATCHv5 to stress this is the
latest version, in fact there are absolutely no changes in the patches
included here
Fix typo in the macro name and document the
reason it has this value. Update users.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
arch/x86/include/asm/apicdef.h |2 +-
arch/x86/platform/visws/visws_quirks.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff
Use the symbol instead of hard-coded numbers,
now that the reason for the value is documented
where the constant is defined we don't need to
duplicate this explanation in code.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
arch/x86/include/asm/apic.h |4 +---
1 files changed, 1
Add eoi_write callback so that kvm can override
eoi accesses without touching the rest of the apic.
As a side-effect, this will enable a micro-optimization
for apics using msr.
Signed-off-by: Michael S. Tsirkin m...@redhat.com
---
arch/x86/include/asm/apic.h | 15 ++-
We know both register and value for eoi beforehand,
so there's no need to check it and no need to do math
to calculate the msr. Saves instructions/branches
on each EOI when using x2apic.
I'm not sure what kind of tests should one run
to check whether this patch is good for performance.
Some data
On Wed, 2012-05-16 at 09:29 -0400, Don Dutile wrote:
On 05/15/2012 05:09 PM, Alex Williamson wrote:
On Tue, 2012-05-15 at 13:56 -0600, Bjorn Helgaas wrote:
On Mon, May 14, 2012 at 4:49 PM, Alex Williamson
alex.william...@redhat.com wrote:
On Mon, 2012-05-14 at 16:02 -0600, Bjorn Helgaas
On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
@@ -1245,9 +1306,20 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
int vector = kvm_apic_has_interrupt(vcpu);
struct kvm_lapic *apic = vcpu-arch.apic;
- if (vector == -1)
+ /* Detect interrupt nesting
On Wed, May 16, 2012 at 07:32:06PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
@@ -1245,9 +1306,20 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
int vector
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
@@ -1245,9 +1306,20 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
int vector = kvm_apic_has_interrupt(vcpu);
struct kvm_lapic *apic =
I'm using FreeBSD 9.0 (FreeBSD freebsd9-i386 9.0-RELEASE FreeBSD 9.0-RELEASE)
as my guest OS with qemu-kvm (qemu-kvm-1.1-rc2/x86_64-softmmu/
qemu-system-x86_64) running on centos 6.2 (CentOS release 6.2) with
2.6.32-220.el6.x86_64 kernel. I am using Intel's 82599EB 10-Gigabit hardware
on the host,
On Wed, May 16, 2012 at 02:20:58PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
@@ -1245,9 +1306,20 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
int
On Wed, May 16, 2012 at 08:21:55PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:04:27PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:50:48PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 07:32:06PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at
On Wed, May 16, 2012 at 08:34:23PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:23:45PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:21:55PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:04:27PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:50:48PM
On Wed, May 16, 2012 at 02:40:22PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:34:23PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:23:45PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:21:55PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:04:27PM
On Wed, May 16, 2012 at 07:50:48PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 07:32:06PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
@@ -1245,9 +1306,20 @@
On Wed, May 16, 2012 at 02:23:45PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:21:55PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:04:27PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:50:48PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at
On 2012-05-16 08:15, Jan Kiszka wrote:
On 2012-05-16 00:27, Marcelo Tosatti wrote:
On Thu, May 10, 2012 at 06:02:52PM -0300, Jan Kiszka wrote:
This patch basically adds kvm_irqchip_send_msi, a service for sending
arbitrary MSI messages to KVM's in-kernel irqchip models.
As the current KVI
On Wed, 2012-05-16 at 17:49 +, Shesha Sreenivasamurthy wrote:
I'm using FreeBSD 9.0 (FreeBSD freebsd9-i386 9.0-RELEASE FreeBSD 9.0-RELEASE)
as my guest OS with qemu-kvm (qemu-kvm-1.1-rc2/x86_64-softmmu/
qemu-system-x86_64) running on centos 6.2 (CentOS release 6.2) with
On Wed, May 16, 2012 at 03:15:00PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:58:57PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 02:20:58PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012
On Wed, May 16, 2012 at 03:15:00PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:58:57PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 02:20:58PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012
On Wed, May 16, 2012 at 08:15:37AM -0300, Jan Kiszka wrote:
On 2012-05-16 00:27, Marcelo Tosatti wrote:
On Thu, May 10, 2012 at 06:02:52PM -0300, Jan Kiszka wrote:
This patch basically adds kvm_irqchip_send_msi, a service for sending
arbitrary MSI messages to KVM's in-kernel irqchip models.
On Wed, May 16, 2012 at 08:16:55AM -0700, Shirley Ma wrote:
On Mon, 2012-05-14 at 21:39 +0300, Michael S. Tsirkin wrote:
Hello Mike,
Have you tested this patch? I think the difference between macvtap
and
tap is tap forwarding the packet to bridge. The zerocopy is disabled
in
On Wed, May 16, 2012 at 09:25:20PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 03:15:00PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:58:57PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 02:20:58PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at
On Wed, May 16, 2012 at 02:04:27PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:50:48PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 07:32:06PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 12:49:40PM -0300, Marcelo Tosatti wrote:
@@ -1245,9 +1306,20 @@ int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu)
int vector = kvm_apic_has_interrupt(vcpu);
struct kvm_lapic *apic =
On Wed, May 16, 2012 at 03:15:00PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:58:57PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 02:20:58PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:22:47PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012
On Wed, May 16, 2012 at 02:23:45PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:21:55PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 02:04:27PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 07:50:48PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at
On Wed, May 16, 2012 at 09:29:49PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 09:25:20PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 03:15:00PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at 08:58:57PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at
Only minor change in v4:
- fixed bisectability issue caused by pc: Enable MSI support at APIC
level
- renamed kvm_get_pseudo_gsi to kvm_irqchip_get_virq
- introduce kvm_irqchip_release_virq directly (to avoid renaming in a
later series)
Jan Kiszka (8):
kvm: Refactor KVMState::max_gsi
Instead of the bitmap size, store the maximum of GSIs the kernel
support. Move the GSI limit assertion to the API function
kvm_irqchip_add_route and make it stricter.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
kvm-all.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
Push msi_supported enabling to the APIC implementations where we can
encapsulate the decision more cleanly, hiding the details from the
generic code.
Acked-by: Stefano Stabellini stefano.stabell...@eu.citrix.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
hw/apic.c |3 +++
Corresponding kvm.git hash: f2569053e0
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
linux-headers/linux/kvm.h | 38 ++
1 files changed, 38 insertions(+), 0 deletions(-)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index
As MSI is now fully supported by KVM (/wrt available features in
upstream), we can finally enable the in-kernel irqchip by default.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
kvm-all.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/kvm-all.c b/kvm-all.c
index
If the kernel supports KVM_SIGNAL_MSI, we can avoid the route-based
MSI injection mechanism.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
kvm-all.c | 22 +++---
1 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/kvm-all.c b/kvm-all.c
index ff0534b..d222012
On Wed, May 16, 2012 at 09:38:22PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 09:29:49PM +0300, Michael S. Tsirkin wrote:
On Wed, May 16, 2012 at 09:25:20PM +0300, Gleb Natapov wrote:
On Wed, May 16, 2012 at 03:15:00PM -0300, Marcelo Tosatti wrote:
On Wed, May 16, 2012 at
On Sun, May 13, 2012 at 07:53:22PM +0300, Avi Kivity wrote:
The lightweight exit path needlessly reloads %ds and %es (and clobbers the
user supplied values as well, a minor ABI bug). This patchset fixes the bug
and moves the reload to the heavyweight exit path (potentially skipping it
On Mon, 2012-05-14 at 14:21 +1000, Alexey Kardashevskiy wrote:
On 14/05/12 11:58, David Gibson wrote:
On Sat, May 12, 2012 at 05:29:53PM +1000, Alexey Kardashevskiy wrote:
There is a need for a mechanism to obtain an IRQ line number to
initialize End-Of-Interrupt handler.
There is
On Wed, 2012-05-16 at 13:44 -0700, Shesha Sreenivasamurthy wrote:
I downloaded the latest driver from freebsd-head (version 2.4.5). But still
its the same problem. Regarding your question, do I see any interrupts on
this line: How do I check?
I pinged outside interface after setting up an IP
Description of the bug:
Since QEMU 0.15, the CPUID information on CPUID[EAX=7,ECX=0] is being
returned unfiltered to the guest, directly from the GET_SUPPORTED_CPUID
return value.
The problem is that this makes the resulting CPU feature flags
unpredictable and dependent on the host CPU and
On Mon, May 14, 2012 at 06:07:56PM +0300, Avi Kivity wrote:
Currently the inject_pending_event() call during guest entry happens after
kvm_mmu_reload(). This is for historical reasons - we used to
inject_pending_event() in atomic context, while kvm_mmu_reload() needs task
context.
A
On Wed, May 16, 2012 at 10:07:58PM +0300, Michael S. Tsirkin wrote:
not be called in above scenario.
I think I see. So this shall fix it also makes code cleaner
(no -2 hack). Right? kvm_apic_has_interrupt is called correct?
Yes, but its used by multiple callsites. Best to unify it (both
On Mon, May 14, 2012 at 06:57:11PM -0300, Lucas Meneghel Rodrigues wrote:
vmexit takes a parameter to run appropriate subtests, but
unittests.cfg was not updated to reflect that. As this
config file is used by automated test harnesses such as
autotest, this will make the appropriate tests not
On 05/08/2012 05:40 AM, Alexander Graf wrote:
On 15.03.2012, at 21:52, Stuart Yoder wrote:
From: Liu Yu-B13201 yu@freescale.com
And add a new flag definition in kvm_ppc_pvinfo to indicate
whether the host supports the EV_IDLE hcall.
Signed-off-by: Liu Yu yu@freescale.com
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Tuesday, May 15, 2012 10:42 AM
To: Mao, Junjie
Cc: 'kvm@vger.kernel.org'
Subject: Re: [PATCH v2] KVM: x86: Implement PCID/INVPCID for guests with
EPT
On Mon, May 14, 2012 at 06:25:40AM +, Mao, Junjie
Hi,
Can I run Intel vTune program that uses hardware events from the PMU, for
profiling, on my linux VM on KVM? Also, what is the current state of PMU
support for guest VMs on KVM?.
Thanks and regards,
Sriram
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the body of a
On 17/05/12 06:39, Alex Williamson wrote:
On Mon, 2012-05-14 at 14:21 +1000, Alexey Kardashevskiy wrote:
On 14/05/12 11:58, David Gibson wrote:
On Sat, May 12, 2012 at 05:29:53PM +1000, Alexey Kardashevskiy wrote:
There is a need for a mechanism to obtain an IRQ line number to
initialize
On 05/16/2012 03:58 PM, Eduardo Habkost wrote:
Description of the bug:
Since QEMU 0.15, the CPUID information on CPUID[EAX=7,ECX=0] is being
returned unfiltered to the guest, directly from the GET_SUPPORTED_CPUID
return value.
The problem is that this makes the resulting CPU feature flags
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
Behalf Of Mao, Junjie
Sent: Thursday, May 17, 2012 9:22 AM
To: Marcelo Tosatti
Cc: 'kvm@vger.kernel.org'
Subject: RE: [PATCH v2] KVM: x86: Implement PCID/INVPCID for guests with
EPT
On Thu, 2012-05-17 at 12:16 +1000, Alexey Kardashevskiy wrote:
It actually can change dynamically on x86 due to acpi interrupt links
which allow the guest a generic way to select from a set of possible
interrupt routing schemes. And of course a chipset driver could twiddle
bits if it
On Thu, May 17, 2012 at 01:22:05AM +, Mao, Junjie wrote:
-Original Message-
From: Marcelo Tosatti [mailto:mtosa...@redhat.com]
Sent: Tuesday, May 15, 2012 10:42 AM
To: Mao, Junjie
Cc: 'kvm@vger.kernel.org'
Subject: Re: [PATCH v2] KVM: x86: Implement PCID/INVPCID for guests
On Mon, 14 May 2012 18:57:20 -0400, Christoffer Dall
c.d...@virtualopensystems.com wrote:
On Thu, Mar 22, 2012 at 8:41 PM, Rusty Russell rusty.russ...@linaro.org
wrote:
As our emulation gets more sophisticated, we need to know what CPU model
we're dealing with. Particularly for some of
On Mon, 14 May 2012 18:49:40 -0400, Christoffer Dall
c.d...@virtualopensystems.com wrote:
On Thu, Mar 29, 2012 at 1:17 AM, Rusty Russell rusty.russ...@linaro.org
wrote:
Rather than just making all of c9 read-zero/write-discard, this changes
it to the explicit profiling registers we need.
On Thu, 2012-05-17 at 13:00 +1000, Benjamin Herrenschmidt wrote:
On Thu, 2012-05-17 at 12:16 +1000, Alexey Kardashevskiy wrote:
It actually can change dynamically on x86 due to acpi interrupt links
which allow the guest a generic way to select from a set of possible
interrupt routing
On 17/05/12 13:00, Benjamin Herrenschmidt wrote:
On Thu, 2012-05-17 at 12:16 +1000, Alexey Kardashevskiy wrote:
It actually can change dynamically on x86 due to acpi interrupt links
which allow the guest a generic way to select from a set of possible
interrupt routing schemes. And of course
On Tue, May 15, 2012 at 12:34:03AM -0600, Alex Williamson wrote:
On Tue, 2012-05-15 at 12:03 +1000, David Gibson wrote:
On Mon, May 14, 2012 at 11:11:42AM -0600, Alex Williamson wrote:
On Mon, 2012-05-14 at 11:16 +1000, David Gibson wrote:
On Fri, May 11, 2012 at 04:55:41PM -0600, Alex
On Fri, May 11, 2012 at 04:55:48PM -0600, Alex Williamson wrote:
Add back group support for AMD Intel. amd_iommu already tracks
devices and has init and uninit routines to manage groups.
intel-iommu does this on the fly, so we make use of the notifier
support built into iommu groups to
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