https://bugzilla.kernel.org/show_bug.cgi?id=54061
--- Comment #2 from Jay Ren yongjie@intel.com 2013-02-20 08:06:16 ---
Marcleo,
yes, after reverting that commit caf6900f2d8, live-migration can work fine.
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On Thu, Feb 07, 2013 at 11:50:28PM -0200, Marcelo Tosatti wrote:
On Wed, Jan 23, 2013 at 03:19:23PM +0800, Hu Tao wrote:
From: Wen Congyang we...@cn.fujitsu.com
The guest should run after resetting it, but it does not run if its
old state is RUN_STATE_INTERNAL_ERROR or RUN_STATE_PAUSED.
On 02/11/2013 06:28 PM, Markus Armbruster wrote:
Commit 264986e2 extended NetdevTapOptions without updating the
documentation. Hasn't been addressed since. Must fix for 1.4, in my
opinion.
Will send a patch to fix this.
Thanks
This is the offending patch:
Jason Wang jasow...@redhat.com
On Wed, Feb 20, 2013 at 02:46:05AM +, Zhang, Yang Z wrote:
Avi Kivity wrote on 2013-02-20:
On Tue, Feb 19, 2013 at 3:39 PM, Yang Zhang yang.z.zh...@intel.com wrote:
From: Yang Zhang yang.z.zh...@intel.com
The acknowledge interrupt on exit feature controls processor behavior
for
Gleb Natapov wrote on 2013-02-20:
On Wed, Feb 20, 2013 at 02:46:05AM +, Zhang, Yang Z wrote:
Avi Kivity wrote on 2013-02-20:
On Tue, Feb 19, 2013 at 3:39 PM, Yang Zhang yang.z.zh...@intel.com
wrote:
From: Yang Zhang yang.z.zh...@intel.com
The acknowledge interrupt on exit feature
On Wed, Feb 20, 2013 at 4:46 AM, Zhang, Yang Z yang.z.zh...@intel.com wrote:
+static void vmx_handle_external_intr(struct kvm_vcpu *vcpu) +{ +
u32 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO); + + /* +
* If external interrupt exists, IF bit is set in rflags/eflags on
the +
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts directly from L0
to L2.
One difference to SVM is that we always transfer the pending event
injection into the architectural state of the VCPU and then drop it from
there
IDT_VECTORING_INFO_FIELD was already read right after vmexit.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 7d2fbd2..d99a519 100644
---
Cleanup: __vmx_complete_interrupts has no use for the vmx structure.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Note: this applies on top of Rework event injection and recovery
arch/x86/kvm/vmx.c | 31 ++-
1 files changed, 14 insertions(+), 17
Avi Kivity wrote on 2013-02-20:
On Wed, Feb 20, 2013 at 4:46 AM, Zhang, Yang Z yang.z.zh...@intel.com
wrote:
+static void vmx_handle_external_intr(struct kvm_vcpu *vcpu) +{ +
u32 exit_intr_info = vmcs_read32(VM_EXIT_INTR_INFO); + + /* +
* If external interrupt exists, IF bit is set
On Tue, Feb 19, 2013 at 03:16:37PM -0600, Scott Wood wrote:
On 02/19/2013 06:24:18 AM, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
The ability to set/get attributes is needed. Sorry, but get or set
one blob of data, up to 512 bytes, for the entire irqchip
Hi,
By the way, if you haven't seen my description of why the current code
did what it did, take a look at
http://www.mail-archive.com/kvm@vger.kernel.org/msg54478.html
Another description might also come in handy:
http://www.mail-archive.com/kvm@vger.kernel.org/msg54476.html
On Wed, Feb 20,
On Tue, Feb 19, 2013 at 11:27:20PM -0300, Marcelo Tosatti wrote:
Read and write steal time MSR, so that reporting is functional across
migration.
Signed-off-by: Marcelo Tosatti mtosa...@redhat.com
Reviewed-by: Gleb Natapov g...@redhat.com
diff --git a/target-i386/cpu.h
https://bugzilla.kernel.org/show_bug.cgi?id=54141
Summary: nVMX: Support TPR shadow
Product: Virtualization
Version: unspecified
Platform: All
OS/Version: Linux
Tree: Mainline
Status: NEW
Severity: enhancement
https://bugzilla.kernel.org/show_bug.cgi?id=53601
Nadav Har'El n...@math.technion.ac.il changed:
What|Removed |Added
Depends on||54141
--
https://bugzilla.kernel.org/show_bug.cgi?id=54141
Nadav Har'El n...@math.technion.ac.il changed:
What|Removed |Added
Blocks||53601
--
On 2013-02-20 15:14, Nadav Har'El wrote:
Hi,
By the way, if you haven't seen my description of why the current code
did what it did, take a look at
http://www.mail-archive.com/kvm@vger.kernel.org/msg54478.html
Another description might also come in handy:
On 2013-02-20 14:01, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts directly from L0
to L2.
One difference to SVM is that we always transfer the pending event
injection into the architectural
On Wed, Feb 20, 2013 at 3:10 PM, Zhang, Yang Z yang.z.zh...@intel.com wrote:
push %%cs
push %%cs is invalid in x86_64.
Oops. 'push[lq] $__KERNEL_CS' then.
Is this right? Just copy it from other file.
#define __STR(X) #X
#define STR(X) __STR(X)
#ifdef CONFIG_X86_64
https://bugzilla.kernel.org/show_bug.cgi?id=54161
Summary: nVMX: nested vpid
Product: Virtualization
Version: unspecified
Platform: All
OS/Version: Linux
Tree: Mainline
Status: NEW
Severity: enhancement
https://bugzilla.kernel.org/show_bug.cgi?id=53601
Nadav Har'El n...@math.technion.ac.il changed:
What|Removed |Added
Depends on||54161
--
https://bugzilla.kernel.org/show_bug.cgi?id=54161
Nadav Har'El n...@math.technion.ac.il changed:
What|Removed |Added
Blocks||53601
--
On Wed, Feb 20, 2013 at 03:53:53PM +0100, Jan Kiszka wrote:
On 2013-02-20 14:01, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts directly from L0
to L2.
One difference to SVM is that we
On 2013-02-20 16:30, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 03:53:53PM +0100, Jan Kiszka wrote:
On 2013-02-20 14:01, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts directly from L0
to L2.
On Wed, Feb 20, 2013 at 04:51:39PM +0100, Jan Kiszka wrote:
On 2013-02-20 16:30, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 03:53:53PM +0100, Jan Kiszka wrote:
On 2013-02-20 14:01, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests.
On 2013-02-20 16:57, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 04:51:39PM +0100, Jan Kiszka wrote:
On 2013-02-20 16:30, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 03:53:53PM +0100, Jan Kiszka wrote:
On 2013-02-20 14:01, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event
On Wed, Feb 20, 2013 at 02:01:47PM +0100, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts directly from L0
to L2.
One difference to SVM is that we always transfer the pending event
injection
On 2013-02-20 17:46, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 02:01:47PM +0100, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts directly from L0
to L2.
One difference to SVM is that we always
On Wed, Feb 20, 2013 at 05:48:40PM +0100, Jan Kiszka wrote:
On 2013-02-20 17:46, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 02:01:47PM +0100, Jan Kiszka wrote:
This aligns VMX more with SVM regarding event injection and recovery for
nested guests. The changes allow to inject interrupts
On Wed, Feb 20, 2013 at 03:37:51PM +0100, Jan Kiszka wrote:
On 2013-02-20 15:14, Nadav Har'El wrote:
Hi,
By the way, if you haven't seen my description of why the current code
did what it did, take a look at
http://www.mail-archive.com/kvm@vger.kernel.org/msg54478.html
Another
On Tue, 2013-02-19 at 10:26 +0200, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 08:12:21PM -0500, Peter Hurley wrote:
On Mon, 2013-02-18 at 19:59 -0300, Marcelo Tosatti wrote:
On Wed, Feb 13, 2013 at 06:57:09AM -0500, Peter Hurley wrote:
On Wed, 2013-02-13 at 12:51 +0200, Gleb Natapov
On 2013-02-20 18:01, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 03:37:51PM +0100, Jan Kiszka wrote:
On 2013-02-20 15:14, Nadav Har'El wrote:
Hi,
By the way, if you haven't seen my description of why the current code
did what it did, take a look at
On 2013-02-20 18:24, Jan Kiszka wrote:
On 2013-02-20 18:01, Gleb Natapov wrote:
On Wed, Feb 20, 2013 at 03:37:51PM +0100, Jan Kiszka wrote:
On 2013-02-20 15:14, Nadav Har'El wrote:
Hi,
By the way, if you haven't seen my description of why the current code
did what it did, take a look at
On Sat, Feb 16, 2013 at 01:56:14PM +1100, Paul Mackerras wrote:
On Fri, Feb 15, 2013 at 05:59:11PM -0600, Scott Wood wrote:
On 02/15/2013 05:18:31 PM, Paul Mackerras wrote:
On Fri, Feb 15, 2013 at 02:05:41PM -0600, Scott Wood wrote:
On 02/14/2013 06:01:08 PM, Paul Mackerras wrote:
From:
On Mon, Feb 18, 2013 at 07:56:54AM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
This time I've checked twice that I'm no longer missing a field.
Applied, thanks.
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On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently, devices that are emulated inside KVM are configured in
On Wed, Feb 20, 2013 at 03:09:49PM +0200, Gleb Natapov wrote:
On Tue, Feb 19, 2013 at 03:16:37PM -0600, Scott Wood wrote:
On 02/19/2013 06:24:18 AM, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
The ability to set/get attributes is needed. Sorry, but get
On Wed, Feb 20, 2013 at 06:28:24PM -0300, Marcelo Tosatti wrote:
On Wed, Feb 20, 2013 at 03:09:49PM +0200, Gleb Natapov wrote:
On Tue, Feb 19, 2013 at 03:16:37PM -0600, Scott Wood wrote:
On 02/19/2013 06:24:18 AM, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood
On 02/20/2013 03:17:27 PM, Marcelo Tosatti wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb 13, 2013 at 11:49:15PM -0600, Scott Wood wrote:
Currently,
On 02/20/2013 03:28:24 PM, Marcelo Tosatti wrote:
On Wed, Feb 20, 2013 at 03:09:49PM +0200, Gleb Natapov wrote:
On Tue, Feb 19, 2013 at 03:16:37PM -0600, Scott Wood wrote:
On 02/19/2013 06:24:18 AM, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
The
On Wed, Feb 20, 2013 at 05:20:50PM -0600, Scott Wood wrote:
On 02/20/2013 03:17:27 PM, Marcelo Tosatti wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
On 02/18/2013 06:21:59 AM, Gleb Natapov wrote:
Copying Christoffer since ARM has in kernel irq chip too.
On Wed, Feb
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
This is probably a stupid question, but why the
KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate for
your purposes?
x86 sets up a default GSI-IRQCHIP PIN mapping on creation (during
KVM_SET_IRQCHIP), but it can be modified with
On 02/20/2013 06:01:00 PM, Marcelo Tosatti wrote:
The main problem, to me, is that the interface allows flexibility but
the details of using such flexibility are not worked out.
That is, lack of definitions such as when setting attributes is
allowed.
That is defined by the individual
Linus,
Please pull from
git://git.kernel.org/pub/scm/virt/kvm/kvm.git tags/kvm-3.9-1
to receive the KVM updates for the 3.9 merge window, including x86 real
mode emulation fixes, stronger memory slot interface restrictions,
mmu_lock spinlock hold time reduction, improved handling of large
On Wed, Feb 20, 2013 at 06:20:51PM -0600, Scott Wood wrote:
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
This is probably a stupid question, but why the
KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate for
your purposes?
x86 sets up a default GSI-IRQCHIP PIN mapping on
On Wed, Feb 20, 2013 at 05:53:20PM -0600, Scott Wood wrote:
Why exactly you need to set attributes Scott?
That's best answered by looking at patch 6/6 and discussing the
actual attributes that are defined so far.
The need to set the base address of the registers is
straightforward. When
On 02/20/2013 06:14:37 PM, Marcelo Tosatti wrote:
On Wed, Feb 20, 2013 at 05:53:20PM -0600, Scott Wood wrote:
It is then not necessary to set device attributes on a live guest
and
deal with the complications associated with that.
Which complications?
-Scott
Semantics of individual
On 02/20/2013 07:09:55 PM, Marcelo Tosatti wrote:
On Wed, Feb 20, 2013 at 06:20:51PM -0600, Scott Wood wrote:
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
This is probably a stupid question, but why the
KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate
for
your
On 02/20/2013 07:09:49 AM, Gleb Natapov wrote:
On Tue, Feb 19, 2013 at 03:16:37PM -0600, Scott Wood wrote:
On 02/19/2013 06:24:18 AM, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
The ability to set/get attributes is needed. Sorry, but get or
set
one
Make debug output compile-testable even if disabled.
Signed-off-by: Andreas Färber afaer...@suse.de
Cc: Richard Henderson r...@twiddle.net
---
target-i386/helper.c | 42 ++
target-i386/kvm.c| 16
target-i386/seg_helper.c |
Make debug output compile-testable even if disabled.
Rename dprintf() in kvm.c to kvm_dprintf() to avoid conflict with glibc.
Inline DEBUG_OP check in excp_helper.c.
Inline LOG_MMU_STATE() in mmu_helper.c.
Inline PPC_{DEBUG_SPR,DUMP_SPR_ACCESSES} checks in translate_init.c.
Signed-off-by:
Make debug output compile-testable even if disabled.
Rename dprintf() in kvm.c to kvm_dprintf() due to a conflict with glibc.
Drop unused DEBUG_HELPER and LOG_HELPER() in fpu_helper.c.
Drop unused LOG_DISAS() in translate.c and inline S390X_DEBUG_DISAS.
Signed-off-by: Andreas Färber
Hi Marcelo,
Can you help to review this patch? Many thanks if you can review it quickly.
Zhang, Yang Z wrote on 2013-02-19:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to
On Thu, Feb 21, 2013 at 06:04:52AM +, Zhang, Yang Z wrote:
Hi Marcelo,
Can you help to review this patch? Many thanks if you can review it quickly.
The patch is only 2 days on the list. Be patient.
Zhang, Yang Z wrote on 2013-02-19:
From: Yang Zhang yang.z.zh...@intel.com
Posted
On Wed, Feb 20, 2013 at 07:28:52PM -0600, Scott Wood wrote:
On 02/20/2013 06:14:37 PM, Marcelo Tosatti wrote:
On Wed, Feb 20, 2013 at 05:53:20PM -0600, Scott Wood wrote:
It is then not necessary to set device attributes on a live
guest and
deal with the complications associated with that.
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
This is probably a stupid question, but why the
KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate for
your purposes?
x86 sets up a default GSI-IRQCHIP PIN mapping on creation (during
KVM_SET_IRQCHIP), but it can be modified with
On 02/20/2013 06:01:00 PM, Marcelo Tosatti wrote:
The main problem, to me, is that the interface allows flexibility but
the details of using such flexibility are not worked out.
That is, lack of definitions such as when setting attributes is
allowed.
That is defined by the individual
On Wed, Feb 20, 2013 at 06:20:51PM -0600, Scott Wood wrote:
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
This is probably a stupid question, but why the
KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate for
your purposes?
x86 sets up a default GSI-IRQCHIP PIN mapping on
On Wed, Feb 20, 2013 at 05:53:20PM -0600, Scott Wood wrote:
Why exactly you need to set attributes Scott?
That's best answered by looking at patch 6/6 and discussing the
actual attributes that are defined so far.
The need to set the base address of the registers is
straightforward. When
On 02/20/2013 07:09:55 PM, Marcelo Tosatti wrote:
On Wed, Feb 20, 2013 at 06:20:51PM -0600, Scott Wood wrote:
On 02/20/2013 01:58:54 PM, Marcelo Tosatti wrote:
This is probably a stupid question, but why the
KVM_SET_IRQCHIP/KVM_SET_GSI_ROUTING interface is not appropriate
for
your
On 02/20/2013 07:09:49 AM, Gleb Natapov wrote:
On Tue, Feb 19, 2013 at 03:16:37PM -0600, Scott Wood wrote:
On 02/19/2013 06:24:18 AM, Gleb Natapov wrote:
On Mon, Feb 18, 2013 at 05:01:40PM -0600, Scott Wood wrote:
The ability to set/get attributes is needed. Sorry, but get or
set
one
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