On Sun, Mar 03, 2013 at 08:47:11PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
Ouch, how could this work so well that far? We need to clear RFLAGS to
the reset value as specified by the SDM. Particularly, IF must be off
after VM-exit!
Signed-off-by: Jan Kiszka
-
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Il 28/02/2013 13:13, Hu Tao ha scritto:
This patch enables preservation of cpu runstate during save/load vm.
So when a vm is restored from snapshot, the cpu runstate is restored,
too.
I don't think this feature is worth breaking backwards migration
compatibility. It is usually handled at a
Il 28/02/2013 13:13, Hu Tao ha scritto:
From: Wen Congyang we...@cn.fujitsu.com
The guest should run after resetting it, but it does not run if its
old state is RUN_STATE_INTERNAL_ERROR or RUN_STATE_PAUSED.
We don't set runstate to RUN_STATE_PAUSED when resetting the guest,
so the
Il 28/02/2013 13:13, Hu Tao ha scritto:
The guest will be in this state when it is panicked.
Signed-off-by: Wen Congyang we...@cn.fujitsu.com
Signed-off-by: Hu Tao hu...@cn.fujitsu.com
---
migration.c | 1 +
qapi-schema.json | 6 +-
qmp.c| 3 ++-
vl.c
Il 28/02/2013 13:13, Hu Tao ha scritto:
This event will be emited when the guest is panicked.
Signed-off-by: Wen Congyang we...@cn.fujitsu.com
---
include/monitor/monitor.h | 1 +
monitor.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/include/monitor/monitor.h
Il 03/03/2013 10:17, Gleb Natapov ha scritto:
On Thu, Feb 28, 2013 at 08:13:10PM +0800, Hu Tao wrote:
This series implements a new interface, kvm pv event, to notify host when
some events happen in guest. Right now there is one supported event: guest
panic.
What other event do you have in
On Mon, Mar 04, 2013 at 11:28:05AM +0100, Paolo Bonzini wrote:
Il 04/03/2013 11:21, Gleb Natapov ha scritto:
Just to clarify it for Hu Tao, the read from a random ioport is how the
ACPI code will detect presence of the device.
Actually no (at least in the long run, for the first
On Mon, Mar 04, 2013 at 11:49:07AM +0100, Paolo Bonzini wrote:
Il 04/03/2013 11:43, Gleb Natapov ha scritto:
Anyhow, this does not apply to the next submission of this series. I
think we can agree to the compromise of using ACPI but still read the
port in _STA.
If you want to make
Am 26.02.2013 18:40, schrieb Peter Maydell:
Convert the ARM GIC classes to use init/realize rather than
SysBusDevice::init. (We have to do them all in one patch to
avoid unconverted subclasses calling a nonexistent SysBusDevice
init function in the base class and crashing.)
Signed-off-by:
Am 26.02.2013 18:40, schrieb Peter Maydell:
Drop the CPUARMState* argument from bank_number(), since we only
use it for passing to cpu_abort(). Use hw_error() instead.
This avoids propagating further interfaces using env pointers.
In the long term this function's callers need auditing to fix
Il 04/03/2013 11:59, Gleb Natapov ha scritto:
I want to make the ioport configurable in the device, but the PIIX and
ICH9 (which are what the DSDT is written for) will always use port 0x505.
But the device is not part of PIIX or ICH9.
So is kvmclock, or kvmvapic. I think it makes sense to
On Mon, Mar 04, 2013 at 11:05:37AM +0100, Paolo Bonzini wrote:
Guest uses acpi_get_devices() to discover a platform device by
its name (QEMU0001). Then you put the driver for the platform device
into drivers/platform/x86/ and QEMU/kvm/Xen all will be able to use it.
Just to clarify it
On Mon, Mar 04, 2013 at 12:10:58PM +0100, Paolo Bonzini wrote:
Il 04/03/2013 11:59, Gleb Natapov ha scritto:
I want to make the ioport configurable in the device, but the PIIX and
ICH9 (which are what the DSDT is written for) will always use port 0x505.
But the device is not part of
Il 04/03/2013 12:20, Gleb Natapov ha scritto:
On Mon, Mar 04, 2013 at 12:10:58PM +0100, Paolo Bonzini wrote:
It is additional device that
may or may not be present depending on a command line. So what if
someone configures debugcon or debugexit to use this port?
I haven't checked if
On 4 March 2013 19:10, Andreas Färber afaer...@suse.de wrote:
Am 26.02.2013 18:40, schrieb Peter Maydell:
if (s-num_cpu NCPU) {
-hw_error(requested %u CPUs exceeds GIC maximum %d\n,
- s-num_cpu, NCPU);
+error_setg(errp, requested %u CPUs exceeds GIC
Hello,
Am 02.03.2013 16:18, schrieb Sanjay Lal:
The following patchset implements KVM support for MIPS32 processors,
using Trap Emulate, with basic runtime binary translation to improve
performance.
[snip]
Please see http://wiki.qemu.org/Contribute/SubmitAPatch for some hints
on how to
Il 04/03/2013 12:52, Gleb Natapov ha scritto:
Same here, you can remove the panic event port and add debugcon at
0x505. That's the problematic case. But if the user goes to that
length, I think we can honestly say we don't care.
IMO there is a big difference between well know serial ISA
On Thu, Feb 28, 2013 at 10:44:47AM +0100, Jan Kiszka wrote:
The logic for calculating the value with which we call kvm_set_cr0/4 was
broken (will definitely be visible with nested unrestricted guest mode
support). Also, we performed the check regarding CR0_ALWAYSON too early
when in guest
Il 03/03/2013 13:04, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
Properly set those bits to 1 that the spec demands in case bit 55 of
VMX_BASIC is 0 - like in our case.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 13 ++---
1
Il 03/03/2013 17:48, Jan Kiszka ha scritto:
Hi all,
KVM's mp_state on x86 is usually manipulated over the context of the
VCPU. Therefore, no locking is required. There are unfortunately two
exceptions, and one of them is definitely broken: INIT and SIPI delivery.
The lapic may set
Il 03/03/2013 21:21, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
A VCPU sending INIT or SIPI to some other VCPU races for setting the
remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
was overwritten by kvm_emulate_halt and, thus, got lost.
Fix
On 2013-03-04 15:12, Paolo Bonzini wrote:
Il 03/03/2013 17:48, Jan Kiszka ha scritto:
Hi all,
KVM's mp_state on x86 is usually manipulated over the context of the
VCPU. Therefore, no locking is required. There are unfortunately two
exceptions, and one of them is definitely broken: INIT and
On 2013-03-04 15:28, Paolo Bonzini wrote:
Il 03/03/2013 21:21, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
A VCPU sending INIT or SIPI to some other VCPU races for setting the
remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
was overwritten by
On Mon, Mar 04, 2013, Jan Kiszka wrote about Re: [PATCH] KVM: nVMX: Fix
setting of CR0 and CR4 in guest mode:
if (is_guest_mode(vcpu)) {
-/*
- * We get here when L2 changed cr0 in a way that did
not change
- * any of L1's
On Sun, Mar 03, 2013, Jan Kiszka wrote about [PATCH] KVM: nVMX: Fix content of
MSR_IA32_VMX_ENTRY/EXIT_CTLS:
/* Note that guest use of VM_EXIT_ACK_INTR_ON_EXIT is not supported. */
#ifdef CONFIG_X86_64
nested_vmx_exit_ctls_high = VM_EXIT_HOST_ADDR_SPACE_SIZE;
#else
Properly set those bits to 1 that the spec demands in case bit 55 of
VMX_BASIC is 0 - like in our case.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Changes in v2:
- use symbolic constants
arch/x86/include/asm/vmx.h |4
arch/x86/kvm/vmx.c | 13 ++---
2 files
Il 04/03/2013 17:15, Jan Kiszka ha scritto:
Properly set those bits to 1 that the spec demands in case bit 55 of
VMX_BASIC is 0 - like in our case.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
Reviewed-by: Paolo Bonzini pbonz...@redhat.com
---
Changes in v2:
- use symbolic
This patch series further filters better vcpu candidate to yield to
in PLE handler. The main idea is to record the preempted vcpus using
preempt notifiers and iterate only those preempted vcpus in the
handler. Note that the vcpus which were in spinloop during pause loop
exit are already filtered.
On Sun, Mar 03, 2013 at 09:21:43PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
A VCPU sending INIT or SIPI to some other VCPU races for setting the
remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
was overwritten by kvm_emulate_halt and, thus, got
On 2013-03-04 19:08, Gleb Natapov wrote:
On Sun, Mar 03, 2013 at 09:21:43PM +0100, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
A VCPU sending INIT or SIPI to some other VCPU races for setting the
remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
was
On Mon, Mar 04, 2013 at 07:08:08PM +0100, Jan Kiszka wrote:
On 2013-03-04 18:56, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 03:25:47PM +0100, Jan Kiszka wrote:
On 2013-03-04 15:15, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 03:09:51PM +0100, Jan Kiszka wrote:
On 2013-03-04 14:22, Gleb
On 2013-03-04 19:39, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 07:08:08PM +0100, Jan Kiszka wrote:
On 2013-03-04 18:56, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 03:25:47PM +0100, Jan Kiszka wrote:
On 2013-03-04 15:15, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 03:09:51PM +0100, Jan
On Mon, Mar 04, 2013 at 08:23:52PM +0100, Jan Kiszka wrote:
On 2013-03-04 19:39, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 07:08:08PM +0100, Jan Kiszka wrote:
On 2013-03-04 18:56, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 03:25:47PM +0100, Jan Kiszka wrote:
On 2013-03-04 15:15, Gleb
On 2013-03-04 21:00, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 08:37:38PM +0100, Jan Kiszka wrote:
On 2013-03-04 20:33, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 08:23:52PM +0100, Jan Kiszka wrote:
On 2013-03-04 19:39, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 07:08:08PM +0100, Jan
On Mon, Mar 04, 2013 at 09:12:25PM +0100, Jan Kiszka wrote:
On 2013-03-04 21:00, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 08:37:38PM +0100, Jan Kiszka wrote:
On 2013-03-04 20:33, Gleb Natapov wrote:
On Mon, Mar 04, 2013 at 08:23:52PM +0100, Jan Kiszka wrote:
On 2013-03-04 19:39, Gleb
On 2013-03-04 15:28, Paolo Bonzini wrote:
Il 03/03/2013 21:21, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
A VCPU sending INIT or SIPI to some other VCPU races for setting the
remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
was overwritten by
On 2013-03-04 22:41, Jan Kiszka wrote:
From: Jan Kiszka jan.kis...@siemens.com
A VCPU sending INIT or SIPI to some other VCPU races for setting the
remote VCPU's mp_state. When we were unlucky, KVM_MP_STATE_INIT_RECEIVED
was overwritten by kvm_emulate_halt and, thus, got lost.
Fix this by
On Thu, Feb 28, 2013 at 05:24:33PM +0200, Michael S. Tsirkin wrote:
OK we talked about this a while ago, here's
a summary and some proposals:
At the moment, virtio PCI uses IO BARs for all accesses.
The reason for IO use is the cost of different VM exit types
of transactions and their
On Thu, Feb 28, 2013 at 12:33:21PM +0100, Cornelia Huck wrote:
Enable ioeventfd support on s390 and hook up diagnose 500 virtio-ccw
notifications.
Signed-off-by: Cornelia Huck cornelia.h...@de.ibm.com
---
arch/s390/kvm/Kconfig| 1 +
arch/s390/kvm/Makefile | 2 +-
于 2013年02月27日 22:08, Gleb Natapov 写道:
On Wed, Feb 27, 2013 at 11:33:25AM +0800, Chen Gang wrote:
irp-irq is __u32 which is never 0.
Signed-off-by: Chen Gang gang.c...@asianux.com
Applied, thanks.
thank you, too.
:-)
--
Chen Gang
Asianux Corporation
--
To unsubscribe from
On 03/04/2013 04:20:47 PM, Alexander Graf wrote:
Howdy,
We just sat down to discuss the proposed XICS and MPIC interfaces and
how we can take bits of each and create an interface that works for
everyone. In this, it feels like we came to some conclusions. Some of
which we already reached
The Buildbot has detected a new failure on builder default_x86_64_out_of_tree
while building qemu-kvm.
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The Buildbot has detected a new failure on builder default_i386_out_of_tree
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Buildslave for this
On Mon, Mar 04, 2013 at 10:30:48AM +0100, Paolo Bonzini wrote:
Il 28/02/2013 13:13, Hu Tao ha scritto:
This patch enables preservation of cpu runstate during save/load vm.
So when a vm is restored from snapshot, the cpu runstate is restored,
too.
I don't think this feature is worth
The Buildbot has detected a new failure on builder disable_kvm_i386_out_of_tree
while building qemu-kvm.
Full details are available at:
http://buildbot.b1-systems.de/qemu-kvm/builders/disable_kvm_i386_out_of_tree/builds/1431
Buildbot URL: http://buildbot.b1-systems.de/qemu-kvm/
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The Buildbot has detected a new failure on builder
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Buildbot URL: http://buildbot.b1-systems.de/qemu-kvm/
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The Buildbot has detected a new failure on builder
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Full details are available at:
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The Buildbot has detected a new failure on builder disable_kvm_i386_debian_5_0
while building qemu-kvm.
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Buildslave for
On Mon, Mar 04, 2013 at 10:40:15AM +0100, Paolo Bonzini wrote:
Il 28/02/2013 13:13, Hu Tao ha scritto:
The guest will be in this state when it is panicked.
Signed-off-by: Wen Congyang we...@cn.fujitsu.com
Signed-off-by: Hu Tao hu...@cn.fujitsu.com
---
migration.c | 1 +
In order to be able to correctly profile what is happening on the
host, we need to be able to identify when we're running on the guest,
and log these events differently.
Perf offers a simple way to register callbacks into KVM. Mimic what
x86 does and enjoy being able to profile your KVM host.
v8 is capable of invalidating Stage-2 by IPA, but v7 is not.
Change kvm_tlb_flush_vmid() to take an IPA parameter, which is
then ignored by the invalidation code (and nuke the whole TLB
as it always did).
This allows v8 to implement a more optimized strategy.
Signed-off-by: Marc Zyngier
The ARM ARM says that HPFAR reports bits [39:12] of the faulting
IPA, and we need to complement it with the bottom 12 bits of the
faulting VA.
This is always 12 bits, irrespective of the page size. Makes it
clearer in the code.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arm64 cannot represent the kernel VAs in HYP mode, because of the lack
of TTBR1 at EL2. A way to cope with this situation is to have HYP VAs
to be an offset from the kernel VAs.
Introduce macros to convert a kernel VA to a HYP VA, make the HYP
mapping functions use these conversion macros. Also
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_vgic.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/include/asm/kvm_vgic.h b/arch/arm/include/asm/kvm_vgic.h
index ab97207..343744e 100644
--- a/arch/arm/include/asm/kvm_vgic.h
+++
Move low level MMU-related operations to kvm_mmu.h. This makes
the MMU code reusable by the arm64 port.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_mmu.h | 58 ++
arch/arm/kvm/mmu.c | 58
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 15 +++
arch/arm/kvm/mmio.c| 17 +++--
2 files changed, 18 insertions(+), 14 deletions(-)
diff --git a/arch/arm/include/asm/kvm_emulate.h
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 5 +
arch/arm/kvm/mmio.c| 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/kvm_emulate.h
b/arch/arm/include/asm/kvm_emulate.h
index
The exit handler selection code cannot be shared with arm64
(two different modes, more exception classes...).
Move it to a separate file (handle_exit.c).
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_host.h | 3 +
arch/arm/kvm/Makefile | 2 +-
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 6 ++
arch/arm/kvm/arm.c | 3 +--
arch/arm/kvm/coproc.c | 2 +-
arch/arm/kvm/mmio.c| 2 +-
4 files changed, 9 insertions(+), 4 deletions(-)
diff --git
guest.c already contains some target-specific checks. Let's move
kvm_target_cpu() over there so arm.c is mostly target agnostic.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/kvm/arm.c | 17 -
arch/arm/kvm/guest.c | 17 +
2 files changed, 17
Instead of hardcoding the maximum MMIO access to be 4 bytes,
compare it to sizeof(unsigned long), which will do the
right thing on both 32 and 64bit systems.
Same thing for sign extention.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/kvm/mmio.c | 7 ---
1 file changed, 4
__create_hyp_mappings() performs some kind of address validation before
creating the mapping, by verifying that the start address is above
PAGE_OFFSET.
This check is not completely correct for kernel memory (the upper
boundary has to be checked as well so we do not end up with highmem
pages), and
Make the split of the pgd_ptr an implementation specific thing
by moving the init call to an inline function.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_host.h | 19 +++
arch/arm/kvm/arm.c | 12 +---
2 files changed, 20
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 5 +
arch/arm/kvm/mmu.c | 8 +++-
2 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/arm/include/asm/kvm_emulate.h
b/arch/arm/include/asm/kvm_emulate.h
index
This patch series is reworking KVM/arm in order to prepare the code
to be shared with the upcoming KVM/arm64.
Nothing major here, just a lot of accessors, small cleanups and fixes
to make the code useable on arm64.
This code has been tested on VE-TC2 and arm64 models. As always,
comments are
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 5 +
arch/arm/kvm/mmio.c| 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/kvm_emulate.h
b/arch/arm/include/asm/kvm_emulate.h
index
Since the arm64 code doesn't have a global asm/idmap.h file, move
the inclusion to asm/kvm_mmu.h.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_mmu.h | 1 +
arch/arm/kvm/mmu.c | 1 -
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git
Instead of trying to free everything from PAGE_OFFSET to the
top of memory, use the virt_addr_valid macro to check the
upper limit.
Also do the same for the vmalloc region where the IO mappings
are allocated.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/kvm/mmu.c | 44
This is really hardware emulation, and as such it better be with
its little friends.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 1 +
arch/arm/kvm/arm.c | 45 --
arch/arm/kvm/emulate.c
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 5 +
arch/arm/kvm/mmio.c| 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/kvm_emulate.h
b/arch/arm/include/asm/kvm_emulate.h
index
On 32bit ARM, unsigned long is guaranteed to be a 32bit quantity.
On 64bit ARM, it is a 64bit quantity.
In order to be able to share code between the two architectures,
convert the registers to be unsigned long, so the core code can
be oblivious of the change.
Signed-off-by: Marc Zyngier
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/include/asm/kvm_emulate.h | 5 +
arch/arm/kvm/mmio.c| 2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/kvm_emulate.h
b/arch/arm/include/asm/kvm_emulate.h
index
On Thu, Feb 28, 2013 at 02:23:42PM +0100, Jan Kiszka wrote:
On 2013-02-28 13:13, Hu Tao wrote:
From: Wen Congyang we...@cn.fujitsu.com
The guest should run after resetting it, but it does not run if its
old state is RUN_STATE_INTERNAL_ERROR or RUN_STATE_PAUSED.
We don't set runstate
On Mon, Mar 04, 2013 at 10:32:17AM +0100, Paolo Bonzini wrote:
Il 28/02/2013 13:13, Hu Tao ha scritto:
From: Wen Congyang we...@cn.fujitsu.com
The guest should run after resetting it, but it does not run if its
old state is RUN_STATE_INTERNAL_ERROR or RUN_STATE_PAUSED.
We don't set
Add HYP and S2 page flags, for both normal and device memory.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/pgtable-hwdef.h | 13 +
arch/arm64/include/asm/pgtable.h | 13 +
arch/arm64/mm/mmu.c| 6 +-
3 files
This series contains the implementation of KVM for arm64. It depends
on the pre-arm64 rework series I posted earlier, as well as on the
tiny perf patch sent just after.
The code is unsurprisingly extremely similar to the KVM/arm code, and
a lot of it is actually shared with the 32bit version.
Add the necessary infrastructure for identity-mapped HYP page
tables. Idmap-ed code must be in the .hyp.idmap.text linker
section.
The rest of the HYP ends up in .hyp.text.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kernel/vmlinux.lds.S | 10 +++
arch/arm64/kvm/idmap.c
Define all the useful bitfields for EL2 registers.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_arm.h | 243 +++
1 file changed, 243 insertions(+)
create mode 100644 arch/arm64/include/asm/kvm_arm.h
diff --git
Implements helpers for dealing with the EL2 syndrome register as
well as accessing the vcpu registers.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_emulate.h | 159 +++
1 file changed, 159 insertions(+)
create mode 100644
Implement the injection of a fault (undefined, data abort or
prefetch abort) into a 64bit guest.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kvm/inject_fault.c | 117 ++
1 file changed, 117 insertions(+)
create mode 100644
Provide 64bit system register handling, modeled after the cp15
handling for ARM.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_coproc.h | 51 ++
arch/arm64/include/uapi/asm/kvm.h | 56 +++
arch/arm64/kvm/sys_regs.c | 962
Provide the kvm.h file that defines the user space visible
interface.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/uapi/asm/kvm.h | 112 ++
1 file changed, 112 insertions(+)
create mode 100644 arch/arm64/include/uapi/asm/kvm.h
diff
Define the 32bit specific registers (SPSRs, cp15...).
Most CPU registers are directly mapped to a 64bit register
(r0-x0...). Only the SPSRs have separate registers.
cp15 registers are also mapped into their 64bit counterpart in most
cases.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/Kconfig | 2 ++
arch/arm64/Makefile | 2 +-
arch/arm64/kvm/Kconfig | 59 +
arch/arm64/kvm/Makefile | 18 +++
4 files changed, 80 insertions(+), 1 deletion(-)
Wire the PSCI backend into the exit handling code.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_host.h | 2 +-
arch/arm64/include/asm/kvm_psci.h | 23 +++
arch/arm64/include/uapi/asm/kvm.h | 16
arch/arm64/kvm/handle_exit.c
Shouldn't be needed - a complete duplicate from arch/arm.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_vgic.h | 156 ++
1 file changed, 156 insertions(+)
create mode 100644 arch/arm64/include/asm/kvm_vgic.h
diff --git
Define the necessary structures to perform an MMIO access.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_mmio.h | 59 +++
1 file changed, 59 insertions(+)
create mode 100644 arch/arm64/include/asm/kvm_mmio.h
diff --git
The HYP mode world switch in all its glory.
Implements save/restore of host/guest registers, EL2 trapping,
IPA resolution, and additional services (tlb invalidation).
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kernel/asm-offsets.c | 33 ++
arch/arm64/kvm/hyp.S|
Add the support code for Cortex-A57 specific system registers.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kvm/sys_regs_a57.c | 96 +++
1 file changed, 96 insertions(+)
create mode 100644 arch/arm64/kvm/sys_regs_a57.c
diff --git
Provide the architecture dependent structures for VM and
vcpu abstractions.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_host.h | 178 ++
1 file changed, 178 insertions(+)
create mode 100644 arch/arm64/include/asm/kvm_host.h
Let userspace play with the guest registers.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kvm/guest.c | 240 +
1 file changed, 240 insertions(+)
create mode 100644 arch/arm64/kvm/guest.c
diff --git a/arch/arm64/kvm/guest.c
Shouldn't be needed - a complete duplicate from arch/arm.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm/kvm/arch_timer.c | 1 +
arch/arm64/include/asm/kvm_arch_timer.h | 58 +
2 files changed, 59 insertions(+)
create mode 100644
As conditionnal instructions can trap on AArch32, add the thinest
possible emulation layer to keep 32bit guests happy.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_emulate.h | 13 ++-
arch/arm64/kvm/Makefile | 2 +-
arch/arm64/kvm/emulate.c
Provide the necessary infrastructure to trap coprocessor accesses that
occur when running 32bit guests.
Also wire SMC and HVC trapped in 32bit mode while were at it.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/include/asm/kvm_coproc.h | 5 ++
arch/arm64/kvm/handle_exit.c
Enable handling of 32bit coprocessor traps for Cortex-A57.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kvm/sys_regs_a57.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/kvm/sys_regs_a57.c b/arch/arm64/kvm/sys_regs_a57.c
index
Allow registers specific to 32bit guests to be saved/restored
during the world switch.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kvm/hyp.S | 70
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/kvm/hyp.S
Add fault injection capability for 32bit guests.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
arch/arm64/kvm/inject_fault.c | 79 ++-
1 file changed, 78 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kvm/inject_fault.c
Wire the init of a 32bit vcpu by allowing 32bit modes in pstate,
and providing sensible defaults out of reset state.
This feature is of course conditionned by the presence of 32bit
capability on the physical CPU.
Signed-off-by: Marc Zyngier marc.zyng...@arm.com
---
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