Re: [PATCH RFC V9 0/19] Paravirtualized ticket spinlocks

On 06/03/2013 11:51 AM, Raghavendra K T wrote: On 06/03/2013 07:10 AM, Raghavendra K T wrote: On 06/02/2013 09:50 PM, Jiannan Ouyang wrote: On Sun, Jun 2, 2013 at 1:07 AM, Gleb Natapov g...@redhat.com wrote: High level question here. We have a big hope for Preemptable Ticket Spinlock patch

[PATCH] get 2% or more performance improved by reducing spin_lock race

the wake_up_process func is included by spin_lock/unlock in vhost_work_queue, but it could be done outside the spin_lock. I have test it with kernel 3.0.27 and guest suse11-sp2 using iperf, the num as below. orignal modified thread_num tp(Gbps) vhost(%) |

Re: [patch 2/2] tools: lkvm - Filter out cpu vendor string

On Thu, Jun 6, 2013 at 8:03 PM, Pekka Enberg penb...@kernel.org wrote: On Tue, May 28, 2013 at 2:49 PM, Cyrill Gorcunov gorcu...@openvz.org wrote: If cpuvendor string is not filetered in case of host amd machine we get unhandled msr reads | [1709265.368464] kvm: 25706: cpu6 unhandled rdmsr:

Re: [PATCH RFC] virtio-pci: new config layout: using memory BAR

On 6 June 2013 15:59, Anthony Liguori aligu...@us.ibm.com wrote: We would still use virtio-pci for existing devices. Only new devices would use virtio-pcie. Surely you'd want to support both for any new device, because (a) transport is orthogonal to backend functionality (b) not all existing

Re: [PATCH] get 2% or more performance improved by reducing spin_lock race

On 06/07/2013 03:31 PM, Qinchuanyu wrote: the wake_up_process func is included by spin_lock/unlock in vhost_work_queue, but it could be done outside the spin_lock. I have test it with kernel 3.0.27 and guest suse11-sp2 using iperf, the num as below. orignal

[PATCH v3 5/6] KVM: MMU: add tracepoint for check_mmio_spte

It is useful for debug mmio spte invalidation Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com --- arch/x86/kvm/mmu.c | 9 +++-- arch/x86/kvm/mmutrace.h | 24 2 files changed, 31 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/mmu.c

[PATCH v3 1/6] KVM: MMU: retain more available bits on mmio spte

Let mmio spte only use bit62 and bit63 on upper 32 bits, then bit 52 ~ bit 61 can be used for other purposes Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com --- arch/x86/kvm/vmx.c | 4 ++-- arch/x86/kvm/x86.c | 8 +++- 2 files changed, 9 insertions(+), 3 deletions(-) diff

[PATCH v3 6/6] KVM: MMU: init kvm generation close to mmio wrap-around value

Then it has the chance to trigger mmio generation number wrap-around Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com --- arch/x86/kvm/mmu.c | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 1fd2c05..7d50a2d

[PATCH v3 4/6] KVM: MMU: fast invalidate all mmio sptes

This patch tries to introduce a very simple and scale way to invalidate all mmio sptes - it need not walk any shadow pages and hold mmu-lock KVM maintains a global mmio valid generation-number which is stored in kvm-memslots.generation and every mmio spte stores the current global

[PATCH v3 2/6] KVM: MMU: store generation-number into mmio spte

Store the generation-number into bit3 ~ bit11 and bit52 ~ bit61, totally 19 bits can be used, it should be enough for nearly all most common cases In this patch, the generation-number is always 0, it will be changed in the later patch Signed-off-by: Xiao Guangrong

[PATCH v3 3/6] KVM: MMU: make return value of mmio page fault handler more readable

Define some meaningful names instead of raw code Signed-off-by: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com --- arch/x86/kvm/mmu.c | 15 +-- arch/x86/kvm/mmu.h | 14 ++ arch/x86/kvm/vmx.c | 4 ++-- 3 files changed, 21 insertions(+), 12 deletions(-) diff --git

[PATCH v3 0/6] KVM: MMU: fast invalidate all mmio sptes

Changelog: V3: All of these changes are from Gleb's review: 1) rename RET_MMIO_PF_EMU to RET_MMIO_PF_EMULATE. 2) smartly adjust kvm generation number in kvm_current_mmio_generatio() to avoid kvm_memslots-generation overflow. V2: - rename kvm_mmu_invalid_mmio_spte to

[PATCH RFC 0/2] KVM: s390: virtio-ccw adapter interrupts.

Hi, here's the guest driver support for adapter interrupts in virtio-ccw. We use one summary indicator per page of indicators. For each device, we try to find a space in an indicator where all of its virtqueues fit. Locking probably needs some more love, but it seems to work fine so far.

[PATCH RFC] s390/virtio-ccw: Adapter interrupt support.

Handle the new CCW_CMD_SET_IND_ADAPTER command enabling adapter interrupts on guest request. When active, host-guest notifications will be handled via global_indicator - queue indicators instead of queue indicators + subchannel I/O interrupt. Indicators for virtqueues may be present at an offset.

[PATCH RFC] virtio-ccw: Document adapter interrupts.

Signed-off-by: Cornelia Huck cornelia.h...@de.ibm.com --- virtio-spec.lyx | 147 +-- 1 file changed, 144 insertions(+), 3 deletions(-) diff --git a/virtio-spec.lyx b/virtio-spec.lyx index 6e188d0..697351e 100644 --- a/virtio-spec.lyx +++

[PATCH RFC] qemu: Adapter interrupts for virtio-ccw.

Hi, here's the qemu patch that implements the new adapter indicators ccw in virtio-ccw and injects adapter interrupts for the devices enabled for it. Cornelia Huck (1): s390/virtio-ccw: Adapter interrupt support. hw/s390x/css.c| 10 hw/s390x/css.h|2 ++

[PATCH RFC 2/2] KVM: s390: virtio-ccw adapter interrupt support.

Implement the new CCW_CMD_SET_IND_ADAPTER command and try to enable adapter interrupts for every device on the first startup. If the host does not support adapter interrupts, fall back to normal I/O interrupts. virtio-ccw adapter interrupts use the same isc as normal I/O subchannels and share a

[PATCH RFC] Adapter interrupts for virtio-ccw.

Hi, here's a proposal to support adapter (aka thin) interrupts for virtio-ccw. The basic idea is to make host-guest signalling on s390 more lightweight. Normal I/O interrupts have two parts: an interrupt that is made pending on any of the guest cpus, and status that is made pending on the

[PATCH RFC 1/2] KVM: s390: virtio-ccw: Handle command rejects.

A command reject for a ccw may happen if we run on a host not supporting a certain feature. We want to be able to handle this as special case of command failure, so let's split this off from the generic -EIO error code. Signed-off-by: Cornelia Huck cornelia.h...@de.ibm.com ---

[PATCH] vhost: wake up worker outside spin_lock

the wake_up_process func is included by spin_lock/unlock in vhost_work_queue, but it could be done outside the spin_lock. I have test it with kernel 3.0.27 and guest suse11-sp2 using iperf, the num as below. orignal modified thread_num tp(Gbps) vhost(%) |

Re: [patch 2/2] tools: lkvm - Filter out cpu vendor string

On 06/07/2013 11:17 AM, Asias He wrote: Ping! Is there someone out there who has a AMD box they could test this on? I tested it on AMD box. Guest boots with this patch, guest does not boot without it. I am not seeing the msr warning in both cases. That's pretty interesting. Can you please

Re: [patch 2/2] tools: lkvm - Filter out cpu vendor string

On Fri, Jun 07, 2013 at 02:06:40PM +0300, Pekka Enberg wrote: On 06/07/2013 11:17 AM, Asias He wrote: Ping! Is there someone out there who has a AMD box they could test this on? I tested it on AMD box. Guest boots with this patch, guest does not boot without it. I am not seeing the msr

Re: [PATCH] get 2% or more performance improved by reducing spin_lock race

Hello. On 07-06-2013 11:31, Qinchuanyu wrote: the wake_up_process func is included by spin_lock/unlock in vhost_work_queue, but it could be done outside the spin_lock. I have test it with kernel 3.0.27 and guest suse11-sp2 using iperf, the num as below. orignal

Re: [PATCH RFC V9 0/19] Paravirtualized ticket spinlocks

On Fri, 2013-06-07 at 11:45 +0530, Raghavendra K T wrote: On 06/03/2013 11:51 AM, Raghavendra K T wrote: On 06/03/2013 07:10 AM, Raghavendra K T wrote: On 06/02/2013 09:50 PM, Jiannan Ouyang wrote: On Sun, Jun 2, 2013 at 1:07 AM, Gleb Natapov g...@redhat.com wrote: High level question

Re: [patch 2/2] tools: lkvm - Filter out cpu vendor string

On Fri, Jun 07, 2013 at 08:20:33PM +0800, Asias He wrote: On Fri, Jun 07, 2013 at 02:06:40PM +0300, Pekka Enberg wrote: On 06/07/2013 11:17 AM, Asias He wrote: Ping! Is there someone out there who has a AMD box they could test this on? I tested it on AMD box. Guest boots with this

[PATCH] vhost: wake up worker outside spin_lock

the wake_up_process func is included by spin_lock/unlock in vhost_work_queue, but it could be done outside the spin_lock. I have test it with kernel 3.0.27 and guest suse11-sp2 using iperf, the num as below. original modified thread_num tp(Gbps) vhost(%) |

Re: [PATCH] vhost: wake up worker outside spin_lock

On Fri, Jun 7, 2013 at 9:50 PM, Qin Chuanyu qinchua...@huawei.com wrote: the wake_up_process func is included by spin_lock/unlock in vhost_work_queue, but it could be done outside the spin_lock. I have test it with kernel 3.0.27 and guest suse11-sp2 using iperf, the num as below.

[PULL] port of KVM to arm64

Catalin, Will, Please consider pulling the following branch to get the current KVM/arm64 code to be merged in 3.11. Note that this code doesn't get built as it stands, as it depends on other bits and pieces coming from both the main KVM tree and the KVM/ARM tree. Once these dependencies are

[GIT PULL] VFIO fix for v3.10-rc5

Hi Linus, The following changes since commit d683b96b072dc4680fc74964eca77e6a23d1fa6e: Linux 3.10-rc4 (2013-06-02 17:11:17 +0900) are available in the git repository at: git://github.com/awilliam/linux-vfio.git tags/vfio-v3.10-rc5 for you to fetch changes up to

[PATCH 01/31] MIPS: Move allocate_kscratch to cpu-probe.c and make it public.

From: David Daney dda...@caviumnetworks.com Signed-off-by: David Daney dda...@caviumnetworks.com --- arch/mips/include/asm/mipsregs.h | 2 ++ arch/mips/kernel/cpu-probe.c | 29 + arch/mips/mm/tlbex.c | 20 +--- 3 files changed, 32

[PATCH 11/31] MIPS: Rearrange branch.c so it can be used by kvm code.

From: David Daney david.da...@cavium.com Introduce __compute_return_epc_for_insn0() entry point. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/branch.h | 7 + arch/mips/kernel/branch.c | 63 +++--- 2 files changed, 54

[PATCH 12/31] MIPS: Add instruction format information for WAIT, MTC0, MFC0, et al.

From: David Daney david.da...@cavium.com --- arch/mips/include/uapi/asm/inst.h | 23 ++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h index 0f4aec2..133abc1 100644 ---

[PATCH 30/31] mips/kvm: Enable MIPSVZ in Kconfig/Makefile

From: David Daney david.da...@cavium.com Also let CPU_CAVIUM_OCTEON select KVM. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/Kconfig | 1 + arch/mips/kvm/Kconfig | 9 + arch/mips/kvm/Makefile | 1 + 3 files changed, 11 insertions(+) diff --git

[PATCH 27/31] mips/kvm: Gate the use of kvm_local_flush_tlb_all() by KVM_MIPSTE

From: David Daney david.da...@cavium.com Only the trap-and-emulate KVM code needs a Special tlb flusher. All other configurations should use the regular version. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/mmu_context.h | 2 +- 1 file changed, 1 insertion(+), 1

[PATCH 31/31] mips/kvm: Allow for upto 8 KVM vcpus per vm.

From: David Daney david.da...@cavium.com The mipsvz implementation allows for SMP, so let's be able to create all those vcpus. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/kvm_host.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[PATCH 24/31] mips/kvm: Add thread_struct fields used by MIPSVZ hosts.

From: David Daney david.da...@cavium.com ... and their accessors in asm-offsets.c Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/processor.h | 6 ++ arch/mips/kernel/asm-offsets.c| 5 + 2 files changed, 11 insertions(+) diff --git

[PATCH 23/31] mips/kvm: Hook into CP unusable exception handler.

From: David Daney david.da...@cavium.com The MIPS VZ KVM code needs this to be able to manage the FPU. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kernel/traps.c | 8 1 file changed, 8 insertions(+) diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c

[PATCH 26/31] mips/kvm: Split up Kconfig and Makefile definitions in preperation for MIPSVZ.

From: David Daney david.da...@cavium.com Create the symbol KVM_MIPSTE, and use it to select the trap and emulate specific things. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kvm/Kconfig | 14 +- arch/mips/kvm/Makefile | 14 -- 2 files changed, 17

[PATCH 28/31] mips/kvm: Only use KVM_COALESCED_MMIO_PAGE_OFFSET with KVM_MIPSTE

From: David Daney david.da...@cavium.com The forthcoming MIPSVZ code doesn't currently use this, so it must only be enabled for KVM_MIPSTE. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/kvm_host.h | 2 ++ 1 file changed, 2 insertions(+) diff --git

[PATCH 25/31] mips/kvm: Add some asm-offsets constants used by MIPSVZ.

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kernel/asm-offsets.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 37fd9e2..db09376 100644 ---

[PATCH 18/31] mips/kvm: Add pt_regs slots for BadInstr and BadInstrP

From: David Daney david.da...@cavium.com These save the instruction word to be used by MIPSVZ code for instruction emulation. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/ptrace.h | 4 arch/mips/kernel/asm-offsets.c | 4 2 files changed, 8 insertions(+)

[PATCH 19/31] mips/kvm: Add host definitions for MIPS VZ based host.

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/kvm_mips_vz.h | 29 + 1 file changed, 29 insertions(+) create mode 100644 arch/mips/include/asm/kvm_mips_vz.h diff --git

[PATCH 14/31] mips/kvm: Add thread_info flag to indicate operation in MIPS VZ Guest Mode.

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/thread_info.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index 895320e..a7a894a 100644 ---

[PATCH 20/31] mips/kvm: Hook into TLB fault handlers.

From: David Daney david.da...@cavium.com If the CPU is operating in guest mode when a TLB related excpetion occurs, give KVM a chance to do emulation. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/mm/fault.c | 8 arch/mips/mm/tlbex-fault.S | 6 ++ 2 files

[PATCH 21/31] mips/kvm: Allow set_except_vector() to be used from MIPSVZ code.

From: David Daney david.da...@cavium.com We need to move it out of __init so we don't have section mismatch problems. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/uasm.h | 2 +- arch/mips/kernel/traps.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-)

[PATCH 22/31] mips/kvm: Split get_new_mmu_context into two parts.

From: David Daney david.da...@cavium.com The new function (part) get_new_asid() can now be used from MIPSVZ code. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/mmu_context.h | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git

[PATCH 17/31] MIPS: Quit exposing Kconfig symbols in uapi headers.

From: David Daney david.da...@cavium.com The kernel's struct pt_regs has many fields conditional on various Kconfig variables, we cannot be exporting this garbage to user-space. Move the kernel's definition to asm/ptrace.h, and put a uapi only version in uapi/asm/ptrace.h gated by #ifndef

[PATCH 13/31] mips/kvm: Add accessors for MIPS VZ registers.

From: David Daney david.da...@cavium.com There are accessors for both the guest control registers as well as guest CP0 context. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/mipsregs.h | 260 +++ 1 file changed, 260 insertions(+)

[PATCH 15/31] mips/kvm: Exception handling to leave and reenter guest mode.

From: David Daney david.da...@cavium.com Currently this is a little complex, here are the facts about how it works: o When running in Guest mode we set the high bit of CP0_XCONTEXT. If this bit is clear, we don't do anything special on an exception. o If we are in guest mode, upon an

[PATCH 16/31] mips/kvm: Add exception handler for MIPSVZ Guest exceptions.

From: David Daney david.da...@cavium.com Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kernel/genex.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S index 163e299..ce0be96 100644 --- a/arch/mips/kernel/genex.S +++

[PATCH 07/31] mips/kvm: Rename VCPU_registername to KVM_VCPU_ARCH_registername

From: David Daney david.da...@cavium.com This makes it follow the pattern where the structure name is the symbol name prefix. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kernel/asm-offsets.c | 68 +++--- arch/mips/kvm/kvm_locore.S | 206

[PATCH 10/31] mips/kvm: Implement ioctls to get and set FPU registers.

From: David Daney david.da...@cavium.com The current implementation does nothing with them, but future MIPSVZ work need them. Also add the asm-offsets accessors for the fields. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/kvm_host.h | 8

[PATCH 08/31] mips/kvm: Fix code formatting in arch/mips/kvm/kvm_locore.S

From: David Daney david.da...@cavium.com It was a completely inconsistent mix of spaces and tabs. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kvm/kvm_locore.S | 921 +++-- 1 file changed, 464 insertions(+), 457 deletions(-) diff --git

[PATCH 06/31] mips/kvm: Rename kvm_vcpu_arch.pc to kvm_vcpu_arch.epc

From: David Daney david.da...@cavium.com The proper MIPS name for this register is EPC, so use that. Change the asm-offsets name to KVM_VCPU_ARCH_EPC, so that the symbol name prefix matches the structure name. Signed-off-by: David Daney david.da...@cavium.com ---

[PATCH 04/31] mips/kvm: Add casts to avoid pointer width mismatch build failures.

From: David Daney david.da...@cavium.com When building for 64-bits we need these cases to make it build. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kvm/kvm_mips.c | 4 ++-- arch/mips/kvm/kvm_mips_dyntrans.c | 4 ++-- arch/mips/kvm/kvm_mips_emul.c | 2 +-

[PATCH 02/31] MIPS: Save and restore K0/K1 when CONFIG_KVM_MIPSVZ

From: David Daney david.da...@cavium.com We cannot clobber any registers on exceptions as any guest will need them all. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/include/asm/mipsregs.h | 2 ++ arch/mips/include/asm/stackframe.h | 15 +++

[PATCH 03/31] mips/kvm: Fix 32-bitisms in kvm_locore.S

From: David Daney david.da...@cavium.com For a warning free compile, we need to use the width aware PTR_LI and PTR_LA macros. Use LI variant for immediate data and LA variant for addresses. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/kvm/kvm_locore.S | 8 1 file

[PATCH 05/31] mips/kvm: Use generic cache flushing functions.

From: David Daney david.da...@cavium.com We don't know if we have the r4k specific functions available, so use universally available __flush_cache_all() instead. This takes longer as it flushes both i-cache and d-cache, but is available for all CPUs. Signed-off-by: David Daney

Re: [PATCH 00/31] KVM/MIPS: Implement hardware virtualization via the MIPS-VZ extensions.

I should also add that I will shortly send patches for the kvm tool required to drive this VM as well as a small set of patches that create a para-virtualized MIPS/Linux guest kernel. The idea is that because there is no standard SMP linux system, we create a standard para-virtualized system

[PATCH 00/31] KVM/MIPS: Implement hardware virtualization via the MIPS-VZ extensions.

From: David Daney david.da...@cavium.com These patches take a somewhat different approach to MIPS virtualization via the MIPS-VZ extensions than the patches previously sent by Sanjay Lal. Several facts about the code: o Existing exception handlers are modified to hook in to KVM instead of

Re: [PATCH 20/31] mips/kvm: Hook into TLB fault handlers.

Hello. On 06/08/2013 03:03 AM, David Daney wrote: From: David Daney david.da...@cavium.com If the CPU is operating in guest mode when a TLB related excpetion occurs, give KVM a chance to do emulation. Signed-off-by: David Daney david.da...@cavium.com --- arch/mips/mm/fault.c | 8

Re: [PATCH RFC V9 0/19] Paravirtualized ticket spinlocks

Raghu, thanks for you input. I'm more than glad to work together with you to make this idea work better. -Jiannan On Thu, Jun 6, 2013 at 11:15 PM, Raghavendra K T raghavendra...@linux.vnet.ibm.com wrote: On 06/03/2013 11:51 AM, Raghavendra K T wrote: On 06/03/2013 07:10 AM, Raghavendra K T

Re: [PATCH 20/31] mips/kvm: Hook into TLB fault handlers.

On 06/07/2013 04:34 PM, Sergei Shtylyov wrote: Hello. On 06/08/2013 03:03 AM, David Daney wrote: From: David Daney david.da...@cavium.com If the CPU is operating in guest mode when a TLB related excpetion occurs, give KVM a chance to do emulation. Signed-off-by: David Daney

[PATCH] kvmclock: clock should count only if vm is running

kvmclock should not count while vm is paused, because: 1) if the vm is paused for long periods, timekeeping math can overflow while converting the (large) clocksource delta to nanoseconds. 2) Users rely on CLOCK_MONOTONIC to count run time, that is, time which OS has been in a runnable state

[PATCH] KVM: x86: fix missed memory synchronization when patch hypercall

From: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com Currently, memory synchronization is missed in emulator_fix_hypercall, please see the commit 758ccc89b83 (KVM: x86: drop calling kvm_mmu_zap_all in emulator_fix_hypercall) This patch fixes it by introducing kvm_vcpus_hang_on_page_start() and