According to SPC-4, section 4.5.2.1, 252 is the limit of sense data. So
increase the values.
Tested by hacking QEMU to fake virtio-scsi request sense len to 252.
Without this patch the driver stops working immediately when it gets the
request.
Signed-off-by: Fam Zheng f...@redhat.com
---
On Fri, 03/14 02:00, Shivaramakrishnan Vaidyanathan wrote:
Hello Fam,
Thanks a lot to your reply.
I think I needed to bit more clear in my explanation.
Here is my requirement:
At first,I have a guest vm with its virtual disk performing no storage
intrusion detection running on top of kvm
Hello Fam,
Thanks a lot to your reply.
I think I needed to bit more clear in my explanation.
Here is my requirement:
At first,I have a guest vm with its virtual disk performing no storage
intrusion detection running on top of kvm hypervisor.
Then later I create this new VM app that
Yes,I am using QEMU as device virtualizer.
Is there any suggestion that you could give to achieve it?
--
Shiva
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On 03/14/2014 07:00 AM, Fam Zheng wrote:
According to SPC-4, section 4.5.2.1, 252 is the limit of sense data. So
increase the values.
Tested by hacking QEMU to fake virtio-scsi request sense len to 252.
Without this patch the driver stops working immediately when it gets the
request.
Il 14/03/2014 09:30, Peter Zijlstra ha scritto:
Take the situation of 3 (v)CPUs where cpu0 holds the lock but is
preempted. cpu1 queues, cpu2 queues. Then cpu1 gets preempted, after
which cpu0 gets back online.
The simple test-and-set lock will now let cpu2 acquire. Your queue
however will just
Hi Andreas,
On 13/03/14 21:28, Andreas Färber wrote:
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
new file mode 100644
index 000..0ec343d
--- /dev/null
+++ b/target-mips/kvm.c
[...]
+static inline int kvm_mips_put_one_reg(CPUState *cs, int reg_id, int32
*addr)
Did you mean
On 13/03/14 22:35, Peter Maydell wrote:
On 13 March 2014 21:28, Andreas Färber afaer...@suse.de wrote:
I'm not sure if we have a policy about __u64 etc. in KVM code. Since
it'll be Linux-only I don't see problems currently; for cross-platform
parts we prefer uint64_t. Suggest to leave as is
Il 13/03/2014 20:49, Waiman Long ha scritto:
On 03/13/2014 09:57 AM, Paolo Bonzini wrote:
Il 13/03/2014 12:21, David Vrabel ha scritto:
On 12/03/14 18:54, Waiman Long wrote:
This patch adds para-virtualization support to the queue spinlock in
the same way as was done in the PV ticket lock
Il 13/03/2014 18:08, Radim Krčmář ha scritto:
I agree that old code is wrong and the patch looks correct, but I only
see how the bug may cause pending IRR to not be delivered in time,
not how interrupt can disrupt a higher priority task.
Right. Also, on SMP guests the effect would likely
I have proposal for you.
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2014-03-07 1:59 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
On Tue, Mar 04, 2014 at 09:13:40AM +0100, Paolo Bonzini wrote:
Il 04/03/2014 03:40, Ian Pilcher ha scritto:
Is this a known problem? I just tried using nested vmx for the first
time since upgrading my system from F19 (3.12.?? at
On Fri, Mar 14, 2014 at 03:52:03PM +0400, Vasiliy Tolstov wrote:
If i use 3.13.6 kernel that have alredy this patch, but sometimes i
get kernel panic, what can i do?
P.S. I'm using nested virt, fault from L2
It could be there is another, less frequent, bug in nested KVM.
I'm assuming this is
2014-03-14 15:58 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
It could be there is another, less frequent, bug in nested KVM.
I'm assuming this is on Intel hardware?
From the libguestfs point of view what you can do is to force TCG:
export LIBGUESTFS_BACKEND_SETTINGS=force_tcg
On Fri, Mar 14, 2014 at 04:11:13PM +0400, Vasiliy Tolstov wrote:
2014-03-14 15:58 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
It could be there is another, less frequent, bug in nested KVM.
I'm assuming this is on Intel hardware?
From the libguestfs point of view what you can do is to
2014-03-14 16:16 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
You can set the VM domain type=qemu. Of course it'll run quite
slowly.
is that possible to debug this issue ? How can i help?
Complete logs from the guest.
Any messages from qemu or the host.
put all of that into a full bug
On Fri, Mar 14, 2014 at 04:39:48PM +0400, Vasiliy Tolstov wrote:
2014-03-14 16:16 GMT+04:00 Richard W.M. Jones rjo...@redhat.com:
You can set the VM domain type=qemu. Of course it'll run quite
slowly.
is that possible to debug this issue ? How can i help?
Complete logs from the
From: Sanjay Lal sanj...@kymasys.com
Compare/Count timer interrupts are handled in-kernel for KVM, so don't
bother starting it in QEMU.
Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
Changes in
From: Sanjay Lal sanj...@kymasys.com
COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via
ioctls.
Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
Reviewed-by: Andreas Färber
From: Sanjay Lal sanj...@kymasys.com
Enable KVM support for MIPS in the build system.
Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
Changes in v2:
- Expand commit message
- Remove GIC code
-
I'd like to have this squeezed into 2.0 (if at all possible), so any
final review from KVM people would be much appreciated.
Thanks to everybody who has already taken part in review.
This patchset implements KVM support for MIPS32 processors, using Trap
Emulation.
In KVM mode, CPU
Add preprocessor definitions for 32bit segment bases for use in
get_physical_address(). These will also be taken advantage of in the
next patch which adds KVM awareness.
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
---
target-mips/helper.c |
MIPS/Linux is unusual in having 128 signals rather than just 64 like
most other architectures. This means its sigmask is 16 bytes instead of
8, so allow arches to override the sigmask-len value passed to the
KVM_SET_SIGNAL_MASK ioctl in kvm_set_signal_mask() by calling
kvm_set_sigmask_len() from
In KVM mode the bootrom is loaded and executed from the last 1MB of
DRAM.
Based on [PATCH 12/12] KVM/MIPS: General KVM support and support for
SMP Guests by Sanjay Lal sanj...@kymasys.com.
Signed-off-by: James Hogan james.ho...@imgtec.com
Reviewed-by: Aurelien Jarno aurel...@aurel32.net
Cc:
From: Sanjay Lal sanj...@kymasys.com
Implement the main KVM arch API for MIPS.
Signed-off-by: Sanjay Lal sanj...@kymasys.com
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Aurelien Jarno aurel...@aurel32.net
Cc: Gleb Natapov g...@redhat.com
Cc: Paolo Bonzini pbonz...@redhat.com
Cc:
From: Sanjay Lal sanj...@kymasys.com
Add APIs for converting between KVM guest KSEG0 addresses and guest
physical addresses. These will be used for translating addresses when
loading a kernel ELF in KVM mode.
In KVM trap and emulate mode both the guest kernel and guest userspace
execute in useg:
Add MAINTAINERS entry for MIPS KVM.
Signed-off-by: James Hogan james.ho...@imgtec.com
---
Changes in v4:
- Add MAINTAINERS entry for MIPS KVM.
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7d17f83..cefe1a1 100644
--- a/MAINTAINERS
+++
MIPS KVM trap emulate mode (which is currently the only supported
mode) has to add an extra kseg0/kseg1 at 0x4000 and an extra
kseg2/kseg3 at 0x6000. Take this into account in
get_physical_address() so that debug memory access works.
This is done by translating the address to a standard
Il 13/03/2014 23:35, Peter Maydell ha scritto:
I'm not sure if we have a policy about __u64 etc. in KVM code. Since
it'll be Linux-only I don't see problems currently; for cross-platform
parts we prefer uint64_t. Suggest to leave as is unless told otherwise.
For ARM I took the view that
Previously a reserved instruction exception while in guest code would
cause a KVM internal error if kvm_mips_handle_ri() didn't recognise the
instruction (including a RDHWR from an unrecognised hardware register).
However the guest OS should really have the opportunity to catch the
exception so
Some misc KVM RI/RDHWR handling fixes.
Patch 1 prevents a reserved instruction (RI) exception from taking out
the entire guest (e.g. crashme inevitably causes lots of these). If the
hypervisor can't handle the RI, it can just emulate a guest RI exception
instead so the guest OS can handle it.
The code to check whether rd MIPS_CP0_DESAVE is dead code, since
MIPS_CP0_DESAVE = 31 and rd is already masked with 0x1f. Remove it.
Signed-off-by: James Hogan james.ho...@imgtec.com
Cc: Ralf Baechle r...@linux-mips.org
Cc: Gleb Natapov g...@kernel.org
Cc: Paolo Bonzini pbonz...@redhat.com
Cc:
The whitespace in asm/kvm_host.h is quite inconsistent in places. Clean
up the whole file to use tabs more consistently.
When you use the --ignore-space-change argument to git diff this patch
only changes line wrapping in TLB_IS_GLOBAL and TLB_IS_VALID macros.
Signed-off-by: James Hogan
The ability to read hardware registers from userland with the RDHWR
instruction should depend upon the corresponding bit of the HWREna
register being set, otherwise a reserved instruction exception should be
generated.
However KVM's current emulation ignores the guest's HWREna and always
emulates
On 14 March 2014 12:47, James Hogan james.ho...@imgtec.com wrote:
I'd like to have this squeezed into 2.0 (if at all possible), so any
final review from KVM people would be much appreciated.
Unfortunately we're already in hardfreeze, which means
bug fixes only at this point. I don't think we
On 14/03/14 13:27, Peter Maydell wrote:
On 14 March 2014 12:47, James Hogan james.ho...@imgtec.com wrote:
I'd like to have this squeezed into 2.0 (if at all possible), so any
final review from KVM people would be much appreciated.
Unfortunately we're already in hardfreeze, which means
bug
On Fri, Mar 14, 2014 at 11:13:29AM +0530, Srivatsa S. Bhat wrote:
On 03/13/2014 04:51 AM, Christoffer Dall wrote:
On Tue, Mar 11, 2014 at 02:05:38AM +0530, Srivatsa S. Bhat wrote:
Subsystems that want to register CPU hotplug callbacks, as well as perform
initialization for the CPUs that are
On Thu, Mar 13, 2014 at 11:26:25AM -0700, Cong Wang wrote:
On Wed, Mar 12, 2014 at 8:15 PM, Luis R. Rodriguez
mcg...@do-not-panic.com wrote:
spin_lock_bh(p-br-lock);
err = br_setport(p, tb);
+ changed =
On Thu, Mar 13, 2014 at 03:16:23PM -0700, Stephen Hemminger wrote:
On Wed, 12 Mar 2014 20:15:27 -0700
Luis R. Rodriguez mcg...@do-not-panic.com wrote:
--- a/net/bridge/br_private.h
+++ b/net/bridge/br_private.h
@@ -150,6 +150,7 @@ struct net_bridge_port
u8
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