On 05/02/2014 11:57 PM, Ulrich Obergfell wrote:
The current implementation of the 'kvm_pio' tracepoint in
emulator_pio_in_out()
only tells us that 'something' has been read from or written to an I/O port.
To
improve the usability of the tracepoint, I propose to include the
value/content
On 03/05/14 22:18, Dan Carpenter wrote:
When copy_from_user() fails, this code returns the number of bytes
remaining instead of a negative error code. The positive number is
returned to the user but otherwise it is harmless.
Signed-off-by: Dan Carpenter dan.carpen...@oracle.com
Thanks.
David,
thanks for the review.
Are you ok with this change as well? The alternative is to shorten our
descriptions (in 1/11 s390: add sie exit reasons tables), which would make the
trace output less comprehensible, though.
Christian
On 25/04/14 11:12, Christian Borntraeger wrote:
From:
On 02/05/14 20:14, David Ahern wrote:
On 5/2/14, 3:16 AM, Jiri Olsa wrote:
[...]
CC-ing David Ahern
I don't have the original emails, but looking at
https://lkml.org/lkml/2014/4/25/331
[PATCH 01/11] s390: add sie exit reasons tables
[PATCH 02/11] KVM: s390: Use trace tables from sie.h
On 25/04/14 11:12, Christian Borntraeger wrote:
+#if defined(__i386__) || defined(__x86_64__)
else if (!strcmp(kvm-report_event, mmio))
kvm-events_ops = mmio_events;
else if (!strcmp(kvm-report_event, ioport))
kvm-events_ops = ioport_events;
+#endif
On 05/05/2014 05:09 AM, Aneesh Kumar K.V wrote:
This patch make sure we inherit the LE bit correctly in different case
so that we can run Little Endian distro in PR mode
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
Thanks, applied to kvm-ppc-queue.
Alex
--
To unsubscribe
On 05/04/2014 06:36 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
When running on a POWER8 host, we get away with running the guest as POWER7
and nothing falls apart.
However, when we start exposing POWER8 as guest CPU, guests will start using
new abilities on POWER8 which
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V3:
* Use make_dsisr instead of checking
On 05/04/2014 07:25 PM, Aneesh Kumar K.V wrote:
We reserve 5% of total ram for CMA allocation and not using that can
result in us running out of numa node memory with specific
configuration. One caveat is we may not have node local hpt with pinned
vcpu configuration. But currently libvirt also
On 05/04/2014 07:26 PM, Aneesh Kumar K.V wrote:
With debug option sleep inside atomic section checking enabled we get
the below WARN_ON during a PR KVM boot. This is because upstream now
have PREEMPT_COUNT enabled even if we have preempt disabled. Fix the
warning by adding preempt_disable/enable
On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
No patch description, no proper explanations anywhere why you're doing
what. All of that in a pretty sensitive piece of code. There's no way
this patch can go upstream in its
On 05/05/2014 03:27 AM, Gavin Shan wrote:
The series of patches intends to support EEH for PCI devices, which have been
passed through to PowerKVM based guest via VFIO. The implementation is
straightforward based on the issues or problems we have to resolve to support
EEH for PowerKVM based
Il 25/04/2014 11:12, Christian Borntraeger ha scritto:
From: Alexander Yarygin yary...@linux.vnet.ibm.com
Currently perf-kvm uses string literals for kvm event names,
but it works only for x86, because other architectures may have
other names for those events.
This patch introduces defines for
When we migrate we ask the kernel about its current belief on what the guest
time would be. However, I've seen cases where the kvmclock guest structure
indicates a time more recent than the kvm returned time.
To make sure we never go backwards, calculate what the guest would have seen
as time at
On Mon, 2014-05-05 at 13:56 +0200, Alexander Graf wrote:
On 05/05/2014 03:27 AM, Gavin Shan wrote:
The series of patches intends to support EEH for PCI devices, which have
been
passed through to PowerKVM based guest via VFIO. The implementation is
straightforward based on the issues or
On 28/04/14 18:39, Paolo Bonzini wrote:
From: Christian Borntraeger borntrae...@de.ibm.com
Given all your work, What about From: Paolo Bonzini pbonz...@redhat.com
plus
Based on an inital patch from Christian Borntraeger
When starting lots of dataplane devices the bootup takes very long on
Il 05/05/2014 16:21, Christian Borntraeger ha scritto:
On 28/04/14 18:39, Paolo Bonzini wrote:
From: Christian Borntraeger borntrae...@de.ibm.com
Given all your work, What about From: Paolo Bonzini pbonz...@redhat.com
plus Based on an inital patch from Christian Borntraeger
No big deal, I
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:25 PM, Aneesh Kumar K.V wrote:
We reserve 5% of total ram for CMA allocation and not using that can
result in us running out of numa node memory with specific
configuration. One caveat is we may not have node local hpt with pinned
vcpu
Alexander Graf ag...@suse.de writes:
On 05/04/2014 06:36 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
When running on a POWER8 host, we get away with running the guest as POWER7
and nothing falls apart.
However, when we start exposing POWER8 as guest CPU, guests will
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these values.
Signed-off-by: Aneesh Kumar K.V
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
No patch description, no proper explanations anywhere why you're doing
what. All of that in a pretty sensitive piece of code. There's no way
On 05/05/2014 04:38 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 06:36 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
When running on a POWER8 host, we get away with running the guest as POWER7
and nothing falls apart.
However, when we
Alexander Graf ag...@suse.de writes:
On 05/05/2014 04:38 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 06:36 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
When running on a POWER8 host, we get away with running the guest as
POWER7
and
Alexander Graf ag...@suse.de writes:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value set on
alignment interrupt. So don't try to compute these
[Now without HTML email -- it's what you get for cc:ing me at work
instead of my upstream email :)]
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Olof Johansson ol...@google.com writes:
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM POWER cpus always had DAR value
2014-05-05 8:03 GMT-07:00 Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com:
Olof Johansson ol...@google.com writes:
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh
Am 05.05.2014 um 16:57 schrieb Olof Johansson ol...@google.com:
[Now without HTML email -- it's what you get for cc:ing me at work
instead of my upstream email :)]
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf
Am 05.05.2014 um 16:50 schrieb Aneesh Kumar K.V
aneesh.ku...@linux.vnet.ibm.com:
Alexander Graf ag...@suse.de writes:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
Although it's optional IBM
Am 05.05.2014 um 16:35 schrieb Aneesh Kumar K.V
aneesh.ku...@linux.vnet.ibm.com:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:25 PM, Aneesh Kumar K.V wrote:
We reserve 5% of total ram for CMA allocation and not using that can
result in us running out of numa node memory with
On 5/5/14, 4:27 AM, Christian Borntraeger wrote:
diff --git a/tools/perf/builtin-kvm.c b/tools/perf/builtin-kvm.c
index 922706c..806c0e4 100644
--- a/tools/perf/builtin-kvm.c
+++ b/tools/perf/builtin-kvm.c
@@ -75,7 +75,7 @@ struct kvm_events_ops {
bool (*is_end_event)(struct perf_evsel
Alexander Graf ag...@suse.de writes:
Am 05.05.2014 um 16:35 schrieb Aneesh Kumar K.V
aneesh.ku...@linux.vnet.ibm.com:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:25 PM, Aneesh Kumar K.V wrote:
We reserve 5% of total ram for CMA allocation and not using that can
result in us
Dear all,
It seems that currently, on UD interception KVM does not exit
completely. Virtualized execution finishes, KVM executes
ud_intercept() after which it enters virtualized execution again.
I am working on accelerating with virtualized execution a simulator
that emulates system calls.
From: Xiao Guangrong xiaoguangr...@linux.vnet.ibm.com
To: Ulrich Obergfell uober...@redhat.com, kvm@vger.kernel.org
Cc: pbonz...@redhat.com
Sent: Monday, May 5, 2014 9:10:19 AM
Subject: Re: [PATCH 0/1] KVM: x86: improve the usability of the 'kvm_pio'
tracepoint
On 05/02/2014 11:57 PM,
On Mon, May 5, 2014 at 8:56 AM, Alexandru Duţu alex.d...@gmail.com wrote:
Dear all,
It seems that currently, on UD interception KVM does not exit
completely. Virtualized execution finishes, KVM executes
ud_intercept() after which it enters virtualized execution again.
Maybe you might want to
W dniu 2014-05-05 15:51, Alexander Graf pisze:
When we migrate we ask the kernel about its current belief on what the guest
time would be. However, I've seen cases where the kvmclock guest structure
indicates a time more recent than the kvm returned time.
Hi,
is it possible to have kvmclock
Am 05.05.2014 um 19:46 schrieb Marcin Gibuła m.gib...@beyond.pl:
W dniu 2014-05-05 15:51, Alexander Graf pisze:
When we migrate we ask the kernel about its current belief on what the guest
time would be. However, I've seen cases where the kvmclock guest structure
indicates a time more
is it possible to have kvmclock jumping forward?
Because I've reproducible case when at about 1 per 20 vm restores, VM freezes
for couple of hours and then resumes with date few hundreds years ahead.
Happens only with kvmclock.
And this patch seems to fix very similar issue so maybe it's all
I'm testing 39bfe90706ab0f588db7cb4d1c0e6d1181e1d2f9. I'm not sure
what's going on here.
voffset.h contains:
#define VO__end 0x8111c7a0
#define VO__end 0x8db9a000
#define VO__text 0x8100
because
$ nm vmlinux|grep ' _end'
8111c7a0 t _end
8db9a000 B
Thank you Jun! I see that in case of VMX does not emulated the
instruction that produced a UD exception, it just queues the exception
and returns 1. After that KVM will still try to enter virtualized
execution and so forth, the execution probably finishing with a DF and
shut down. It does not seem
From: Marcel Apfelbaum marce...@redhat.com
This minimizes QEMUMachine usage, as part of machine QOM-ification.
Signed-off-by: Marcel Apfelbaum marce...@redhat.com
Signed-off-by: Andreas Färber afaer...@suse.de
---
include/hw/boards.h | 3 +--
include/hw/xen/xen.h| 2 +-
On 05/05/2014 11:41 AM, Andy Lutomirski wrote:
I'm testing 39bfe90706ab0f588db7cb4d1c0e6d1181e1d2f9. I'm not sure
what's going on here.
voffset.h contains:
#define VO__end 0x8111c7a0
#define VO__end 0x8db9a000
#define VO__text 0x8100
because
$ nm
Il 02/05/2014 17:57, Ulrich Obergfell ha scritto:
This patch moves the 'kvm_pio' tracepoint to emulator_pio_in_emulated()
and emulator_pio_out_emulated(), and it adds an argument (a pointer to
the 'pio_data'). A single 8-bit or 16-bit or 32-bit data item is fetched
from 'pio_data' (depending on
Am 05.05.14 16:57, schrieb Olof Johansson:
[Now without HTML email -- it's what you get for cc:ing me at work
instead of my upstream email :)]
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On
Hi,
I have one question related to nested EPT page fault.
At the very start, L0 hypervisor launches L2 with an empty EPT0-2
table, building the table on-the-fly.
when one L2 physical page is accessed, ept_page_fault(paging_tmpl.h)
will be called to handle this fault in L0. which will first call
Hi Alexander,
On Mon, May 05, 2014 at 03:51:22PM +0200, Alexander Graf wrote:
When we migrate we ask the kernel about its current belief on what the guest
time would be.
KVM_GET_CLOCK which returns the time in struct kvm_clock_data.
However, I've seen cases where the kvmclock guest
On Mon, May 05, 2014 at 08:26:04PM +0200, Marcin Gibuła wrote:
is it possible to have kvmclock jumping forward?
Because I've reproducible case when at about 1 per 20 vm restores, VM
freezes for couple of hours and then resumes with date few hundreds years
ahead. Happens only with kvmclock.
On Mon, May 05, 2014 at 08:23:43PM -0300, Marcelo Tosatti wrote:
Hi Alexander,
On Mon, May 05, 2014 at 03:51:22PM +0200, Alexander Graf wrote:
When we migrate we ask the kernel about its current belief on what the guest
time would be.
KVM_GET_CLOCK which returns the time in struct
Marcin,
Can you provide detailed instructions on how to reproduce the problem?
Thanks
On Mon, May 05, 2014 at 08:27:10PM -0300, Marcelo Tosatti wrote:
On Mon, May 05, 2014 at 08:26:04PM +0200, Marcin Gibuła wrote:
is it possible to have kvmclock jumping forward?
Because I've
Hi Mario,
On Tue, Apr 29, 2014 at 9:06 AM, Mario Smarduch m.smard...@samsung.com wrote:
This patch adds support for unmapping 2nd stage page tables for addresses 4GB
on ARMv7.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/kvm/mmu.c | 20
1 file
On Wed, Apr 30, 2014 at 1:20 AM, Juan Quintela quint...@redhat.com wrote:
2014-04-29
--
- security (CVE)
New group to handle that issues responsible.
Mail is still not encrypted, wolud be.
mst writing a wiki page about it
what is the criteria to request (not) for a CVE
On Mon, 2014-05-05 at 19:56 +0530, Aneesh Kumar K.V wrote:
Paul mentioned that BOOK3S always had DAR value set on alignment
interrupt. And the patch is to enable/collect correct DAR value when
running with Little Endian PR guest. Now to limit the impact and to
enable Little Endian PR guest,
On Mon, 2014-05-05 at 17:16 +0200, Alexander Graf wrote:
Isn't this a greater problem? We should start swapping before we hit
the point where non movable kernel allocation fails, no?
Possibly but the fact remains, this can be avoided by making sure that
if we create a CMA reserve for KVM, then
On Mon, May 5, 2014 at 11:48 AM, Alexandru Duţu alex.d...@gmail.com wrote:
Thank you Jun! I see that in case of VMX does not emulated the
instruction that produced a UD exception, it just queues the exception
and returns 1. After that KVM will still try to enter virtualized
execution and so
On Mon, 2014-05-05 at 16:43 +0200, Alexander Graf wrote:
Paul mentioned that BOOK3S always had DAR value set on alignment
interrupt. And the patch is to enable/collect correct DAR value when
running with Little Endian PR guest. Now to limit the impact and to
enable Little Endian PR guest,
In the following patches, our adress caching struct that's
embedded within struct x86_emulate_ctxt will need to be
accessed
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/kvm/x86.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kvm/x86.c
On Mon, May 05, 2014 at 01:19:30PM +0200, Alexander Graf wrote:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
+#ifdef CONFIG_PPC_BOOK3S_64
+return vcpu-arch.fault_dar;
How about PA6T and G5s?
G5 sets DAR on an alignment interrupt.
As for PA6T, I don't know for sure, but if it
Insn fetch fastpath function. Not that
arch.walk_mmu-gva_to_gpa can't be used but let's
piggyback on top of interface meant for our purpose
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/kvm/x86.c | 25 +
1 file changed, 17 insertions(+), 8 deletions(-)
diff
My initial attempt at caching gva-gpa-hva translations. Pretty straight
forward with details in the individual patches.
I haven't yet looked into if there are other possibilities
to speed things up, just thought of sending these out since
the numbers are better
567 cycles/emulated jump
On every instruction fetch, kvm_read_guest_virt_helper
does the gva to gpa translation followed by searching for the
memslot. Store the gva hva mapping so that if there's a match
we can directly call __copy_from_user()
Suggested-by: Paolo Bonzini pbonz...@redhat.com
Signed-off-by: Bandan Das
Thank you Jun!
Now I understand that there is a strong need to support this scenario
where the host might run into trouble executing binaries with
instructions unknown to it.
I am still wondering if there is a way to actually exit KVM on UD from
a syscall instruction without modifying the KVM
Hi Gavin,
thanks, didn't catch that, I'll remove these calls.
- Mario
On 05/05/2014 04:34 PM, Gavin Guo wrote:
Hi Mario,
On Tue, Apr 29, 2014 at 9:06 AM, Mario Smarduch m.smard...@samsung.com
wrote:
This patch adds support for unmapping 2nd stage page tables for addresses
4GB
on
On Mon, May 05, 2014 at 08:17:00PM +0530, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
No patch description, no proper explanations anywhere why you're doing
On Mon, May 05, 2014 at 08:00:12AM -0600, Alex Williamson wrote:
On Mon, 2014-05-05 at 13:56 +0200, Alexander Graf wrote:
On 05/05/2014 03:27 AM, Gavin Shan wrote:
The series of patches intends to support EEH for PCI devices, which have
been
passed through to PowerKVM based guest via VFIO.
Am 05.05.14 16:57, schrieb Olof Johansson:
[Now without HTML email -- it's what you get for cc:ing me at work
instead of my upstream email :)]
2014-05-05 7:43 GMT-07:00 Alexander Graf ag...@suse.de:
On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On
On Mon, 2014-05-05 at 19:56 +0530, Aneesh Kumar K.V wrote:
Paul mentioned that BOOK3S always had DAR value set on alignment
interrupt. And the patch is to enable/collect correct DAR value when
running with Little Endian PR guest. Now to limit the impact and to
enable Little Endian PR guest,
On Mon, 2014-05-05 at 16:43 +0200, Alexander Graf wrote:
Paul mentioned that BOOK3S always had DAR value set on alignment
interrupt. And the patch is to enable/collect correct DAR value when
running with Little Endian PR guest. Now to limit the impact and to
enable Little Endian PR guest,
On Mon, May 05, 2014 at 01:19:30PM +0200, Alexander Graf wrote:
On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote:
+#ifdef CONFIG_PPC_BOOK3S_64
+return vcpu-arch.fault_dar;
How about PA6T and G5s?
G5 sets DAR on an alignment interrupt.
As for PA6T, I don't know for sure, but if it
On Mon, May 05, 2014 at 08:17:00PM +0530, Aneesh Kumar K.V wrote:
Alexander Graf ag...@suse.de writes:
On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
No patch description, no proper explanations anywhere why you're doing
On Mon, May 05, 2014 at 08:00:12AM -0600, Alex Williamson wrote:
On Mon, 2014-05-05 at 13:56 +0200, Alexander Graf wrote:
On 05/05/2014 03:27 AM, Gavin Shan wrote:
The series of patches intends to support EEH for PCI devices, which have
been
passed through to PowerKVM based guest via VFIO.
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