Re: [PATCH v3 9/9] kvmtool: virtio: enable arm/arm64 support for bi-endianness

On Wed, May 07 2014 at 10:34:30 am BST, Peter Maydell wrote: > On 6 May 2014 19:38, Peter Maydell wrote: >> On 6 May 2014 18:25, Marc Zyngier wrote: >>> On Tue, May 06 2014 at 3:28:07 pm BST, Will Deacon >>> wrote: On Thu, Apr 24, 2014 at 07:17:23PM +0100, Marc Zyngier wrote: > +

Re: [PATCH v3 9/9] kvmtool: virtio: enable arm/arm64 support for bi-endianness

> Am 07.05.2014 um 11:34 schrieb Peter Maydell : > >> On 6 May 2014 19:38, Peter Maydell wrote: >>> On 6 May 2014 18:25, Marc Zyngier wrote: On Tue, May 06 2014 at 3:28:07 pm BST, Will Deacon wrote: > On Thu, Apr 24, 2014 at 07:17:23PM +0100, Marc Zyngier wrote: > +reg

Re: [PATCH v3 9/9] kvmtool: virtio: enable arm/arm64 support for bi-endianness

On 6 May 2014 19:38, Peter Maydell wrote: > On 6 May 2014 18:25, Marc Zyngier wrote: >> On Tue, May 06 2014 at 3:28:07 pm BST, Will Deacon >> wrote: >>> On Thu, Apr 24, 2014 at 07:17:23PM +0100, Marc Zyngier wrote: +reg.addr = (u64)&data; +if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE

Re: [PATCH 2/2] ARM: KVM: user_mem_abort: support stage 2 MMIO page mapping

Kim, Christoffer, On Tue, May 06 2014 at 7:04:48 pm BST, Christoffer Dall wrote: > On Tue, Mar 25, 2014 at 05:08:14PM -0500, Kim Phillips wrote: >> Use the correct memory type for device MMIO mappings: PAGE_S2_DEVICE. >> >> Signed-off-by: Kim Phillips >> --- >> arch/arm/kvm/mmu.c | 11 ++

Re: KVM Nested L2 guest startup problems

Il 04/05/2014 18:33, Hu Yaohui ha scritto: I experienced a similar problem that was related to nested code having some bugs related to apicv and other new vmx features. For example, the code enabled posted interrupts to run L2 even when the feature was not exposed to L1 and L1 didn't use it. Tr

Re: [RFC PATCH 3/4] KVM: emulate: avoid per-byte copying in instruction fetches

Il 07/05/2014 06:36, Bandan Das ha scritto: > + _x = *(_type __aligned(1) *) &_fc->data[ctxt->_eip - _fc->start]; \ For my own understanding, how does the __aligned help here ? Except for 16-byte SSE accesses, x86 doesn't distinguish aligned and unaligned accesses. You can read 4 bytes at 0

Re: [RFC PATCH 2/4] KVM: emulate: avoid repeated calls to do_insn_fetch_bytes

Il 07/05/2014 06:21, Bandan Das ha scritto: > + if (rc != X86EMUL_CONTINNUE) > + goto done; > + } > + >while (size--) { > - if (unlikely(ctxt->_eip == fc->end)) { > - rc = do_insn_fetch_bytes(ctxt); > - if (rc != X86EMUL_CO

Re: [RFC PATCH 1/4] KVM: emulate: speed up do_insn_fetch

Il 07/05/2014 04:30, Bandan Das ha scritto: > + if (unlikely(ctxt->_eip == fc->end)) { Is this really going to be unlikely ? Yes, it happens at most once per instruction and only for instructions that cross pages. Paolo -- To unsubscribe from this list: send the line "unsubscribe

Re: [PATCH] KVM: PPC: BOOK3S: PR: Fix WARN_ON with debug options on

Paul Mackerras writes: > On Sun, May 04, 2014 at 10:56:08PM +0530, Aneesh Kumar K.V wrote: >> With debug option "sleep inside atomic section checking" enabled we get >> the below WARN_ON during a PR KVM boot. This is because upstream now >> have PREEMPT_COUNT enabled even if we have preempt disab

Re: [PATCH 1/6] KVM: PPC: Book3S PR: Ignore PMU SPRs

On Fri, May 02, 2014 at 10:35:09AM +0200, Alexander Graf wrote: > On 05/01/2014 12:12 AM, Paul Mackerras wrote: > >On Tue, Apr 29, 2014 at 06:17:37PM +0200, Alexander Graf wrote: > >>When we expose a POWER8 CPU into the guest, it will start accessing PMU SPRs > >>that we don't emulate. Just ignore

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