First patch add support for debug interrupt at "debug level"
while second patch add supports for allowing userspace to inject
debug interrupt to guest.
Bharat Bhushan (2):
KVM: powerpc/booke: allow debug interrupt at "debug level"
KVM : powerpc/booke: Allow debug interrupt injection to guest
This patch allow userspace to inject debug interrupt to guest.
Signed-off-by: Bharat Bhushan
---
arch/powerpc/kvm/booke.c | 31 +--
arch/powerpc/kvm/e500mc.c | 10 +-
2 files changed, 38 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/a
Debug interrupt can be either "critical level" or "debug level".
There are separate set of save/restore registers used for different level.
Example: DSRR0/DSRR1 are used for "debug level" and CSRR0/CSRR1
are used for critical level debug interrupt.
Using CPU_FTR_DEBUG_LVL_EXC to decide which inter
On 06/26/2014 02:55 PM, David Daney wrote:
On 06/26/2014 12:55 PM, Deng-Cheng Zhu wrote:
On 06/26/2014 12:28 PM, David Daney wrote:
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the
prefixes
"kvm_" and "kvm_mi
On 06/26/2014 02:55 PM, David Daney wrote:
On 06/26/2014 12:55 PM, Deng-Cheng Zhu wrote:
On 06/26/2014 12:28 PM, David Daney wrote:
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the
prefixes
"kvm_" and "kvm_mi
On 06/26/2014 04:21 PM, James Hogan wrote:
On 26 June 2014 22:55, David Daney wrote:
There is precedence in x86 for some of the names though.
But really why churn up the code in the first place? the kvm_mips
prefix does tell us exactly what we are dealing with.
That's why people created th
On 26 June 2014 22:55, David Daney wrote:
>>> There is precedence in x86 for some of the names though.
>>>
>>> But really why churn up the code in the first place? the kvm_mips
>>> prefix does tell us exactly what we are dealing with.
>>
>>
>> That's why people created the arch/mips/kvm directory
On 06/26/2014 12:55 PM, Deng-Cheng Zhu wrote:
On 06/26/2014 12:28 PM, David Daney wrote:
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the
prefixes
"kvm_" and "kvm_mips_".
I don't like this change.
It will
On 06/26/2014 12:28 PM, David Daney wrote:
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the prefixes
"kvm_" and "kvm_mips_".
I don't like this change.
It will leads me to confuse arch/mips/kvm/interrupt.h w
On Thu, 2014-06-26 at 19:10 +, Chalamarla, Tirumalesh wrote:
> Thanks for the clarification Alex, That’s exactly my point, why are we
> relying on QEMU or something else to emulate the MSI space when we can
> directly give access to devices using ITS (of course with a small emulation
> code
On 06/26/2014 12:11 PM, Deng-Cheng Zhu wrote:
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the prefixes
"kvm_" and "kvm_mips_".
I don't like this change.
It will leads me to confuse arch/mips/kvm/interrupt.h with
include/linux/interrupt.h
x86 calls t
From: Deng-Cheng Zhu
Since all the files are in arch/mips/kvm/, there's no need of the prefixes
"kvm_" and "kvm_mips_".
Reviewed-by: James Hogan
Signed-off-by: Deng-Cheng Zhu
---
arch/mips/kvm/Makefile| 8
arch/mips/kvm/{kvm_cb.c => callback.c}
From: Deng-Cheng Zhu
Replace printks with kvm_[err|info|debug].
Signed-off-by: Deng-Cheng Zhu
---
Changes:
v4 - v3:
o Use kvm_debug instead of kvm_err in kvm_mips_check_privilege().
v3 - v2:
o Change the use of kvm_[err|info|debug].
arch/mips/kvm/kvm_mips.c | 23 -
arch/mips/kv
From: Deng-Cheng Zhu
It's impossible to fall into the error handling of the TLB index after
being masked by (KVM_MIPS_GUEST_TLB_SIZE - 1). Remove the dead code.
Reported-by: James Hogan
Signed-off-by: Deng-Cheng Zhu
---
arch/mips/kvm/emulate.c | 5 -
1 file changed, 5 deletions(-)
diff -
From: Deng-Cheng Zhu
The commpage is allocated using kzalloc(), so there's no need of cleaning
the memory of the kvm_mips_commpage struct and its internal mips_coproc.
Reviewed-by: James Hogan
Signed-off-by: Deng-Cheng Zhu
---
arch/mips/kvm/commpage.c | 3 ---
1 file changed, 3 deletions(-)
From: Deng-Cheng Zhu
The keyword volatile for idx in the TLB functions is unnecessary.
Reviewed-by: James Hogan
Signed-off-by: Deng-Cheng Zhu
---
arch/mips/kvm/kvm_tlb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/kvm/kvm_tlb.c b/arch/mips/kvm/kvm_tlb.c
i
From: Deng-Cheng Zhu
No logic changes inside.
Reviewed-by: James Hogan
Signed-off-by: Deng-Cheng Zhu
---
Changes:
v3 - v2:
o Add err removal in kvm_arch_commit_memory_region().
o Revert the changes to kvm_arch_vm_ioctl().
arch/mips/include/asm/kvm_host.h | 2 +-
arch/mips/kvm/kvm_mips.c
The patches are pretty straightforward.
Changes:
v4 - v3:
o In patch #1, align elements in debugfs_entries[].
o In patch #1, indentation and comment style changes.
o In patch #2, use kvm_debug instead of kvm_err in kvm_mips_check_privilege().
o Drop off the original patch #6 (MIPS: KVM: Restore co
Thanks for the clarification Alex, That’s exactly my point, why are we relying
on QEMU or something else to emulate the MSI space when we can directly give
access to devices using ITS (of course with a small emulation code).
This way we are also benefited from all ITS services like VCPU migratio
On Thu, 2014-06-26 at 18:41 +, Chalamarla, Tirumalesh wrote:
> Sorry there was a type,
>
> The question is:
>
> How is VFIO restricting software from writing to MSI/MSI-X
> vectors of the device.
All interrupts are configured via ioctl, not MSI config space or the
MSI-X vector
Sorry there was a type,
The question is:
How is VFIO restricting software from writing to MSI/MSI-X vectors
of the device.
-Original Message-
From: Chalamarla, Tirumalesh
Sent: Thursday, June 26, 2014 11:16 AM
To: Chalamarla, Tirumalesh; Joerg Roedel; Will Deacon
Cc: kvm@
When I say emulating ITS, I mean translating guest ITS commands to physical ITS
commands and placing them in physical queue.
Regards,
Tirumalesh.
-Original Message-
From: kvmarm-boun...@lists.cs.columbia.edu
[mailto:kvmarm-boun...@lists.cs.columbia.edu] On Behalf Of Chalamarla,
Tirum
Forgive me if this discussion is not relative here, but I thought it is.
How is VFIO restricting devices from writing to MSI/MSI-X,
Is all the vector area is mapped by VFIO to trap the accesses. I am asking
this because we might need to emulate ITS somewhere either in KVM or VFIO to
provide
Now that we have a dynamic means to register kvm_device_ops, use that
for the ARM VGIC, instead of relying on the static table.
Cc: Gleb Natapov
Cc: Paolo Bonzini
Cc: Marc Zyngier
Cc: Christoffer Dall
Signed-off-by: Will Deacon
---
Applies against Marc's latest GICv3 patches, so it's probabl
kvm_ioctl_create_device currently has knowledge of all the device types
and their associated ops. This is fairly inflexible when adding support
for new in-kernel device emulations, so move what we currently have out
into a table, which can support dynamic registration of ops by new
drivers for virt
Hi Cam,
FYI, David did implement a new server.
http://lists.nongnu.org/archive/html/qemu-devel/2014-06/msg04978.html
which is easier to maintain.
Please, could you review his patch? He'll be back from holiday within 1
week.
Best regards,
Vincent
PS: thanks for your comments
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When running Linux as a guest with KVM on an AMD CPU, the guest Linux kernel
tries to read the MC4_MISC1 MSR from its MCE code. Because this MSR is not
virtualized within KVM a GPE is injected into the guest. This patch adds
support to virtualize the MC4_MSR.
Matthias Lange (1):
KVM: svm: virtua
Linux' AMD MCE code tries to read from the MC4_MISC1 (0xc408) MSR. Because
this read is not virtualized within KVM, a GPE is injected into the guest.
This patch handles guest reads from MC4_MISC and returns 0 to the guest.
Signed-off-by: Matthias Lange
---
arch/x86/kvm/x86.c | 3 +++
1 file
This patch prevents a Linux guest running on an AMD processor from getting a
GPE upon setting bit 18 in MSR_K7_HWCR.
Matthias Lange (1):
KVM: svm: writes to MSR_K7_HWCR generates GPE in guest
arch/x86/kvm/x86.c | 1 +
1 file changed, 1 insertion(+)
--
1.9.1
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Since commit 575203 the MCE subsystem in the Linux kernel for AMD sets bit 18
in MSR_K7_HWCR. Running such a kernel as a guest in KVM on an AMD host results
in a GPE injected into the guest because kvm_set_msr_common returns 1. This
patch fixes this by masking bit 18 from the MSR value desired by t
Commit ac5a8ee8 started using _GLOBAL_TOC on ppc32 code. Unfortunately it's only
defined for 64bit targets though. Define it for ppc32 as well, fixing the build
breakage that commit introduced.
Signed-off-by: Alexander Graf
---
arch/powerpc/include/asm/ppc_asm.h | 2 ++
1 file changed, 2 inserti
On 26/06/14 11:12, Paolo Bonzini wrote:
> Il 26/06/2014 11:44, James Hogan ha scritto:
>> This patchset has a few improvements & minor fixes for MIPS KVM support.
>>
>> Patches 1-2 are fixes for forward compatibility of savevm with MIPS KVM.
>> Patch 3 just corrects comments and an error message.
>
On 26.06.14 01:59, Alexey Kardashevskiy wrote:
On 06/26/2014 07:12 AM, Alexander Graf wrote:
On 06.06.14 02:20, Alexey Kardashevskiy wrote:
On 06/05/2014 09:57 PM, Alexander Graf wrote:
On 05.06.14 09:25, Alexey Kardashevskiy wrote:
This reserves 2 capability numbers.
This implements an ext
This is a note to let you know that I have just added a patch titled
MIPS: KVM: Allocate at least 16KB for exception handlers
to the linux-3.11.y-queue branch of the 3.11.y.z extended stable tree
which can be found at:
http://kernel.ubuntu.com/git?p=ubuntu/linux.git;a=shortlog;h=refs/head
Il 26/06/2014 11:44, James Hogan ha scritto:
This patchset has a few improvements & minor fixes for MIPS KVM support.
Patches 1-2 are fixes for forward compatibility of savevm with MIPS KVM.
Patch 3 just corrects comments and an error message.
Patch 4 adds errors when the wrong type of kernel is
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Fix the error message and code comments relating to KVM not supporting
booting from the flash mapping when no kernel is provided. The issue is
a general MIPS KVM issue and isn't specific to the Trap & Emulate
version of MIPS KVM.
Reported-by: Andreas Färber
Signed-off-by: James Hogan
Cc: Aurelie
Change the default Malta CPU model for when KVM is enabled to 24Kc which
doesn't have floating point support compared to the 24Kf.
The resulting incorrect Config CP0 register value doesn't get passed to
KVM yet as KVM doesn't expose it, however we should ensure it is set
correctly now to reduce th
Add error reporting if the wrong type of kernel is provided for the
current mode of acceleration.
Currently a KVM kernel linked at 0x4000 can't be used with TCG, and
a normal kernel linked at 0x8000 can't be used with KVM.
Signed-off-by: James Hogan
Cc: Aurelien Jarno
Cc: Paolo Bonzini
The EBase CP0 register is initialised to 0x8000, however with KVM
the guest's KSEG0 is at 0x4000. The incorrect value doesn't get
passed to KVM yet as KVM doesn't implement the EBase register, however
we should set it correctly now so as not to break migration/loadvm to a
future version of
This patchset has a few improvements & minor fixes for MIPS KVM support.
Patches 1-2 are fixes for forward compatibility of savevm with MIPS KVM.
Patch 3 just corrects comments and an error message.
Patch 4 adds errors when the wrong type of kernel is provided.
James Hogan (4):
mips/kvm: Init E
nel.org/pub/scm/linux/kernel/git/rusty/linux (2014-06-11 21:10:33
-0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux.git
tags/kvms390-20140626
for you to fetch changes up to d09a08e030acbb41aadf7fee7b31cb1c5391bb96:
KVM: s390: add sie.h u
From: Heiko Carstens
sie.h was missing in arch/s390/include/uapi/asm/Kbuild and therefore missed
the "make headers_check" target.
If added it reveals that also arch/s390/include/asm/sigp.h would become uapi.
This is something we certainly do not want. So remove that dependency as well.
The heade
On Thu, Jun 26, 2014 at 01:45:51AM +0100, Kim Phillips wrote:
> From: Kim Phillips
>
> A userspace process can map device MMIO memory via VFIO or /dev/mem,
> e.g., for platform device passthrough support in QEMU.
>
> During early development, we found the PAGE_S2 memory type being used
> for MMI
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