> -Original Message-
> From: Wood Scott-B07421
> Sent: Thursday, July 31, 2014 8:18 AM
> To: Bhushan Bharat-R65777
> Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org; Yoder Stuart-
> B08248
> Subject: Re: [PATCH 6/6] KVM: PPC: BOOKE: Emulate debug registers and
> exception
On Wed, 2014-07-30 at 01:43 -0500, Bhushan Bharat-R65777 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, July 29, 2014 3:58 AM
> > To: Bhushan Bharat-R65777
> > Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org; Yoder
> > Stuart-
> > B08248
> >
Greetings from gulf region
Thanks for the e-mail. I am very interested on funding lucrative
business partnership with you acting as the manager and sole
controller of the investment while i remain a silent investor for a
period of ten yrs , though I am only looking at investment
opportunities with
Hi,
Locally I have a supermicro server running OEL 6.5 with KVM
can do virt-sysprep and libguestfs-test-tool no problem.
Linux 2.6.39-400.215.6.el6uek.x86_64
qemu-kvm-0.12.1.2-2.415.el6_5.10.x86_64
seabios-0.6.1.2-28.el6.x86_64
However I have a server in a datacenter (Sun X4-2) running the same
Resolve shadow warnings that appear in W=2 builds. Instead of
using ret to hold the return pointer, save the length in a new
variable saved_len and compute the pointer on exit. This also
resolves a very technical error, in that ret was declared as
a const char *, when it really was a char * const,
Resolve some missing-initializers warnings that appear in W=2
builds. They are resolved by adding the name as a parameter to
the macros and having the macro generate all four fields of the
structure.
Signed-off-by: Mark Rustad
Signed-off-by: Jeff Kirsher
---
V2: Change macro to supply all four
The cr2 field is unused, but I prefer to keep it the same as vmx (it is
also unused there).
Signed-off-by: Paolo Bonzini
---
x86/svm.c | 59 ++-
1 file changed, 54 insertions(+), 5 deletions(-)
diff --git a/x86/svm.c b/x86/svm.c
index 3e45
Testing the bitmap handling so far, does not cover string instructions
yet.
Signed-off-by: Paolo Bonzini
---
x86/svm.c | 126 ++
1 file changed, 126 insertions(+)
diff --git a/x86/svm.c b/x86/svm.c
index 2cf5c81..290c33e 100644
--- a/x
So far the only "multi-stage" test was assembly only, so we have
to implement register save/restore around vmrun.
Paolo
Paolo Bonzini (3):
x86: svm: load/save all GPRs
x86: svm: initialize IO bitmap
x86: svm: IOIO testing
x86/svm.c | 191 +++
Signed-off-by: Paolo Bonzini
---
x86/svm.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/x86/svm.c b/x86/svm.c
index 4b7f06e..2cf5c81 100644
--- a/x86/svm.c
+++ b/x86/svm.c
@@ -36,6 +36,9 @@ u64 latclgi_max;
u64 latclgi_min;
u64 runs;
+u8 *io_bitmap;
+u8 io_bitmap_area[16384];
+
On 30.07.14 21:47, Paolo Bonzini wrote:
Il 30/07/2014 20:57, Alexander Graf ha scritto:
Yes, this is perfectly possible. As of my last patch set we will never
enter the generic emulator for HV KVM, so that race is moot (we just
inject a PROGRAM interrupt into the guest). With this patch even th
Il 30/07/2014 20:57, Alexander Graf ha scritto:
> Yes, this is perfectly possible. As of my last patch set we will never
> enter the generic emulator for HV KVM, so that race is moot (we just
> inject a PROGRAM interrupt into the guest). With this patch even the
> code to emulate these bits doesn't
On 30.07.14 18:21, Paolo Bonzini wrote:
Il 30/07/2014 15:27, Alexander Graf ha scritto:
Now that we have properly split load/store instruction emulation and generic
instruction emulation, we can move the generic one from kvm.ko to kvm-pr.ko
on book3s_64.
This reduces the attack surface and amo
On Wed, Jul 30, 2014 at 03:34:11PM +0200, Paolo Bonzini wrote:
> Il 30/07/2014 14:55, Christoffer Dall ha scritto:
> > Hi Paolo and Gleb,
> >
> > Is there any chance you can get this urgent fix (which allows KVM guest
> > to bring down the entire system on some 64K enabled ARM64 hosts) merged
> >
On Wed, 2014-07-30 at 12:57 -0500, Bhushan Bharat-R65777 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Wednesday, July 30, 2014 11:18 PM
> > To: Bhushan Bharat-R65777
> > Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org; Yoder
> > Stuart-
> > B08248
> -Original Message-
> From: Wood Scott-B07421
> Sent: Wednesday, July 30, 2014 11:18 PM
> To: Bhushan Bharat-R65777
> Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org; Yoder Stuart-
> B08248
> Subject: Re: [PATCH 1/6] KVM: PPC: BOOKE: No need to set DBCR0_EDM in guest
> vi
On Wed, 2014-07-30 at 00:21 -0500, Bhushan Bharat-R65777 wrote:
>
> > -Original Message-
> > From: Wood Scott-B07421
> > Sent: Tuesday, July 29, 2014 3:22 AM
> > To: Bhushan Bharat-R65777
> > Cc: ag...@suse.de; kvm-...@vger.kernel.org; kvm@vger.kernel.org; Yoder
> > Stuart-
> > B08248
> >
On Wed, Jul 30, 2014 at 04:16:38PM +0200, Paolo Bonzini wrote:
> Il 30/07/2014 15:43, Don Zickus ha scritto:
> >> > Nice catch. Looks like this will need a v2. Paolo, do we have a
> >> > consensus on the proc echoing? Or should that be revisited in the v2 as
> >> > well?
> > As discussed privately,
On Wed, 2014-07-30 at 18:12 +0200, Paolo Bonzini wrote:
> Currently, the EOI exit bitmap (used for APICv) does not include
> interrupts that are masked. However, this can cause a bug that manifests
> as an interrupt storm inside the guest. Alex Williamson reported the
> bug and is the one who rea
Il 30/07/2014 15:27, Alexander Graf ha scritto:
> Now that we have properly split load/store instruction emulation and generic
> instruction emulation, we can move the generic one from kvm.ko to kvm-pr.ko
> on book3s_64.
>
> This reduces the attack surface and amount of code loaded on HV KVM kerne
Il 30/07/2014 18:02, Chris Friesen ha scritto:
> On 07/30/2014 09:42 AM, Paolo Bonzini wrote:
>> Il 30/07/2014 09:41, Chris Friesen ha scritto:
>>> I found a document at
>>> "http://ftp.software-sources.co.il/Processor_Architecture_Update-Bob_Valentine.pdf";
>>>
>>> which talks about the benefits o
Currently, the EOI exit bitmap (used for APICv) does not include
interrupts that are masked. However, this can cause a bug that manifests
as an interrupt storm inside the guest. Alex Williamson reported the
bug and is the one who really debugged this; I only wrote the patch. :)
The scenario invo
On 07/30/2014 09:42 AM, Paolo Bonzini wrote:
Il 30/07/2014 09:41, Chris Friesen ha scritto:
I found a document at
"http://ftp.software-sources.co.il/Processor_Architecture_Update-Bob_Valentine.pdf";
which talks about the benefits of Haswell. One of the items reads:
"New Accessed and Dirty bits
Il 30/07/2014 09:41, Chris Friesen ha scritto:
>> I am afraid that using dirty-bit instead of write-protection may cause the
>> case
>> even more worse for iothread-lock because we need to walk whole sptes to get
>> dirty-set pages, however currently we only need to walk the page set in the
>> bit
Il 29/07/2014 23:14, Chris J Arges ha scritto:
> Remove a function which was added by both 93c4adc7afe and 36be0b9deb2.
>
> Signed-off-by: Chris J Arges
> ---
> arch/x86/kvm/vmx.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
> index 801332e..c4
Il 30/07/2014 14:04, Wanpeng Li ha scritto:
> @@ -7962,14 +7965,14 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu,
> struct vmcs12 *vmcs12)
> if (!vmx->rdtscp_enabled)
> exec_control &= ~SECONDARY_EXEC_RDTSCP;
> /* Take the following fields on
Il 30/07/2014 15:43, Don Zickus ha scritto:
>> > Nice catch. Looks like this will need a v2. Paolo, do we have a
>> > consensus on the proc echoing? Or should that be revisited in the v2 as
>> > well?
> As discussed privately, how about something like this to handle that case:
> (applied on top of
On Fri, Jul 25, 2014 at 01:25:11PM +0200, Andrew Jones wrote:
> > to enable hard lockup detection explicitly.
> >
> > I think changing the 'watchdog_thresh' while 'watchdog_running' is true
> > should
> > _not_ enable hard lockup detection as a side-effect, because a user may
> > have a
> > 'sys
Il 30/07/2014 14:55, Christoffer Dall ha scritto:
> Hi Paolo and Gleb,
>
> Is there any chance you can get this urgent fix (which allows KVM guest
> to bring down the entire system on some 64K enabled ARM64 hosts) merged
> for 3.16?
>
> The following changes since commit bb18b526a9d8d4a3fe56f234d
Linus,
The following changes since commit bb18b526a9d8d4a3fe56f234d5013b9f6036978d:
Merge tag 'signed-for-3.16' of git://github.com/agraf/linux-2.6 into
kvm-master (2014-07-08 12:08:58 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/virt/kvm/kvm.git tags/for-li
Now that we have properly split load/store instruction emulation and generic
instruction emulation, we can move the generic one from kvm.ko to kvm-pr.ko
on book3s_64.
This reduces the attack surface and amount of code loaded on HV KVM kernels.
Signed-off-by: Alexander Graf
---
arch/powerpc/kvm/
Hi Paolo and Gleb,
Is there any chance you can get this urgent fix (which allows KVM guest
to bring down the entire system on some 64K enabled ARM64 hosts) merged
for 3.16?
The following changes since commit bb18b526a9d8d4a3fe56f234d5013b9f6036978d:
Merge tag 'signed-for-3.16' of git://github.
On Wed, Jul 30, 2014 at 11:47:40AM +0100, Marc Zyngier wrote:
> On Fri, Jul 25 2014 at 4:29:12 pm BST, Will Deacon
> wrote:
> > If the physical address of GICV isn't page-aligned, then we end up
> > creating a stage-2 mapping of the page containing it, which causes us to
> > map neighbouring mem
From: Will Deacon
If the physical address of GICV isn't page-aligned, then we end up
creating a stage-2 mapping of the page containing it, which causes us to
map neighbouring memory locations directly into the guest.
As an example, consider a platform with GICV at physical 0x2c02f000
running a 6
This patch fix bug https://bugzilla.kernel.org/show_bug.cgi?id=61411
TPR shadow/threshold feature is important to speed up the Windows guest.
Besides, it is a must feature for certain VMM.
We map virtual APIC page address and TPR threshold from L1 VMCS. If
TPR_BELOW_THRESHOLD VM exit is trigger
On Fri, Jul 25 2014 at 4:29:12 pm BST, Will Deacon wrote:
> If the physical address of GICV isn't page-aligned, then we end up
> creating a stage-2 mapping of the page containing it, which causes us to
> map neighbouring memory locations directly into the guest.
>
> As an example, consider a plat
On 30.07.14 11:33, Bharat Bhushan wrote:
This are not specific to e500hv but applicable for bookehv
(As per comment from Scott Wood on my patch
"kvm: ppc: bookehv: Added wrapper macros for shadow registers")
Signed-off-by: Bharat Bhushan
Thanks, applied to kvm-ppc-queue.
Alex
--
To unsubs
This are not specific to e500hv but applicable for bookehv
(As per comment from Scott Wood on my patch
"kvm: ppc: bookehv: Added wrapper macros for shadow registers")
Signed-off-by: Bharat Bhushan
---
arch/powerpc/include/asm/kvm_ppc.h | 20 ++--
1 file changed, 10 insertions(+),
On 07/30/2014 12:09 AM, Xiao Guangrong wrote:
On 07/30/2014 06:12 AM, Chris Friesen wrote:
Hi,
I've got an issue where we're hitting major performance penalties while doing
live migration, and it seems like it might
be due to page faults triggering hypervisor exits, and then we get stuck
wait
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