Hello Stefan,
On 08/08/2014 05:02 PM, Stefan Hajnoczi wrote:
On Fri, Aug 08, 2014 at 10:55:18AM +0200, David Marchand wrote:
+For each client (QEMU processes) that connects to the server:
+- the server assigns an ID for this client and sends this ID to him as the
first
+ message,
+- the
On Tue, Aug 26, 2014 at 1:56 AM, Kim Phillips
kim.phill...@freescale.com wrote:
On Fri, 22 Aug 2014 11:01:23 +0200
Antonios Motakis a.mota...@virtualopensystems.com wrote:
This patch series depends on the VFIO for PLATFORM devices patch series,
and implements AMBA device support for VFIO.
On Mon, Aug 25, 2014 at 10:29 PM, Kim Phillips
kim.phill...@freescale.com wrote:
On Fri, 22 Aug 2014 11:01:24 +0200
Antonios Motakis a.mota...@virtualopensystems.com wrote:
As already demonstrated with PCI [1] and the platform bus [2], a
driver_override property in sysfs can be used to bypass
kvm_ioapic_scan_entry() needs to update tmr. The previous lapic tmr value
(old_tmr) needs to sync with ioapic to get an accurate updated tmr
value before the updating work.
Tested-by: Rongrong Liu rongrongx@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
Signed-off-by: Wei Wang
Guest may mask the IOAPIC entry before issue EOI. In such case,
EOI will not be intercepted by hypervisor, since the corrensponding
bit in eoi exit bitmap is not set after the masking of IOAPIC entry.
The solution here is to OR EOI_exit_bitmap with tmr.
Tested-by: Rongrong Liu
From: David Hildenbrand d...@linux.vnet.ibm.com
We should make sure that all kvm_dirty_regs bits are cleared before dropping
to user space. Until now, some would remain pending.
Signed-off-by: David Hildenbrand d...@linux.vnet.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
Paolo,
The following changes since commit ab3f285f227fec62868037e9b1b1fd18294a83b8:
KVM: s390/mm: try a cow on read only pages for key ops (2014-08-25 14:35:28
+0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux.git
From: Jens Freimann jf...@linux.vnet.ibm.com
Let's make this a reusable function.
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Acked-by: Cornelia Huck cornelia.h...@de.ibm.com
Acked-by: Christian Borntraeger borntrae...@de.ibm.com
Signed-off-by: Christian Borntraeger
From: Martin Schwidefsky schwidef...@de.ibm.com
Revert git commit 1b7fd6952063 (remove unecessary parameter from
pgste_ipte_notify)
Signed-off-by: Martin Schwidefsky schwidef...@de.ibm.com
Signed-off-by: Christian Borntraeger borntrae...@de.ibm.com
---
arch/s390/include/asm/pgtable.h | 17
From: Martin Schwidefsky schwidef...@de.ibm.com
The radix tree rework removed all code that uses the gmap_rmap
and gmap_pgtable data structures. Remove these outdated definitions.
Signed-off-by: Martin Schwidefsky schwidef...@de.ibm.com
Signed-off-by: Christian Borntraeger borntrae...@de.ibm.com
From: Jens Freimann jf...@linux.vnet.ibm.com
The kvm lock protects us against vcpus going away, but they only go
away when the virtual machine is shut down. We don't need this
mutex here, so let's get rid of it.
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Reviewed-by: David Hildenbrand
From: David Hildenbrand d...@linux.vnet.ibm.com
In order to reduce the number of syscalls when dropping to user space, this
patch enables the synchronization of the following registers with kvm_run:
- ARCH0: CPU timer, clock comparator, TOD programmable register,
guest breaking-event
From: Martin Schwidefsky schwidef...@de.ibm.com
Store the target address for the gmap segments in a radix tree
instead of using invalid segment table entries. gmap_translate
becomes a simple radix_tree_lookup, gmap_fault is split into the
address translation with gmap_translate and the part that
The load PSW handler does not have to inject pending machine checks.
This can wait until the CPU runs the generic interrupt injection code.
Signed-off-by: Christian Borntraeger borntrae...@de.ibm.com
Reviewed-by: Cornelia Huck cornelia.h...@de.ibm.com
---
arch/s390/kvm/interrupt.c | 56
From: David Hildenbrand d...@linux.vnet.ibm.com
This patch clarifies that kvm_dirty_regs are just a hint to the kernel and
that the kernel might just ignore some flags and sync the values (like done for
acrs and gprs now).
Signed-off-by: David Hildenbrand d...@linux.vnet.ibm.com
Reviewed-by:
From: David Hildenbrand d...@linux.vnet.ibm.com
Use the KVM_REQ_TLB_FLUSH request in order to trigger tlb flushes instead
of manipulating the SIE control block whenever we need it. Also trigger it for
a control register sync directly instead of (ab)using kvm_s390_set_prefix().
Signed-off-by:
From: Jens Freimann jf...@linux.vnet.ibm.com
Currently we just kill the userspace process and exit the thread
immediatly without making sure that we don't hold any locks etc.
Improve this by making KVM_RUN return -EFAULT if the lowcore is not
mapped during interrupt delivery. To achieve this we
From: Martin Schwidefsky schwidef...@de.ibm.com
Add an addressing limit to the gmap address spaces and only allocate
the page table levels that are needed for the given limit. The limit
is fixed and can not be changed after a gmap has been created.
Signed-off-by: Martin Schwidefsky
From: Jens Freimann jf...@linux.vnet.ibm.com
Get rid of open coded values for pfault init.
Signed-off-by: Jens Freimann jf...@linux.vnet.ibm.com
Acked-by: Cornelia Huck cornelia.h...@de.ibm.com
Signed-off-by: Christian Borntraeger borntrae...@de.ibm.com
---
arch/s390/kvm/interrupt.c | 6 --
From: Martin Schwidefsky schwidef...@de.ibm.com
Make the order of arguments for the gmap calls more consistent,
if the gmap pointer is passed it is always the first argument.
In addition distinguish between guest address and user address
by naming the variables gaddr for a guest address and
From: Martin Schwidefsky schwidef...@de.ibm.com
Revert git commit c3a23b9874c1 (remove unnecessary parameter from
gmap_do_ipte_notify).
Signed-off-by: Martin Schwidefsky schwidef...@de.ibm.com
Signed-off-by: Christian Borntraeger borntrae...@de.ibm.com
---
arch/s390/include/asm/pgtable.h | 4
Hi Alex,
Could you have a test if the two patches have solved the bug?
Thanks,
Wei
-Original Message-
From: Wang, Wei W
Sent: Wednesday, August 27, 2014 12:28 AM
To: kvm@vger.kernel.org
Cc: pbonz...@redhat.com; alex.william...@redhat.com; Wang, Wei W; Zhang, Yang Z
Subject: [PATCH] KVM:
On Sun, Aug 17, 2014 at 11:54 AM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 15/08/2014 18:54, Marcelo Tosatti ha scritto:
Ping on integration.
It's been in kvm/next for a while, and is now in Linus's tree:
Does this make sense for -stable too?
- Pekka
--
To unsubscribe from this list:
This patchset updates KVMTOOL to use some of the features
supported by Linux-3.16 KVM ARM/ARM64, such as:
1. Target CPU == Host using KVM_ARM_PREFERRED_TARGET vm ioctl
2. Target CPU type Potenza for using KVMTOOL on X-Gene
3. PSCI v0.2 support for Aarch32 and Aarch64 guest
4. System event exit
Instead, of trying out each and every target type we should
use KVM_ARM_PREFERRED_TARGET vm ioctl to determine target type
for KVM ARM/ARM64.
If KVM_ARM_PREFERRED_TARGET vm ioctl fails then we fallback to
old method of trying all known target types.
Signed-off-by: Pranavkumar Sawargaonkar
The VCPU target type KVM_ARM_TARGET_XGENE_POTENZA is available
in latest Linux-3.16-rcX or higher hence register aarch64 target
type for it.
This patch enables us to run KVMTOOL on X-Gene Potenza host.
Signed-off-by: Pranavkumar Sawargaonkar pranavku...@linaro.org
Signed-off-by: Anup Patel
If in-kernel KVM support PSCI-0.2 emulation then we should set
KVM_ARM_VCPU_PSCI_0_2 feature for each guest VCPU and also
provide arm,psci-0.2,arm,psci as PSCI compatible string.
This patch updates kvm_cpu__arch_init() and setup_fdt() as
per above.
Signed-off-by: Pranavkumar Sawargaonkar
The KVM_EXIT_SYSTEM_EVENT exit reason was added to define
architecture independent system-wide events for a Guest.
Currently, it is used by in-kernel PSCI-0.2 emulation of
KVM ARM/ARM64 to inform user space about PSCI SYSTEM_OFF
or PSCI SYSTEM_RESET request.
For now, we simply treat all
Hi, all
I use a qemu-1.4.1/qemu-2.0.0 to run win7 guest, and encounter e1000 NIC
interrupt storm,
because if (!ent-fields.mask (ioapic-irr (1 i))) is always
true in __kvm_ioapic_update_eoi().
Any ideas?
We meet this several times: search the autoneg patches for an example of
On Mon, Aug 25, 2014 at 5:40 PM, Marina Zhurakhinskaya
mari...@redhat.com wrote:
- Original Message -
From: Stefan Hajnoczi stefa...@gmail.com
To: Martin Kletzander mklet...@redhat.com
Cc: qemu-devel qemu-de...@nongnu.org, libvir-l...@redhat.com, kvm
kvm@vger.kernel.org, Marina
On Tue, Aug 26, 2014 at 10:33:27AM +0100, Stefan Hajnoczi wrote:
On Mon, Aug 25, 2014 at 5:40 PM, Marina Zhurakhinskaya
mari...@redhat.com wrote:
- Original Message -
From: Stefan Hajnoczi stefa...@gmail.com
To: Martin Kletzander mklet...@redhat.com
Cc: qemu-devel
On 2014/8/27 0:27, Wei Wang wrote:
Guest may mask the IOAPIC entry before issue EOI. In such case,
EOI will not be intercepted by hypervisor, since the corrensponding
Looks this is always missed :)
s/corrensponding/corresponding
Tiejun
bit in eoi exit bitmap is not set after the masking of
On Tue, Aug 26, 2014 at 10:39 AM, Martin Kletzander mklet...@redhat.com wrote:
On Tue, Aug 26, 2014 at 10:33:27AM +0100, Stefan Hajnoczi wrote:
On Mon, Aug 25, 2014 at 5:40 PM, Marina Zhurakhinskaya
mari...@redhat.com wrote:
- Original Message -
From: Stefan Hajnoczi
On Tue, Aug 26, 2014 at 11:27:41AM +0100, Stefan Hajnoczi wrote:
On Tue, Aug 26, 2014 at 10:39 AM, Martin Kletzander mklet...@redhat.com wrote:
On Tue, Aug 26, 2014 at 10:33:27AM +0100, Stefan Hajnoczi wrote:
On Mon, Aug 25, 2014 at 5:40 PM, Marina Zhurakhinskaya
mari...@redhat.com wrote:
Hi Antonios,
On Fri, Aug 22, 2014 at 10:01:27AM +0100, Antonios Motakis wrote:
Add support for discovering AMBA devices with VFIO and handle them
similarly to Linux platform devices.
[...]
+static struct amba_id pl330_ids[] = {
+ { 0, 0 },
+};
+
+MODULE_DEVICE_TABLE(amba, pl330_ids);
Il 25/08/2014 21:38, Chris J Arges ha scritto:
Ah, I didn't know that. Yes disabling NMI watchdog via:
echo 0 | sudo tee /proc/sys/kernel/nmi_watchdog
Allows this test to pass.
Would it make sense to have a check if nmi_watchdog is enabled in this
test case, and skip the all counters test?
Il 26/08/2014 18:27, Wei Wang ha scritto:
kvm_ioapic_scan_entry() needs to update tmr. The previous lapic tmr value
(old_tmr) needs to sync with ioapic to get an accurate updated tmr
value before the updating work.
+ u32 irr[8];
+ u32 isr[8];
+ u32 old_tmr[8];
These do not need
Il 26/08/2014 18:27, Wei Wang ha scritto:
Guest may mask the IOAPIC entry before issue EOI. In such case,
EOI will not be intercepted by hypervisor, since the corrensponding
bit in eoi exit bitmap is not set after the masking of IOAPIC entry.
The solution here is to OR EOI_exit_bitmap with
Il 26/08/2014 08:47, David Marchand ha scritto:
Using a version message supposes we want to keep ivshmem-server and QEMU
separated (for example, in two distribution packages) while we can avoid
this, so why would we do so ?
If we want the ivshmem-server to come with QEMU, then both are
Sparse reports the following easily fixed warnings:
arch/x86/kvm/vmx.c:8795:48: sparse: Using plain integer as NULL pointer
arch/x86/kvm/vmx.c:2138:5: sparse: symbol vmx_read_l1_tsc was not declared.
Should it be static?
arch/x86/kvm/vmx.c:6151:48: sparse: Using plain integer as NULL
Il 26/08/2014 10:28, Christian Borntraeger ha scritto:
2. We use KVM_REQ_TLB_FLUSH instead of open coding tlb flushes
Why is this needed? It seems slower than what you are replacing.
Supporting KVM_REQ_TLB_FLUSH is useful (the first hunk of the patch);
hiding the control block manipulation
Il 26/08/2014 11:08, Pekka Enberg ha scritto:
On Sun, Aug 17, 2014 at 11:54 AM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 15/08/2014 18:54, Marcelo Tosatti ha scritto:
Ping on integration.
It's been in kvm/next for a while, and is now in Linus's tree:
Does this make sense for -stable
To support read-only memory regions on arm and arm64, we have a need to
resolve a gfn to an hva given a pointer to a memslot to avoid looping
through the memslots twice and to reuse the hva error checking of
gfn_to_hva_prot(), add a new gfn_to_hva_memslot_prot() function and
refactor
When userspace loads code and data in a read-only memory regions, KVM
needs to be able to handle this on arm and arm64. Specifically this is
used when running code directly from a read-only flash device; the
common scenario is a UEFI blob loaded with the -bios option in QEMU.
Note that the MMIO
On 26/08/14 13:40, Paolo Bonzini wrote:
Il 26/08/2014 10:28, Christian Borntraeger ha scritto:
2. We use KVM_REQ_TLB_FLUSH instead of open coding tlb flushes
Why is this needed? It seems slower than what you are replacing.
Supporting KVM_REQ_TLB_FLUSH is useful (the first hunk of the
The idea between capabilities and the KVM_CHECK_EXTENSION ioctl is that
userspace can, at run-time, determine if a feature is supported or not.
This allows KVM to being supporting a new feature with a new kernel
version without any need to update user space. Unfortunately, since the
definition of
The idea between capabilities and the KVM_CHECK_EXTENSION ioctl is that
userspace can, at run-time, determine if a feature is supported or not.
This allows KVM to being supporting a new feature with a new kernel
version without any need to update user space. Unfortunately, since the
definition of
Il 26/08/2014 13:59, Christian Borntraeger ha scritto:
This patch is more of a cleanup - making clear whats going on. Its not needed
for something special.
It does two things:
- encapsulate the TLB flushing - Yes, a function hiding that would also work.
We decided to reuse an existing
Il 26/08/2014 14:00, Christoffer Dall ha scritto:
The idea between capabilities and the KVM_CHECK_EXTENSION ioctl is that
userspace can, at run-time, determine if a feature is supported or not.
This allows KVM to being supporting a new feature with a new kernel
version without any need to
On Tue, Aug 26, 2014 at 2:30 PM, Paolo Bonzini pbonz...@redhat.com wrote:
Il 26/08/2014 14:00, Christoffer Dall ha scritto:
The idea between capabilities and the KVM_CHECK_EXTENSION ioctl is that
userspace can, at run-time, determine if a feature is supported or not.
This allows KVM to being
The architecture specifies that when the processor wakes up from a WFE
or WFI instruction, the instruction is considered complete, however we
currrently return to EL1 (or EL0) at the WFI/WFE instruction itself.
While most guests may not be affected by this because their local
exception handler
Il 25/08/2014 22:02, Eduardo Habkost ha scritto:
Add feature names that are missing on the x86 CPU feature name tables. Both
had
migration support implemented many months ago.
Changes v1 - v2:
* Commit message changes only. Added reference to migration support commit
IDs.
Note that
Il 25/08/2014 22:45, Eduardo Habkost ha scritto:
TCG users expect the default CPU model to contain most TCG-supported features
(and it makes sense). See, for example, commit
f1e00a9cf326acc1f2386a72525af8859852e1df.
It doesn't though (SMAP is the most egregious omission, and probably the
The architecture specifies that when the processor wakes up from a WFE
or WFI instruction, the instruction is considered complete, however we
currrently return to EL1 (or EL0) at the WFI/WFE instruction itself.
While Linux guests may not be affected by this because their local
exception handler
Hi Christoffer,
On 26/08/14 13:49, Christoffer Dall wrote:
The architecture specifies that when the processor wakes up from a WFE
or WFI instruction, the instruction is considered complete, however we
currrently return to EL1 (or EL0) at the WFI/WFE instruction itself.
While most guests may
On 26/08/14 12:43, Christoffer Dall wrote:
When userspace loads code and data in a read-only memory regions, KVM
needs to be able to handle this on arm and arm64. Specifically this is
used when running code directly from a read-only flash device; the
common scenario is a UEFI blob loaded with
Hello WIll,
On Tue, Aug 26, 2014 at 12:50 PM, Will Deacon will.dea...@arm.com wrote:
Hi Antonios,
On Fri, Aug 22, 2014 at 10:01:27AM +0100, Antonios Motakis wrote:
Add support for discovering AMBA devices with VFIO and handle them
similarly to Linux platform devices.
[...]
+static struct
Hi Joel,
On Mon, Aug 18 2014 at 9:36:04 pm BST, Joel Schopp joel.sch...@amd.com wrote:
The current VTTBR_BADDR_MASK only masks 39 bits, which is broken on current
systems. Rather than just add a bit it seems like a good time to also set
things at run-time instead of compile time to
On Mon, 2014-08-25 at 15:27 +0200, Eric Auger wrote:
This RFC proposes an integration of ARM: Forwarding physical
interrupts to a guest VM (http://lwn.net/Articles/603514/) in
KVM.
It enables to transform a VFIO platform driver IRQ into a forwarded
IRQ. The direct benefit is that, for a
On Tue, Aug 26, 2014 at 02:56:21PM +0200, Paolo Bonzini wrote:
Il 25/08/2014 22:45, Eduardo Habkost ha scritto:
TCG users expect the default CPU model to contain most TCG-supported
features
(and it makes sense). See, for example, commit
f1e00a9cf326acc1f2386a72525af8859852e1df.
It
These two patches add the ability to check for host machine conditions
before running a particular test. This allows the configuration file to have
a mechanism to skip false negatives.
Chris J Arges (2):
add check parameter to run_tests configuration
x86/unittests.cfg: the pmu testcase
In unittests.cfg one can add a line like the following:
check = /proc/sys/kernel/nmi_watchdog=0 /proc/sys/kernel/ostype=Linux
run_tests.sh will now check for those values (if defined) and only run
the test if all conditions are true.
Signed-off-by: Chris J Arges chris.j.ar...@canonical.com
---
If nmi_watchdog is enabled, it will take up a PMU counter causing the
all_counters testcase to fail. This additional check will error out if
nmi_watchdog is enabled and provide feedback for the user to configure the
host machine correctly.
Signed-off-by: Chris J Arges chris.j.ar...@canonical.com
diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index 5c7aa3c..73f6ff6 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -166,6 +166,18 @@ static inline void coherent_cache_guest_page(struct
kvm_vcpu *vcpu, hva_t hva,
void
On Mon, 2014-08-25 at 15:27 +0200, Eric Auger wrote:
Implements ARM specific KVM-VFIO device group commands:
- KVM_DEV_VFIO_DEVICE_ASSIGN_IRQ
- KVM_DEV_VFIO_DEVICE_DEASSIGN_IRQ
capability can be queried using KVM_HAS_DEVICE_ATTR.
The new commands enable to set IRQ forwarding on/off for a
On Mon, 2014-08-25 at 15:27 +0200, Eric Auger wrote:
add a pointer to architecture specific data in kvm_vfio struct
add accessors to keep kvm_vfio private
Signed-off-by: Eric Auger eric.au...@linaro.org
---
arch/arm/include/asm/kvm_host.h | 8
virt/kvm/vfio.c |
On Mon, 2014-08-25 at 15:27 +0200, Eric Auger wrote:
New functions are added to be called from ARM KVM-VFIO device.
- vfio_device_get_external_user enables to get a vfio device from
its fd
- vfio_device_put_external_user puts the vfio device
- vfio_external_get_type enables to retrieve
On Mon, 2014-08-25 at 15:27 +0200, Eric Auger wrote:
add new device group commands:
- KVM_DEV_VFIO_DEVICE_ASSIGN_IRQ and
KVM_DEV_VFIO_DEVICE_DEASSIGN_IRQ
which enable to turn forwarded IRQ mode on/off.
Signed-off-by: Eric Auger eric.au...@linaro.org
---
On Tue, 2014-08-26 at 17:39 +0200, Antonios Motakis wrote:
Hello WIll,
On Tue, Aug 26, 2014 at 12:50 PM, Will Deacon will.dea...@arm.com wrote:
Hi Antonios,
On Fri, Aug 22, 2014 at 10:01:27AM +0100, Antonios Motakis wrote:
Add support for discovering AMBA devices with VFIO and handle
On Tue, 2014-08-26 at 09:02 +, Wang, Wei W wrote:
Hi Alex,
Could you have a test if the two patches have solved the bug?
What case was missed by the previous single patch that is accounted for
now? Some sort of comment in the update_tmr function would be nice to
explain the update, along
Patch adds support for initial write protection of VM memlsot. This patch series
assumes that huge PUDs will not be used in 2nd stage tables, which is awlays
valid on ARMv7.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_host.h | 1 +
Add support to declare architecture specific TLB flush function, for now only
ARMv7.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
virt/kvm/Kconfig| 3 +++
virt/kvm/kvm_main.c | 4
2 files changed, 7 insertions(+)
diff --git a/virt/kvm/Kconfig b/virt/kvm/Kconfig
index
This patch adds ARMv7 architecture TLB Flush function.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_asm.h | 1 +
arch/arm/include/asm/kvm_host.h | 12
arch/arm/kvm/Kconfig| 1 +
arch/arm/kvm/interrupts.S | 12
4
This patch adds support for ARMv7 dirty page logging. Some functions of dirty
page logging have been split to generic and arch specific implementations,
details below. Dirty page logging is one of serveral features required for
live migration, live migration has been tested for ARMv7.
Testing:
Add support for generic implementation of dirty log read function. For now both
x86_64 and ARMv7 share generic dirty log read. Other architectures call
their architecture specific functions.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_host.h | 2 +
This patch adds support to track VM dirty pages, between dirty log reads. Pages
that have been dirtied since last log read are write protected again, in
preparation of next dirty log read. In addition ARMv7 dirty log read function
is pushed up to generic layer.
Signed-off-by: Mario Smarduch
hpa pointed out that the ABI that I chose (an MSR from the KVM range
and a KVM cpuid bit) is unnecessarily KVM-specific. It would be nice
to allocate an MSR that everyone involved can agree on and, rather
than relying on a cpuid bit, just have the guest probe for the MSR.
This leads to a few
This patch adds support for handling 2nd stage page faults during migration,
it disables faulting in huge pages, and dissolves huge pages to page tables.
In case migration is canceled huge pages may be used again.
Signed-off-by: Mario Smaduch m.smard...@samsung.com
---
arch/arm/kvm/mmu.c | 45
On Mon, 2014-08-25 at 15:10 +0200, Christian Borntraeger wrote:
The PFMF instruction handler blindly wrote the storage key even if
the page was mapped R/O in the host. Lets try a COW before continuing
and bail out in case of errors.
Signed-off-by: Christian Borntraeger
Dear KVM developers:
I am trying use perf stat inside a VM to obtain some hardware cache
performance counter values.
The perf stat can report some numbers for L1 and TLB related counters.
But for the LLC-loads and LLC-load-misses, the numbers are always 0.
It seems that the these offcore events
Dear KVM developers:
I am trying use perf stat inside a VM to obtain some hardware cache
performance counter values.
The perf stat can report some numbers for L1 and TLB related counters.
But for the LLC-loads and LLC-load-misses, the numbers are always 0.
It seems that the these offcore events
On 08/26/2014 05:28 PM, Zhang Haoyu wrote:
Hi, all
I use a qemu-1.4.1/qemu-2.0.0 to run win7 guest, and encounter e1000 NIC
interrupt storm,
because if (!ent-fields.mask (ioapic-irr (1 i))) is always
true in __kvm_ioapic_update_eoi().
Any ideas?
We meet this several times: search
kvm_ioapic_scan_entry() needs to update tmr. The previous lapic tmr value
(old_tmr) needs to sync with ioapic to get an accurate updated tmr
value before the updating work.
Tested-by: Rongrong Liu rongrongx@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
Signed-off-by: Wei Wang
Guest may mask the IOAPIC entry before issue EOI. In such case,
EOI will not be intercepted by the hypervisor, since the corresponding
bit in eoi_exit_bitmap is not set after the masking of IOAPIC entry.
The solution here is to OR eoi_exit_bitmap with tmr to make sure that
all level-triggered
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