Re: [PATCH v2 1/3] arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2

2014-10-10 Thread Christoffer Dall
On Thu, Oct 09, 2014 at 02:36:26PM +0100, Catalin Marinas wrote: > On Thu, Oct 09, 2014 at 12:01:37PM +0100, Christoffer Dall wrote: > > On Wed, Oct 08, 2014 at 10:47:04AM +0100, Catalin Marinas wrote: > > > On Tue, Oct 07, 2014 at 08:39:54PM +0100, Christoffer Dall wrote: > > > > +static inline in

Re: [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes

2014-10-10 Thread Paolo Bonzini
Il 10/10/2014 03:55, Nadav Amit ha scritto: >> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c >> index b8345dd..51428dd 100644 >> --- a/arch/x86/kvm/lapic.c >> +++ b/arch/x86/kvm/lapic.c >> @@ -1096,9 +1096,12 @@ static void start_apic_timer(struct kvm_lapic *apic) >> if (lik

[PATCH v3 2/3] arm/arm64: KVM: Ensure memslots are within KVM_PHYS_SIZE

2014-10-10 Thread Christoffer Dall
When creating or moving a memslot, make sure the IPA space is within the addressable range of the guest. Otherwise, user space can create too large a memslot and KVM would try to access potentially unallocated page table entries when inserting entries in the Stage-2 page tables. Signed-off-by: Ch

[PATCH v3 1/3] arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2

2014-10-10 Thread Christoffer Dall
This patch adds the necessary support for all host kernel PGSIZE and VA_SPACE configuration options for both EL2 and the Stage-2 page tables. However, for 40bit and 42bit PARange systems, the architecture mandates that VTCR_EL2.SL0 is maximum 1, resulting in fewer levels of stage-2 pagge tables th

[PATCH v3 3/3] arm64: Allow 48-bits VA space without ARM_SMMU

2014-10-10 Thread Christoffer Dall
Now when KVM has been reworked to support 48-bits host VA space, we can allow systems to be configured with this option. However, the ARM SMMU driver also needs to be tweaked for 48-bit support so only allow the config option to be set when not including support for theSMMU. Signed-off-by: Christ

[PATCH v3 0/3] arm/arm64: KVM: Host 48-bit VA support and IPA limits

2014-10-10 Thread Christoffer Dall
The following two patches fixup some missing memory handling in KVM/arm64. The first patch supports 48 bit virtual address space which involves supporting a different number of levels of page tables in the host kernel and the stage-2 page tables. The second patch ensures userspace cannot create m

[question] Is there a plan to introduce a unified co-scheduling mechanism to CFS ?

2014-10-10 Thread Zhang Haoyu
Hi, Is it worthy to introduce a unified co-scheduling mechanism to CFS ? Because multiple cooperating threads or tasks frequently synchronize with each other, not executing them concurrently would only increase the latency of synchronization. For example, a thread blocking in spinlock to waitin

Re: [question] Is there a plan to introduce a unified co-scheduling mechanism to CFS ?

2014-10-10 Thread Wanpeng Li
于 10/10/14, 7:37 PM, Zhang Haoyu 写道: Hi, Is it worthy to introduce a unified co-scheduling mechanism to CFS ? Because multiple cooperating threads or tasks frequently synchronize with each other, not executing them concurrently would only increase the latency of synchronization. For example,

Re: [question] Is there a plan to introduce a unified co-scheduling mechanism to CFS ?

2014-10-10 Thread Zhang Haoyu
>> Hi, >> >> Is it worthy to introduce a unified co-scheduling mechanism to CFS ? >> Because multiple cooperating threads or tasks frequently synchronize with each other, >> not executing them concurrently would only increase the latency of synchronization. >> For example, a thread blocking in s

Re: [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes

2014-10-10 Thread Radim Krčmář
2014-10-10 11:45+0200, Paolo Bonzini: > Il 10/10/2014 03:55, Nadav Amit ha scritto: > >> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > >> index b8345dd..51428dd 100644 > >> --- a/arch/x86/kvm/lapic.c > >> +++ b/arch/x86/kvm/lapic.c > >> @@ -1096,9 +1096,12 @@ static void start_apic_tim

Re: [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes

2014-10-10 Thread Nadav Amit
On Oct 10, 2014, at 12:45 PM, Paolo Bonzini wrote: > Il 10/10/2014 03:55, Nadav Amit ha scritto: >>> diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c >>> index b8345dd..51428dd 100644 >>> --- a/arch/x86/kvm/lapic.c >>> +++ b/arch/x86/kvm/lapic.c >>> @@ -1096,9 +1096,12 @@ static void sta

Re: [patch 3/4] KVM: MMU: reload request from GET_DIRTY_LOG path

2014-10-10 Thread Gleb Natapov
On Wed, Oct 08, 2014 at 04:22:31PM -0300, Marcelo Tosatti wrote: > > > > > > Argh, lets try again: > > > > > > skip_pinned = true > > > -- > > > > > > mark page dirty, keep spte intact > > > > > > called from get dirty log path. > > > > > > skip_pinned = false > > > ---

Re: [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes

2014-10-10 Thread Paolo Bonzini
Il 10/10/2014 14:51, Nadav Amit ha scritto: >>> Second, I think that the solution I proposed would perform better. >>> Currently, there are many unnecessary cancellations and setups of the >>> timer. This solution does not resolve this problem. >> >> I think it does. You do not get an hrtimer_star

Re: [PATCH 5/5] KVM: x86: Using TSC deadline may cause multiple interrupts by user writes

2014-10-10 Thread Paolo Bonzini
Il 08/10/2014 12:06, Radim Krčmář ha scritto: > KVM: x86: fix deadline tsc interrupt injection > > The check in kvm_set_lapic_tscdeadline_msr() was trying to prevent a > situation where we lose a pending deadline timer in a MSR write. > Losing it is fine, because it effectively occurs before the t

Re: [PATCH kvm-kmod 0/3] First round of kvm-kmod fixes for 3.18 merge window

2014-10-10 Thread Jan Kiszka
On 2014-10-09 13:53, Paolo Bonzini wrote: > Patches are relative to next branch of kvm-kmod.git. > > Paolo > > Paolo Bonzini (3): > FOLL_TRIED is not available before 3.18 > the MMU notifier clear_flush_young callback changed in 3.18 > redefine is_zero_pfn to not rely on zero_pfn > > exte

Re: [PATCH v3 2/3] arm/arm64: KVM: Ensure memslots are within KVM_PHYS_SIZE

2014-10-10 Thread Catalin Marinas
On Fri, Oct 10, 2014 at 11:14:29AM +0100, Christoffer Dall wrote: > When creating or moving a memslot, make sure the IPA space is within the > addressable range of the guest. Otherwise, user space can create too > large a memslot and KVM would try to access potentially unallocated page > table ent

Re: [PATCH v3 1/3] arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2

2014-10-10 Thread Catalin Marinas
On Fri, Oct 10, 2014 at 11:14:28AM +0100, Christoffer Dall wrote: > This patch adds the necessary support for all host kernel PGSIZE and > VA_SPACE configuration options for both EL2 and the Stage-2 page tables. > > However, for 40bit and 42bit PARange systems, the architecture mandates > that VTC

Re: [PATCH v3 3/3] arm64: Allow 48-bits VA space without ARM_SMMU

2014-10-10 Thread Catalin Marinas
On Fri, Oct 10, 2014 at 11:14:30AM +0100, Christoffer Dall wrote: > Now when KVM has been reworked to support 48-bits host VA space, we can > allow systems to be configured with this option. However, the ARM SMMU > driver also needs to be tweaked for 48-bit support so only allow the > config optio

Re: [PATCH v2 2/5] KVM: x86: Emulator performs code segment checks on read access

2014-10-10 Thread Radim Krčmář
2014-10-10 05:07+0300, Nadav Amit: > When read access is performed using a readable code segment, the "conforming" > and "non-conforming" checks should not be done. As a result, read using > non-conforming readable code segment fails. > > This is according to Intel SDM 5.6.1 ("Accessing Data in C

[Bug 81841] amd-iommu: kernel BUG & lockup after shutting down KVM guest using PCI passthrough/PCIe bridge

2014-10-10 Thread bugzilla-daemon
https://bugzilla.kernel.org/show_bug.cgi?id=81841 Marti Raudsepp changed: What|Removed |Added Status|NEW |RESOLVED Resolution|---

[PATCH v2 2/2] KVM: x86: fix deadline tsc interrupt injection

2014-10-10 Thread Radim Krčmář
The check in kvm_set_lapic_tscdeadline_msr() was trying to prevent a situation where we lose a pending deadline timer in a MSR write. Losing it is fine, because it effectively occurs before the timer fired, so we should be able to cancel or postpone it. Another problem comes from interaction with

[PATCH v2 1/2] KVM: x86: add apic_timer_expired()

2014-10-10 Thread Radim Krčmář
Make the code reusable. If the timer was already pending, we shouldn't be waiting in a queue, so wake_up can be skipped, simplifying the path. There is no 'reinject' case => the comment is removed. Current race behaves correctly. Signed-off-by: Radim Krčmář --- Not sure about the FIXME, and it

[PATCH v2 0/2] deadline TSC multi injection fix

2014-10-10 Thread Radim Krčmář
First patch refactors code and introduces a minor should-not-happen optimization. Second patch fixes the bug and improves handling of passed deadline timers. I still haven't looked at Amit's proposed optimization (not recomputing the value of hrtimer on rewrites) long enough to be able to sign it

Re: [PATCH v2 13/13] vfio: powerpc/spapr: Enable Dynamic DMA windows

2014-10-10 Thread Alexey Kardashevskiy
On 09/23/2014 11:56 PM, Alex Williamson wrote: > On Tue, 2014-09-23 at 13:01 +1000, Alexey Kardashevskiy wrote: >> This defines and implements VFIO IOMMU API which lets the userspace >> create and remove DMA windows. >> >> This updates VFIO_IOMMU_SPAPR_TCE_GET_INFO to return the number of >> availa

Re: [PATCH v3 3/3] arm64: Allow 48-bits VA space without ARM_SMMU

2014-10-10 Thread Christoffer Dall
On Fri, Oct 10, 2014 at 04:10:53PM +0100, Catalin Marinas wrote: > On Fri, Oct 10, 2014 at 11:14:30AM +0100, Christoffer Dall wrote: > > Now when KVM has been reworked to support 48-bits host VA space, we can > > allow systems to be configured with this option. However, the ARM SMMU > > driver als

[PATCH] Documentation: virtual: kvm: correct one bit description in APF case

2014-10-10 Thread Tiejun Chen
When commit 6adba5274206 (KVM: Let host know whether the guest can handle async PF in non-userspace context.) is introduced, actually bit 2 still is reserved and should be zero. Instead, bit 1 is 1 to indicate if asynchronous page faults can be injected when vcpu is in cpl == 0, and also please see

bug: host crash when vf is passthrough to vm.

2014-10-10 Thread ChenLiang
Hi all: kernel: 3.0.93-0.8-default qemu: 1.5 crash log: [134397.708857] BUG: unable to handle kernel NULL pointer dereference at 0012 [134397.717334] IP: [] iommu_disable_dev_iotlb+0x15/0x30 [134397.724268] PGD 0 [134397.726686] Oops: [#1] SMP [134397.730335] kbox: Begin to han

Re: [PATCH] Documentation: virtual: kvm: correct one bit description in APF case

2014-10-10 Thread Paolo Bonzini
Il 11/10/2014 03:19, Tiejun Chen ha scritto: > When commit 6adba5274206 (KVM: Let host know whether the guest can > handle async PF in non-userspace context.) is introduced, actually > bit 2 still is reserved and should be zero. Instead, bit 1 is 1 to > indicate if asynchronous page faults can be i

[Bug?] qemu abort when trying to passthrough BCM5719 Gigabit Ethernet

2014-10-10 Thread zhanghailiang
Hi all, When i try to passthrough BCM5719 Gigabit Ethernet to guest using the qemu master branch, it aborted, and show kvm_set_phys_mem:error registering slot:Bad Address. qemu command: #./qemu/qemu/x86_64-softmmu/qemu-system-x86_64 --enable-kvm -smp 4 -m 4096 -vnc :99 -device virtio-scsi-pci,