On 04/08/2015 02:34 PM, Xiao Guangrong wrote:
We noticed that KVM keeps tracking dirty for the memslots when
live migration failed which causes bad performance due to huge
page mapping disallowed for this kind of memslot
It is caused by slot flags does not properly sync-ed between Qemu
and KVM
We noticed that KVM keeps tracking dirty for the memslots when
live migration failed which causes bad performance due to huge
page mapping disallowed for this kind of memslot
It is caused by slot flags does not properly sync-ed between Qemu
and KVM. Current code doing slot update depends on slot-
Guest can't be booted w/ ept=0, there is a message dumped as below:
If you're running a guest on an Intel machine without unrestricted mode
support, the failure can be most likely due to the guest entering an invalid
state for Intel VT. For example, the guest maybe running in big real mode
which i
Hi Alex,
With your change "Release devices with BusMaster disabled", I've found
that my VFIO device driver is no longer receiving MSI interrupts.
After reviewing the code I think it makes sense. But I had two
questions below while debugging my issue.
1. If I had set the bus master bit in the com
On Wed, 11 Mar 2015, James Hogan wrote:
> When handling floating point exceptions (FPEs) and MSA FPEs the Cause
> bits of the appropriate control and status register (FCSR for FPEs and
> MSACSR for MSA FPEs) are read and cleared before enabling interrupts,
> presumably so that it doesn't have to g
3.13.11-ckt19 -stable review patch. If anyone has any objections, please let
me know.
--
From: James Hogan
commit b3cffac04eca9af46e1e23560a8ee22b1bd36d43 upstream.
Currently the guest exit trace event saves the VCPU pointer to the
structure, and the guest PC is retrieved by
We dirtied only one page because writes originally couldn't span more.
Use improved syntax for '>> PAGE_SHIFT' while at it.
Fixes: 8f964525a121 ("KVM: Allow cross page reads and writes from cached
translations.")
Signed-off-by: Radim Krčmář
---
The function handles cross memslot writes in a dif
Paolo Bonzini writes:
> On 07/04/2015 18:17, Bandan Das wrote:
>> > I think a bool argument is good enough. QEMU has different functions,
>> > and init ends up doing save/reset/restore which is pretty ugly.
>>
>> Right, I meant that init could just be a wrapper so that it atleast shows up
>> i
On 07/04/2015 18:17, Bandan Das wrote:
> > I think a bool argument is good enough. QEMU has different functions,
> > and init ends up doing save/reset/restore which is pretty ugly.
>
> Right, I meant that init could just be a wrapper so that it atleast shows up
> in
> a backtrace - could be he
Paolo Bonzini writes:
> On 02/04/2015 04:17, Bandan Das wrote:
>>> > x86 architecture defines differences between the reset and INIT sequences.
>>> > INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC,
>>> > PMU,
>>> > MSRs (in general), MTRRs machine-check, APIC ID, APIC arbi
On 16/03/2015 13:54, Christoffer Dall wrote:
> Hi Marcelo and Paolo,
>
> Please pull the following fixes for KVM/ARM for 4.0-rc5.
>
> They fix page refcounting issues in our Stage-2 page table management code, a
> missing unlock in a gicv3 error path, and a race that can cause lost
> interrupt
On Tue, Apr 07, 2015 at 02:19:31PM +0200, Greg Kurz wrote:
> This patch brings cross-endian support to vhost when used to implement
> legacy virtio devices. Since it is a relatively rare situation, the
> feature availability is controlled by a kernel config option (not set
> by default).
>
> The i
On Tue, 7 Apr 2015 17:55:08 +0200
"Michael S. Tsirkin" wrote:
> On Tue, Apr 07, 2015 at 02:09:29PM +0200, Greg Kurz wrote:
> > Hi,
> >
> > This patchset allows vhost to be used with legacy virtio when guest and host
> > have a different endianness.
> >
> > Patches 1-6 remain the same as the pre
On Tue, Apr 07, 2015 at 02:15:52PM +0200, Greg Kurz wrote:
> The current memory accessors logic is:
> - little endian if little_endian
> - native endian (i.e. no byteswap) if !little_endian
>
> If we want to fully support cross-endian vhost, we also need to be
> able to convert to big endian.
>
>
On Tue, Apr 07, 2015 at 02:09:29PM +0200, Greg Kurz wrote:
> Hi,
>
> This patchset allows vhost to be used with legacy virtio when guest and host
> have a different endianness.
>
> Patches 1-6 remain the same as the previous post. Patch 7 was heavily changed
> according to MST's comments.
This s
On Tue, Apr 07, 2015 at 02:19:31PM +0200, Greg Kurz wrote:
> This patch brings cross-endian support to vhost when used to implement
> legacy virtio devices. Since it is a relatively rare situation, the
> feature availability is controlled by a kernel config option (not set
> by default).
>
> The i
On 03/04/2015 09:40, Wanpeng Li wrote:
> There are two scenarios for the requirement of collapsing small sptes
> into large sptes.
> - dirty logging tracks sptes in 4k granularity, so large sptes are split,
> the large sptes will be reallocated in the destination machine and the
> guest in th
On Tue, 07 Apr 2015 14:19:31 +0200
Greg Kurz wrote:
> This patch brings cross-endian support to vhost when used to implement
> legacy virtio devices. Since it is a relatively rare situation, the
> feature availability is controlled by a kernel config option (not set
> by default).
>
> The ioctls
On 28/03/2015 23:27, Eugene Korenevsky wrote:
> Emulate #DB generation on task switch if TSS.T is set according to Intel SDM.
> The processor generates a debug exception after a task switch if the T flag of
> the new task's TSS is set. This exception is generated after program control
> has passe
On 02/04/2015 02:10, Nadav Amit wrote:
> This set includes 2 previous patches that deal with the INIT flow that is not
> distinguished from regular boot, and allowing the VM to change BSP (which is
> used in very certain testing environments). The next 2 patches are new,
> dealing
> with regress
On 02/04/2015 02:10, Nadav Amit wrote:
> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
> index 155534c..1ef4c0d 100644
> --- a/arch/x86/kvm/svm.c
> +++ b/arch/x86/kvm/svm.c
> @@ -1195,7 +1195,7 @@ static void init_vmcb(struct vcpu_svm *svm)
> enable_gif(svm);
> }
>
> -static void
On 07/04/2015 14:47, Radim Krčmář wrote:
> I think it was correct. Both are guest only, the revert just missed
> some races. (0a4e6be9ca17 has misleading commit message ...)
Oops. You're right.
Paolo
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On 02/04/2015 04:17, Bandan Das wrote:
>> > x86 architecture defines differences between the reset and INIT sequences.
>> > INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
>> > MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and
>> > BSP.
>> >
>>
On 02/04/2015 02:10, Nadav Amit wrote:
> x86 architecture defines differences between the reset and INIT sequences.
> INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU,
> MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP.
>
> EFER is supposed N
On 03/03/2015 21:42, Radim Krčmář wrote:
> 2015-03-03 13:48-0600, Joel Schopp:
+ unsigned long new_rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
>>> Shouldn't we handle writes in EAX differently than in AX and AL, because
>>> of implicit zero extension.
>> I don't think the implicit zero ex
2015-04-07 13:11+0200, Paolo Bonzini:
> On 02/04/2015 20:44, Radim Krčmář wrote:
> > If we were migrated right after __getcpu, but before reading the
> > migration_count, we wouldn't notice that we read TSC of a different
> > VCPU, nor that KVM's bug made pvti invalid, as only migration_count
> > o
On 12/02/2015 19:41, Radim Krčmář wrote:
> +static inline void
> +apic_logical_id(struct kvm_apic_map *map, u32 dest_id, u16 *cid, u16 *lid)
> +{
> + BUILD_BUG_ON(KVM_APIC_MODE_XAPIC_CLUSTER != 4);
> + BUILD_BUG_ON(KVM_APIC_MODE_XAPIC_FLAT!= 8);
> + BUILD_BUG_ON(KVM_APIC_MODE_X2
This patch brings cross-endian support to vhost when used to implement
legacy virtio devices. Since it is a relatively rare situation, the
feature availability is controlled by a kernel config option (not set
by default).
The ioctls introduced by this patch are for legacy only: virtio 1.0
devices
The current memory accessors logic is:
- little endian if little_endian
- native endian (i.e. no byteswap) if !little_endian
If we want to fully support cross-endian vhost, we also need to be
able to convert to big endian.
Instead of changing the little_endian argument to some 3-value enum, this
Signed-off-by: Greg Kurz
---
drivers/vhost/vhost.h | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/vhost/vhost.h b/drivers/vhost/vhost.h
index 8c1c792..6a49960 100644
--- a/drivers/vhost/vhost.h
+++ b/drivers/vhost/vhost.h
@@ -173,34 +173,39 @@ sta
Signed-off-by: Greg Kurz
---
include/linux/vringh.h | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/linux/vringh.h b/include/linux/vringh.h
index a3fa537..3ed62ef 100644
--- a/include/linux/vringh.h
+++ b/include/linux/vringh.h
@@ -226,33 +226,38 @
Signed-off-by: Greg Kurz
---
include/linux/virtio_config.h | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/include/linux/virtio_config.h b/include/linux/virtio_config.h
index ca3ed78..bd1a582 100644
--- a/include/linux/virtio_config.h
+++ b/include/linux/v
Signed-off-by: Greg Kurz
---
drivers/net/tun.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index 857dca4..3c3d6c0 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -206,14 +206,19 @@ struct tun_struct {
u32
Signed-off-by: Greg Kurz
---
drivers/net/macvtap.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index 27ecc5c..a2f2958 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -49,14 +49,19 @@ struct macvtap
Hi,
This patchset allows vhost to be used with legacy virtio when guest and host
have a different endianness.
Patches 1-6 remain the same as the previous post. Patch 7 was heavily changed
according to MST's comments.
---
Greg Kurz (7):
virtio: introduce virtio_is_little_endian() helper
On 29/03/2015 22:56, Eugene Korenevsky wrote:
> cpuid_maxphyaddr() which performs lot of memory accesses is called extensively
> across KVM, especially in nVMX code.
> This patch adds cached value of maxphyaddr to vcpu.arch to reduce the
> pressure onto
> CPU cache and simplify the code of cpuid
On 02/04/2015 21:11, Radim Krčmář wrote:
> Exposing the on-stack error code with internal error is cheap and
> potentially useful.
>
> Signed-off-by: Radim Krčmář
> ---
> arch/x86/kvm/vmx.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/vmx.c b/arch/x8
On 02/04/2015 20:44, Radim Krčmář wrote:
> If we were migrated right after __getcpu, but before reading the
> migration_count, we wouldn't notice that we read TSC of a different
> VCPU, nor that KVM's bug made pvti invalid, as only migration_count
> on source VCPU is increased.
>
> Change vdso i
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