On Fri, May 29, 2015 at 06:44:44PM +1000, Alexey Kardashevskiy wrote:
At the moment the DMA setup code looks for the ibm,opal-tce-kill
property which contains the TCE kill register address. Writing to
this register invalidates TCE cache on IODA/IODA2 hub.
This moves the register address from
On Fri, May 29, 2015 at 06:44:41PM +1000, Alexey Kardashevskiy wrote:
Modern IBM POWERPC systems support multiple (currently two) TCE tables
per IOMMU group (a.k.a. PE). This adds a iommu_table_group container
for TCE tables. Right now just one table is supported.
For IODA, instead of
On Fri, May 29, 2015 at 06:44:42PM +1000, Alexey Kardashevskiy wrote:
This adds tce_iommu_take_ownership() and tce_iommu_release_ownership
which call in a loop iommu_take_ownership()/iommu_release_ownership()
for every table on the group. As there is just one now, no change in
behaviour is
On Fri, May 29, 2015 at 06:44:45PM +1000, Alexey Kardashevskiy wrote:
The iommu_table struct keeps a list of IOMMU groups it is used for.
At the moment there is just a single group attached but further
patches will add TCE table sharing. When sharing is enabled, TCE cache
in each PE needs to
On Fri, May 29, 2015 at 06:44:47PM +1000, Alexey Kardashevskiy wrote:
At the moment writing new TCE value to the IOMMU table fails with EBUSY
if there is a valid entry already. However PAPR specification allows
the guest to write new TCE value without clearing it first.
Another problem this
On 01/06/2015 13:42, Christian Borntraeger wrote:
Am 01.06.2015 um 13:34 schrieb Paolo Bonzini:
On 01/06/2015 09:47, Christian Borntraeger wrote:
1: disable, guest, disable again and save, restore to disable,
enable
and now it is
2: disable, guest, enable
and with your patch it is
3:
On 27.05.15 14:05, Laurent Pinchart wrote:
Even though 'compatability' has a dedicated entry in the Wiktionary,
it's listed as 'Mispelling of compatibility'. Fix it.
Signed-off-by: Laurent Pinchart laurent.pinch...@ideasonboard.com
---
arch/metag/include/asm/elf.h | 2 +-
Am 01.06.2015 um 13:34 schrieb Paolo Bonzini:
On 01/06/2015 09:47, Christian Borntraeger wrote:
1: disable, guest, disable again and save, restore to disable,
enable
and now it is
2: disable, guest, enable
and with your patch it is
3: disable, guest, enable, disable, enable
I assume
On 01/06/2015 09:47, Christian Borntraeger wrote:
1: disable, guest, disable again and save, restore to disable,
enable
and now it is
2: disable, guest, enable
and with your patch it is
3: disable, guest, enable, disable, enable
I assume that 3 and 1 are similar in its costs, so this
Will Deacon will.dea...@arm.com writes:
Hi Alex,
On Fri, May 29, 2015 at 10:30:26AM +0100, Alex Bennée wrote:
This adds support for userspace to control the HW debug registers for
guest debug. In the debug ioctl we copy the IMPDEF defined number of
registers into a new register set called
Am 28.05.2015 um 20:49 schrieb Christoffer Dall:
Until now we have been calling kvm_guest_exit after re-enabling
interrupts when we come back from the guest, but this has the
unfortunate effect that CPU time accounting done in the context of timer
interrupts occurring while the guest is
On Sun, May 31, 2015 at 05:27:10AM +0100, Zhichao Huang wrote:
Until now we enable debug mode all the time even if we don't
actually need it.
Inspired by the implementation in arm64, disable debug mode if
we don't need it. And then we are able to reduce unnecessary
registers
On Mon, Jun 01, 2015 at 09:47:46AM +0200, Christian Borntraeger wrote:
Am 28.05.2015 um 20:49 schrieb Christoffer Dall:
Until now we have been calling kvm_guest_exit after re-enabling
interrupts when we come back from the guest, but this has the
unfortunate effect that CPU time accounting
On 30/05/2015 12:59, Xiao Guangrong wrote:
- kvm_mtrr_get_guest_memory_type() only checks one page in MTRRs so that
it's unnecessary to check to see if the range is partially covered in
MTRR
- optimize the check of overlap memory type and add some comments to explain
the
On 01/06/2015 11:36, Paolo Bonzini wrote:
Does this have a performance impact on shadow? Perhaps we could cache
in struct kvm_arch_memory_slot whether the memslot is covered by MTRRs?
Nevermind, patch 15 answers my question.
Paolo
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Am 01.06.2015 um 11:08 schrieb Christoffer Dall:
Second, looking at the ppc and mips code, they seem to also call
kvm_guest_exit() before enabling interrupts, so I don't understand how
guest CPU time accounting works on those architectures.
Not an expert here, but I assume mips has the same
On 30/05/2015 12:59, Xiao Guangrong wrote:
Currently guest MTRR is completely prohibited if cache snoop is supported on
IOMMU (!noncoherent_dma) and host does the emulation based on the knowledge
from host side, however, host side is not the good point to know
what the purpose of guest is. A
On Fri, May 29, 2015 at 05:30:15PM +0100, Marc Zyngier wrote:
If a GICv3-enabled guest tries to configure Group0, we print a
warning on the console (because we don't support Group0 interrupts).
This is fairly pointless, and would allow a guest to spam the
console. Let's just drop the
Hi Zhichao,
On 31/05/15 05:27, Zhichao Huang wrote:
Hardware debugging in guests is not intercepted currently, it means
that a malicious guest can bring down the entire machine by writing
to the debug registers.
This patch enable trapping of all debug registers, preventing the guests
to
On Fri, May 29, 2015 at 06:44:49PM +1000, Alexey Kardashevskiy wrote:
This is a part of moving TCE table allocation into an iommu_ops
callback to support multiple IOMMU groups per one VFIO container.
This moves the code which allocates the actual TCE tables to helpers:
On 30/05/2015 12:59, Xiao Guangrong wrote:
Use union definition to avoid the decode/code workload and drop all the
hard code
Signed-off-by: Xiao Guangrong guangrong.x...@linux.intel.com
---
arch/x86/include/asm/kvm_host.h | 12 ++--
arch/x86/kvm/mtrr.c | 19
On 30/05/2015 12:59, Xiao Guangrong wrote:
Sort all valid variable MTRRs based on its base address, it will help us to
check a range to see if it's fully contained in variable MTRRs
Signed-off-by: Xiao Guangrong guangrong.x...@linux.intel.com
---
arch/x86/include/asm/kvm_host.h | 3 +++
On 30/05/2015 12:59, Xiao Guangrong wrote:
+struct mtrr_looker {
+ /* input fields. */
+ struct kvm_mtrr *mtrr_state;
+ u64 start;
+ u64 end;
s/looker/iter/ or s/looker/lookup/
+static void mtrr_lookup_start(struct mtrr_looker *looker)
+{
+ looker-mem_type = -1;
+
On Fri, Apr 24, 2015 at 02:24:38PM +0200, Greg Kurz wrote:
Signed-off-by: Greg Kurz gk...@linux.vnet.ibm.com
Dave, could you please ack merging this through
the virtio tree?
---
drivers/net/tun.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
Hi Alex,
On Fri, May 29, 2015 at 10:30:26AM +0100, Alex Bennée wrote:
This adds support for userspace to control the HW debug registers for
guest debug. In the debug ioctl we copy the IMPDEF defined number of
registers into a new register set called host_debug_state. There is now
a new vcpu
On 30/05/2015 12:59, Xiao Guangrong wrote:
This table summarizes the information of fixed MTRRs and introduce some APIs
to abstract its operation which helps us to clean up the code and will be
used in later patches
Signed-off-by: Xiao Guangrong guangrong.x...@linux.intel.com
---
On Fri, Apr 24, 2015 at 02:24:48PM +0200, Greg Kurz wrote:
Signed-off-by: Greg Kurz gk...@linux.vnet.ibm.com
Dave, could you pls ack merging this through the virtio tree?
---
drivers/net/macvtap.c |9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git
On 05/30/2015 11:59 PM, Christoffer Dall wrote:
Hi Mario,
On Fri, May 29, 2015 at 03:34:47PM -0700, Mario Smarduch wrote:
On 05/28/2015 11:49 AM, Christoffer Dall wrote:
Until now we have been calling kvm_guest_exit after re-enabling
interrupts when we come back from the guest, but this has
On Mon, Jun 01, 2015 at 11:21:19AM +0200, Christian Borntraeger wrote:
Am 01.06.2015 um 11:08 schrieb Christoffer Dall:
Second, looking at the ppc and mips code, they seem to also call
kvm_guest_exit() before enabling interrupts, so I don't understand how
guest CPU time accounting works
Am 01.06.2015 um 15:35 schrieb Christoffer Dall:
On Mon, Jun 01, 2015 at 11:21:19AM +0200, Christian Borntraeger wrote:
Am 01.06.2015 um 11:08 schrieb Christoffer Dall:
Second, looking at the ppc and mips code, they seem to also call
kvm_guest_exit() before enabling interrupts, so I don't
On 01/06/2015 11:33, Paolo Bonzini wrote:
+looker-mem_type = looker-mtrr_state-fixed_ranges[index];
+ looker-start = fixed_mtrr_range_end_addr(seg, index);
+ return true;
in mtrr_lookup_fixed_start is the same as this:
+ end = fixed_mtrr_range_end_addr(looker-seg,
The following changes since commit c65b99f046843d2455aa231747b5a07a999a9f3d:
Linux 4.1-rc6 (2015-05-31 19:01:07 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git tags/for_linus
for you to fetch changes up to
The mail subject is wrong or course - the one in
the pull request is correct.
Sorry about that - this shouldn't interfere with merging it, I'll
correct it for future requests.
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MST
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From: Michael S. Tsirkin m...@redhat.com
Date: Mon, 1 Jun 2015 12:30:16 +0200
On Fri, Apr 24, 2015 at 02:24:48PM +0200, Greg Kurz wrote:
Signed-off-by: Greg Kurz gk...@linux.vnet.ibm.com
Dave, could you pls ack merging this through the virtio tree?
Acked-by: David S. Miller
From: Michael S. Tsirkin m...@redhat.com
Date: Mon, 1 Jun 2015 12:29:43 +0200
On Fri, Apr 24, 2015 at 02:24:38PM +0200, Greg Kurz wrote:
Signed-off-by: Greg Kurz gk...@linux.vnet.ibm.com
Dave, could you please ack merging this through
the virtio tree?
Acked-by: David S. Miller
On Fri, May 29, 2015 at 06:44:51PM +1000, Alexey Kardashevskiy wrote:
TCE tables might get too big in case of 4K IOMMU pages and DDW enabled
on huge guests (hundreds of GB of RAM) so the kernel might be unable to
allocate contiguous chunk of physical memory to store the TCE table.
To address
On Fri, May 29, 2015 at 06:44:50PM +1000, Alexey Kardashevskiy wrote:
This is a part of moving DMA window programming to an iommu_ops
callback. pnv_pci_ioda2_set_window() takes an iommu_table_group as
a first parameter (not pnv_ioda_pe) as it is going to be used as
a callback for VFIO DDW
On Fri, May 29, 2015 at 06:44:57PM +1000, Alexey Kardashevskiy wrote:
The existing implementation accounts the whole DMA window in
the locked_vm counter. This is going to be worse with multiple
containers and huge DMA windows. Also, real-time accounting would requite
additional tracking of
On Fri, May 29, 2015 at 06:44:55PM +1000, Alexey Kardashevskiy wrote:
Before the IOMMU user (VFIO) would take control over the IOMMU table
belonging to a specific IOMMU group. This approach did not allow sharing
tables between IOMMU groups attached to the same container.
This introduces a
On Fri, May 29, 2015 at 06:44:53PM +1000, Alexey Kardashevskiy wrote:
The existing code programmed TVT#0 with some address and then
immediately released that memory.
This makes use of pnv_pci_ioda2_unset_window() and
pnv_pci_ioda2_set_bypass() which do correct resource release and
TVT
On Fri, May 29, 2015 at 06:44:56PM +1000, Alexey Kardashevskiy wrote:
We are adding support for DMA memory pre-registration to be used in
conjunction with VFIO. The idea is that the userspace which is going to
run a guest may want to pre-register a user space memory region so
it all gets
On Fri, May 29, 2015 at 06:44:58PM +1000, Alexey Kardashevskiy wrote:
This adds create/remove window ioctls to create and remove DMA windows.
sPAPR defines a Dynamic DMA windows capability which allows
para-virtualized guests to create additional DMA windows on a PCI bus.
The existing linux
On Fri, May 29, 2015 at 06:44:52PM +1000, Alexey Kardashevskiy wrote:
This extends iommu_table_group_ops by a set of callbacks to support
dynamic DMA windows management.
create_table() creates a TCE table with specific parameters.
it receives iommu_table_group to know nodeid in order to
On Fri, May 29, 2015 at 06:44:54PM +1000, Alexey Kardashevskiy wrote:
This adds a way for the IOMMU user to know how much a new table will
use so it can be accounted in the locked_vm limit before allocation
happens.
This stores the allocated table size in pnv_pci_ioda2_get_table_size()
so
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