On 01/08/2015 23:20, Bandan Das wrote:
Actually it should be using the RTC alarm to wake itself up. But the
firmware changed recently and the ACPI PMBASE moved from 0xb000 to
0x600. Try this (untested):
Ah thanks! your patch works for me. Is this one of the static entries in
the ACPI
On Fri, Jul 31, 2015 at 09:17:12PM +0200, Andrew Jones wrote:
On Fri, Jul 31, 2015 at 04:53:59PM +0100, Alex Bennée wrote:
From: Alex Bennée a...@bennee.com
The previous $(getconf _NPROCESSORS_CONF) isn't correct as the default
maximum VCPU configuration is 4 on arm64 machines which
On Fri, Jul 31, 2015 at 04:53:54PM +0100, Alex Bennée wrote:
This makes the script a little cleaner by only checking for KVM support
in one place. If KVM isn't available we can fall back to TCG emulation
and echo the fact to the screen rather than let QEMU complain.
Signed-off-by: Alex
On Fri, Jul 31, 2015 at 04:53:50PM +0100, Alex Bennée wrote:
Hi,
This is the current state of my MTTCG tests based on the KVM's unit
testing framework. The earlier patches in the series have already been
reviewed and will (with the exception of the emacs patch) be making
their way upstream.
On 31/07/15 14:22, Eric Auger wrote:
Salut Eric,
On 07/10/2015 04:21 PM, Andre Przywara wrote:
When userland wants to inject a MSI into the guest, we have to use
our data structures to find the LPI number and the VCPU to receive
the interrupt.
Use the wrapper functions to iterate the linked
On 31/07/15 13:59, Eric Auger wrote:
Hi Andre,
On 07/11/2015 01:17 AM, Andre Przywara wrote:
On 09/07/15 09:22, Eric Auger wrote:
If the ITS modality is not available, let's simply support MSI
injection by transforming the MSI.data into an SPI ID.
This becomes possible to use KVM_SIGNAL_MSI
Paolo Bonzini wrote on 2015-07-31:
On 31/07/2015 01:26, Zhang, Yang Z wrote:
Do not compute TMR in advance. Instead, set the TMR just before
the interrupt is accepted into the IRR. This limits the coupling
between IOAPIC and LAPIC.
Uh.., it back to original way which is wrong. You
On Fri, 2015-17-07 at 10:46:58 UTC, Thomas Huth wrote:
The EPOW interrupt handler uses rtas_get_sensor(), which in turn
uses rtas_busy_delay() to wait for RTAS becoming ready in case it
is necessary. But rtas_busy_delay() is annotated with might_sleep()
and thus may not be used by interrupts
Paolo Bonzini wrote on 2015-07-31:
On 31/07/2015 04:49, Steve Rutherford wrote:
Oh... Yeah. That's a damn good point, given that the interrupt can be
injected from another thread while one is in that guest vcpu.
Easiest time to update the TMR should be on guest entry through
