On 2015/10/16 23:06, Wei Huang wrote:
>
>
> On 09/24/2015 05:31 PM, Shannon Zhao wrote:
>> Since the reset value of PMCCNTR is UNKNOWN, use reset_unknown for its
>> reset handler. Add a new case to emulate reading to PMCCNTR register.
>>
>> Signed-off-by: Shannon Zhao
>> ---
>> arch/arm64/kvm
On 21/10/2015 00:57, Wanpeng Li wrote:
>> kvm_sched_out and kvm_sched_in are part of KVM's preemption hooks. The
>> hooks are registered only between vcpu_load and vcpu_put, therefore they
>> know that the mutex is taken. The sequence will go like this:
>>
>> vcpu_load
>> kvm_sched_ou
On 2015/10/16 14:08, Wei Huang wrote:
>> +/**
>> > + * kvm_pmu_get_counter_value - get PMU counter value
>> > + * @vcpu: The vcpu pointer
>> > + * @select_idx: The counter index
>> > + */
>> > +unsigned long kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u32
>> > select_idx)
>> > +{
>> > + u6
On 2015/10/16 13:35, Wei Huang wrote:
>
> On 09/24/2015 05:31 PM, Shannon Zhao wrote:
>> > Add reset handler which gets host value of PMCR_EL0 and make writable
>> > bits architecturally UNKNOWN. Add a common access handler for PMU
>> > registers which emulates writing and reading register and a
Reference SDM 3.4.3:
Following initialization of the processor (either by asserting the
RESET pin or the INIT pin), the state of the EFLAGS register is
0002H.
However, the eflags fixed bit is not set and other bits are also not
cleared during the init/reset in kvm.
This patch fix it by se
On 10/20/2015 12:24 AM, Christoffer Dall wrote:
> On Mon, Oct 19, 2015 at 04:25:04PM -0700, Mario Smarduch wrote:
>>
>>
>> On 10/19/2015 3:14 AM, Christoffer Dall wrote:
>>> On Sat, Sep 26, 2015 at 04:43:29PM -0700, Mario Smarduch wrote:
This patch enhances current lazy vfp/simd hardware swi
Yes, VM1 results are as before.
Alexey
On Tue, Oct 20, 2015 at 4:04 PM, Wanpeng Li wrote:
> On 10/21/15 4:05 AM, Alexey Makhalov wrote:
>>
>> 'echo NO_NONTASK_CAPACITY > /sys/kernel/debug/sched_features' in both
>> guests.
>> Results:
>> VM1: STA is disabled -- no changes, still little bit bell
On 10/21/15 4:05 AM, Alexey Makhalov wrote:
'echo NO_NONTASK_CAPACITY > /sys/kernel/debug/sched_features' in both guests.
Results:
VM1: STA is disabled -- no changes, still little bit bellow expected 90%
VM2: STA is enabled -- result is changed, but still bad. Hard to say
better or worse. It pre
On 10/20/15 11:44 PM, Paolo Bonzini wrote:
On 20/10/2015 11:57, Yacine wrote:
vcpu_load; start cr3 trapping; vcpu_put
it worked correctly (in my logs I see that vcpu.cpu become equal to "cpu =
raw_smp_processor_id();") but the VM blocks for a lot of time due to mutex
in vcpu_load (up to server
From: Paolo Bonzini
The format of the role word has changed through the years and the plugin
was never updated; some VMX exit reasons were missing too.
Signed-off-by: Paolo Bonzini
Acked-by: Steven Rostedt
Cc: David Ahern
Cc: Namhyung Kim
Cc: kvm@vger.kernel.org
Link:
http://lkml.kernel.org
'echo NO_NONTASK_CAPACITY > /sys/kernel/debug/sched_features' in both guests.
Results:
VM1: STA is disabled -- no changes, still little bit bellow expected 90%
VM2: STA is enabled -- result is changed, but still bad. Hard to say
better or worse. It prefers to stuck at quarters (100% 75% 50% 25%)
O
W dniu 20.10.2015 o 19:44, Laszlo Ersek pisze:
> Hi,
>
> On 10/20/15 19:27, Janusz wrote:
>> W dniu 15.10.2015 o 20:46, Laszlo Ersek pisze:
>>> On 10/15/15 18:53, Kinney, Michael D wrote:
Laszlo,
There is already a PCD for this timeout that is used by CpuMpPei.
gUefiCpuP
Hi Alex,
On 10/19/2015 09:45 PM, Alex Williamson wrote:
> On Sun, 2015-10-18 at 18:00 +0200, Eric Auger wrote:
>> In preparation for subsequent changes in reset function lookup,
>> lets introduce a dynamic list of reset combos (compat string,
>> reset module, reset function). The list can be popula
Hi,
On 10/20/15 19:27, Janusz wrote:
> W dniu 15.10.2015 o 20:46, Laszlo Ersek pisze:
>> On 10/15/15 18:53, Kinney, Michael D wrote:
>>> Laszlo,
>>>
>>> There is already a PCD for this timeout that is used by CpuMpPei.
>>>
>>> gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds
>>>
>>>
On 10/20/2015 11:44 AM, Christoffer Dall wrote:
> On Tue, Oct 20, 2015 at 11:08:44AM +0200, Eric Auger wrote:
>> Hi Christoffer,
>> On 10/17/2015 10:30 PM, Christoffer Dall wrote:
>>> We currently do a single update of the vgic state when the distrbutor
>> distributor
>>> enable/disable control reg
W dniu 15.10.2015 o 20:46, Laszlo Ersek pisze:
> On 10/15/15 18:53, Kinney, Michael D wrote:
>> Laszlo,
>>
>> There is already a PCD for this timeout that is used by CpuMpPei.
>>
>> gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds
>>
>> I noticed that CpuDxe is using a hard coded AP
On 10/21/2015 12:26 AM, Xiao Guangrong wrote:
On 10/20/2015 11:51 PM, Stefan Hajnoczi wrote:
On Mon, Oct 19, 2015 at 08:54:14AM +0800, Xiao Guangrong wrote:
+exit:
+/* Write our output result to dsm memory. */
+((dsm_out *)dsm_ram_addr)->len = out->len;
Missing byteswap?
I though
On 10/20/2015 11:51 PM, Stefan Hajnoczi wrote:
On Mon, Oct 19, 2015 at 08:54:14AM +0800, Xiao Guangrong wrote:
+exit:
+/* Write our output result to dsm memory. */
+((dsm_out *)dsm_ram_addr)->len = out->len;
Missing byteswap?
I thought you were going to remove this field because it
On Tue, 20 Oct 2015 12:50:26 -0300
Arnaldo Carvalho de Melo wrote:
> Cool, Steven, can I take that as an Acked-by for this patch?
>
Acked-by: Steven Rostedt
-- Steve
--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to majord...@vger.kernel.org
More ma
From: Arnd Bergmann
The vgic code on ARM is built for all configurations that enable KVM,
but the parent_data field that it references is only present when
CONFIG_IRQ_DOMAIN_HIERARCHY is set:
virt/kvm/arm/vgic.c: In function 'kvm_vgic_map_phys_irq':
virt/kvm/arm/vgic.c:1781:13: error: 'struct ir
We currently do a single update of the vgic state when the distributor
enable/disable control register is accessed and then bypass updating the
state for as long as the distributor remains disabled.
This is incorrect, because updating the state does not consider the
distributor enable bit, and thi
When a guest reboots or offlines/onlines CPUs, it is not uncommon for it
to clear the pending and active states of an interrupt through the
emulated VGIC distributor. However, since the architected timers are
defined by the architecture to be level triggered and the guest
rightfully expects them t
From: Pavel Fedin
When lowering a level-triggered line from userspace, we forgot to lower
the pending bit on the emulated CPU interface and we also did not
re-compute the pending_on_cpu bitmap for the CPU affected by the change.
Update vgic_update_irq_pending() to fix the two issues above and al
From: Pavel Fedin
Jump to correct label and free kvm_host_cpu_state
Reviewed-by: Wei Huang
Signed-off-by: Pavel Fedin
Signed-off-by: Christoffer Dall
---
arch/arm/kvm/arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index dc017
We have an interesting issue when the guest disables the timer interrupt
on the VGIC, which happens when turning VCPUs off using PSCI, for
example.
The problem is that because the guest disables the virtual interrupt at
the VGIC level, we never inject interrupts to the guest and therefore
never ma
Hi Paolo,
The following changes since commit 920552b213e3dc832a874b4e7ba29ecddbab31bc:
KVM: disable halt_poll_ns as default for s390x (2015-09-25 10:31:30 +0200)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git
tags/kvm-arm-for-v4.3-rc
On Tue, Oct 20, 2015 at 04:51:49PM +0100, Stefan Hajnoczi wrote:
> On Mon, Oct 19, 2015 at 08:54:14AM +0800, Xiao Guangrong wrote:
> > +exit:
> > +/* Write our output result to dsm memory. */
> > +((dsm_out *)dsm_ram_addr)->len = out->len;
>
> Missing byteswap?
That's why I'd prefer no s
On Mon, Oct 19, 2015 at 08:54:14AM +0800, Xiao Guangrong wrote:
> +exit:
> +/* Write our output result to dsm memory. */
> +((dsm_out *)dsm_ram_addr)->len = out->len;
Missing byteswap?
I thought you were going to remove this field because it wasn't needed
by the guest.
--
To unsubscribe f
Em Tue, Oct 20, 2015 at 05:49:22PM +0200, Paolo Bonzini escreveu:
>
>
> On 20/10/2015 17:48, Steven Rostedt wrote:
> > On Tue, 20 Oct 2015 17:37:43 +0200
> > Paolo Bonzini wrote:
> >
> >> However, it frankly seems a bit academic. The parsing _will_ work,
> >> apart from printing a nonsensical
On 20/10/2015 17:48, Steven Rostedt wrote:
> On Tue, 20 Oct 2015 17:37:43 +0200
> Paolo Bonzini wrote:
>
>> However, it frankly seems a bit academic. The parsing _will_ work,
>> apart from printing a nonsensical role just like it has always done for
>> the past four years.
>
> I'm not going t
On Tue, 20 Oct 2015 17:37:43 +0200
Paolo Bonzini wrote:
> However, it frankly seems a bit academic. The parsing _will_ work,
> apart from printing a nonsensical role just like it has always done for
> the past four years.
I'm not going to be too picky about it. But things like this may seem
aca
On 20/10/2015 11:57, Yacine wrote:
> vcpu_load; start cr3 trapping; vcpu_put
>
> it worked correctly (in my logs I see that vcpu.cpu become equal to "cpu =
> raw_smp_processor_id();") but the VM blocks for a lot of time due to mutex
> in vcpu_load (up to serveral seconds and sometimes minutes !)
On 20/10/2015 17:26, Steven Rostedt wrote:
> > > > What happens if you run new perf on an older kernel. Is this new plugin
> > > > going to be screwed up? Plugins should be backward compatible.
> >
> > If you run new perf on older kernel, the new plugin will print the
> > "role" field (see kvm_
On Tue, 20 Oct 2015 17:19:12 +0200
Paolo Bonzini wrote:
>
>
> On 20/10/2015 16:44, Steven Rostedt wrote:
> > What happens if you run new perf on an older kernel. Is this new plugin
> > going to be screwed up? Plugins should be backward compatible.
>
> If you run new perf on older kernel, the n
On 20/10/2015 16:44, Steven Rostedt wrote:
> What happens if you run new perf on an older kernel. Is this new plugin
> going to be screwed up? Plugins should be backward compatible.
If you run new perf on older kernel, the new plugin will print the
"role" field (see kvm_mmu_print_role) slightly
On Tue, 20 Oct 2015 12:32:44 -0200
Arnaldo Carvalho de Melo wrote:
> > Ping? Arnaldo, ok to include this patch in my tree?
>
> Applying, I saw it before, but lost track, perhaps was waiting for
> Steven Rostedt to chime in, but now I noticed he wasn't CCed, he is now.
What happens if you run
Em Fri, Oct 09, 2015 at 10:10:13PM +0200, Paolo Bonzini escreveu:
> On 01/10/2015 12:28, Paolo Bonzini wrote:
> > The format of the role word has changed through the years and the
> > plugin was never updated; some VMX exit reasons were missing too.
> >
> > Signed-off-by: Paolo Bonzini
> > ---
>
On 10/20/2015 09:42 AM, Dmitry Vyukov wrote:
> I now have another issue. My binary fails to mmap a file within lkvm
> sandbox. The same binary works fine on host and in qemu. I've added
> strace into sandbox script, and here is the output:
>
> [pid 837] openat(AT_FDCWD, "syzkaller-shm048878722",
On Mon, Oct 19, 2015 at 5:42 PM, Andrea Arcangeli wrote:
> Hello Patrick,
>
> On Mon, Oct 12, 2015 at 11:04:11AM -0400, Patrick Donnelly wrote:
>> Hello Andrea,
>>
>> On Mon, Jun 15, 2015 at 1:22 PM, Andrea Arcangeli
>> wrote:
>> > This is an incremental update to the userfaultfd code in -mm.
>>
I now have another issue. My binary fails to mmap a file within lkvm
sandbox. The same binary works fine on host and in qemu. I've added
strace into sandbox script, and here is the output:
[pid 837] openat(AT_FDCWD, "syzkaller-shm048878722", O_RDWR|O_CLOEXEC) = 5
[pid 837] mmap(NULL, 1048576,
Hello!
> We'll get to your patches when we get to them, but seriously, you have
> to curb your eagerness a bit.
Ok, sorry for this disturbance then. It is enough for me to know it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
--
To unsubscribe from thi
On Tue, Oct 20, 2015 at 12:30:41PM +0300, Pavel Fedin wrote:
> Hello! How are things going? There was lots of activity, discussions, and
> then - silence...
>
As I told you, this is not going to make it for v4.4, and if you haven't
noticed we're getting close to the release of v4.3 and to the v
Hi, I'm a student working on virtual machine introspection.
I'm trying to implement an application on top of KVM in which I need to trap
writes to CR3 (host with 8 cores and guest with one vcpu).
When I do this when handling a VM EXIT using:
vmcs_set_bits(CPU_BASED_VM_EXEC_CONTROL, CPU_BASED_CR3_
On Tue, Oct 20, 2015 at 11:08:44AM +0200, Eric Auger wrote:
> Hi Christoffer,
> On 10/17/2015 10:30 PM, Christoffer Dall wrote:
> > We currently do a single update of the vgic state when the distrbutor
> distributor
> > enable/disable control register is accessed and then bypass updating the
> > st
Hello! How are things going? There was lots of activity, discussions, and then
- silence...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Pav
Hi Christoffer,
On 10/17/2015 10:30 PM, Christoffer Dall wrote:
> We currently do a single update of the vgic state when the distrbutor
distributor
> enable/disable control register is accessed and then bypass updating the
> state for as long as the distributor remains disabled.
>
> This is incorr
This patch moves the field of TSC scaling ratio from the architecture
struct vcpu_svm to the common struct kvm_vcpu_arch.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/kvm_host.h | 1 +
arch/x86/kvm/svm.c | 23 +--
arch/x86/kvm/x86.c | 5 +
This patch makes kvm-intel to return a scaled host TSC plus the TSC
offset when handling guest readings to MSR_IA32_TSC.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index
VMX and SVM calculate the TSC scaling ratio in a similar logic, so this
patch generalizes it to a common TSC scaling function.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/svm.c | 48 +++--
arch/x86/kvm/x86.c | 45 +++
include
Both VMX and SVM propagate virtual_tsc_khz in the same way, so this
patch removes the call-back set_tsc_khz() and replaces it with a common
function.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/kvm_host.h | 1 -
arch/x86/kvm/svm.c | 36
a
For both VMX and SVM, if the 2nd argument of call-back
adjust_tsc_offset() is the host TSC, then adjust_tsc_offset() will scale
it first. This patch moves this common TSC scaling logic to its caller
adjust_tsc_offset_host() and rename the call-back adjust_tsc_offset() to
adjust_tsc_offset_guest().
This patch exhances kvm-intel module to enable VMX TSC scaling and
collects information of TSC scaling ratio during initialization.
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/vmx.h | 3 +++
arch/x86/kvm/vmx.c | 19 ++-
2 files changed, 21 insertions(+), 1 del
This patchset adds support for VMX TSC scaling feature which is
available on Intel Skylake CPU. The specification of VMX TSC scaling
can be found at
http://www.intel.com/content/www/us/en/processors/timestamp-counter-scaling-virtualization-white-paper.html
VMX TSC scaling allows guest TSC which is
The number of bits of the fractional part of the 64-bit TSC scaling
ratio in VMX and SVM is different. This patch makes the architecture
code to collect the number of fractional bits and other related
information into variables that can be accessed in the common code.
Signed-off-by: Haozhong Zhang
Both VMX and SVM calculate the tsc-offset in the same way, so this
patch removes the call-back compute_tsc_offset() and replaces it with a
common function kvm_compute_tsc_offset().
Signed-off-by: Haozhong Zhang
---
arch/x86/include/asm/kvm_host.h | 1 -
arch/x86/kvm/svm.c | 10
This patch makes KVM use virtual_tsc_khz rather than the host TSC rate
as vcpu's TSC rate to compute the time scale if TSC scaling is enabled.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/x86.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/x86.c b/arch/
This patch makes kvm-intel module to load TSC scaling ratio into TSC
multiplier field of VMCS when a vcpu is loaded, so that TSC scaling
ratio can take effect if VMX TSC scaling is enabled.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 6 ++
1 file changed, 6 insertions(+)
diff --g
Both VMX and SVM scales the host TSC in the same way in call-back
read_l1_tsc(), so this patch moves the scaling logic from call-back
read_l1_tsc() to a common function kvm_read_l1_tsc().
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/lapic.c | 4 ++--
arch/x86/kvm/svm.c | 3 +--
arc
This patch enhances dump_vmcs() to dump the value of TSC multiplier
field in VMCS.
Signed-off-by: Haozhong Zhang
---
arch/x86/kvm/vmx.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a02b59c..66d25be 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch
On Mon, Oct 19, 2015 at 04:25:04PM -0700, Mario Smarduch wrote:
>
>
> On 10/19/2015 3:14 AM, Christoffer Dall wrote:
> > On Sat, Sep 26, 2015 at 04:43:29PM -0700, Mario Smarduch wrote:
> >> This patch enhances current lazy vfp/simd hardware switch. In addition to
> >> current lazy switch, it trac
If vcpu's TSC rate is not specified by the cpu option 'tsc-freq', we
will use the value returned by KVM_GET_TSC_KHZ; otherwise, we use the
user-specified value.
Signed-off-by: Haozhong Zhang
---
target-i386/kvm.c | 33 +
1 file changed, 33 insertions(+)
diff --gi
The newly added subsection 'vmstate_tsc_khz' is used by following
patches to migrate vcpu's TSC rate. For the back migration
compatibility, this subsection is not migrated on pc-*-2.4 and older
machine types by default. If users do want to migrate this subsection on
older machine types, they can en
This patchset enables QEMU to save/restore vcpu's TSC rate during the
migration. When cooperating with KVM which supports TSC scaling, guest
programs can observe a consistent guest TSC rate even though they are
migrated among machines with different host TSC rates.
A pair of cpu options 'save-tsc-
Set vcpu's TSC rate to the migrated value (if any). If KVM supports TSC
scaling, guest programs will observe TSC increasing in the migrated rate
other than the host TSC rate.
The loading is controlled by a new cpu option 'load-tsc-freq'. If it is
present, then the loading will be enabled and the m
On Mon, Oct 19, 2015 at 03:06:59PM -0700, Mario Smarduch wrote:
>
>
> On 10/18/2015 2:07 PM, Christoffer Dall wrote:
> > On Mon, Oct 12, 2015 at 09:29:23AM -0700, Mario Smarduch wrote:
> >> Hi Christoffer, Marc -
> >> I just threw this test your way without any explanation.
> >
> > I'm confuse
65 matches
Mail list logo
