This particularly checks the case when debug controls are not to be
loaded/saved on host-guest transitions.
We have to fake results related to IA32_DEBUGCTL as support for this MSR
is missing KVM. The test already contains all bits required once KVM
adds support.
Signed-off-by: Jan Kiszka
Changes in v2 according to review remarks:
- refactored get/set_stage interface
- unified vmx_ctrl_* unions
- used vmx_ctrl_msr in capability test
- changed commented-out debugctl tests
Jan Kiszka (6):
VMX: Add tests for CR3 and CR8 interception
VMX: Rework test stage interface
VMX: Test
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx.c | 8
x86/vmx.h | 31 +--
2 files changed, 9 insertions(+), 30 deletions(-)
diff --git a/x86/vmx.c b/x86/vmx.c
index ba6a02b..f01e443 100644
--- a/x86/vmx.c
+++ b/x86/vmx.c
@@ -49,10 +49,10
Consistently access the stage only via the helper functions. To enforce
this, move them from vmx_tests.c to vmx.c. At this chance, introduce a
stage incrementation helper.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx.c | 26 ++
x86/vmx.h | 4 +
x86/vmx_tests.c
Need to fix FIELD_* constants for this to make the exit qualification
check work.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx.h | 2 ++
x86/vmx_tests.c | 32 +---
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/x86/vmx.h b/x86
On 2014-06-17 09:41, Paolo Bonzini wrote:
Il 17/06/2014 09:04, Jan Kiszka ha scritto:
-#define FIELD_EXIT_QUAL0
-#define FIELD_INSN_INFO1
+#define FIELD_EXIT_QUAL(1 1)
+#define FIELD_INSN_INFO(1 2)
Heh, you probably wanted 10 and 11. I'll fix it up
Check for required-0 or required-1 bits as well as known field value
restrictions. Also check the consistency between VMX_*_CTLS and
VMX_TRUE_*_CTLS and between CR0/4_FIXED0 and CR0/4_FIXED1.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Changes in v3:
- integrated suggestions of Paolo
On 2014-06-16 12:44, Paolo Bonzini wrote:
Il 15/06/2014 16:18, Jan Kiszka ha scritto:
Nothing critical, but it further improves emulation accuracy,
specifically helpful when analyzing guest bugs...
Corresponding kvm-unit-tests will be provided.
Jan Kiszka (5):
KVM: nVMX: Fix returned
On 2014-06-16 13:00, Paolo Bonzini wrote:
Il 15/06/2014 16:24, Jan Kiszka ha scritto:
+for (n = 0; n ARRAY_SIZE(vmx_ctl_msr); n++) {
+val = rdmsr(vmx_ctl_msr[n].index);
+default1 = vmx_ctl_msr[n].default1;
+ok = (val default1) == default1
+u32
On 2014-06-16 13:02, Paolo Bonzini wrote:
Il 15/06/2014 16:24, Jan Kiszka ha scritto:
From: Jan Kiszka jan.kis...@siemens.com
This particularly checks the case when debug controls are not to be
loaded/saved on host-guest transitions.
We have to fake results related to IA32_DEBUGCTL
On 2014-06-16 12:53, Paolo Bonzini wrote:
Il 15/06/2014 16:24, Jan Kiszka ha scritto:
+++ b/x86/vmx_tests.c
@@ -820,8 +820,8 @@ static int iobmp_exit_handler()
#define INSN_ALWAYS_TRAP2
#define INSN_NEVER_TRAP3
-#define FIELD_EXIT_QUAL0
-#define FIELD_INSN_INFO
Changes in v2:
- reordering to avoid breaking the disabling of CR3 access interception
- express VMX_BASIC_TRUE_CTLS via bit-shift
- rename host_debugctl - vmcs01_debugctl
Jan Kiszka (5):
KVM: nVMX: Advertise support for MSR_IA32_VMX_TRUE_*_CTLS
KVM: nVMX: Allow to disable CR3 access
Allow L1 to leak its debug controls into L2, i.e. permit cleared
VM_{ENTRY_LOAD,EXIT_SAVE}_DEBUG_CONTROLS. This requires to manually
transfer the state of DR7 and IA32_DEBUGCTLMSR from L1 into L2 as both
run on different VMCS.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm
SDM says bits 1, 4-6, 8, 13-16, and 26 have to be set.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/vmx.h | 3 +++
arch/x86/kvm/vmx.c | 5 +++--
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm
Many real CPUs get this wrong as well, but ours is totally off: bits 9:1
define the highest index value.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index
-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 536f341..7568679 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2239,6 +2239,7 @@ static inline
-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/uapi/asm/msr-index.h | 1 +
arch/x86/kvm/vmx.c| 13 ++---
2 files changed, 3 insertions(+), 11 deletions(-)
diff --git a/arch/x86/include/uapi/asm/msr-index.h
b/arch/x86/include/uapi/asm/msr-index.h
index
On 2014-06-17 07:24, Paolo Bonzini wrote:
Il 15/06/2014 08:20, Jan Kiszka ha scritto:
I think implementing Xen hypercalls in jailhouse for grant table and
event channels would actually make a lot of sense. The Xen
implementation is 2.5kLOC and I think it should be possible to compact
On 2014-06-13 10:45, Paolo Bonzini wrote:
Il 13/06/2014 08:23, Jan Kiszka ha scritto:
That would preserve zero-copy capabilities (as long as you can work
against the shared mem directly, e.g. doing DMA from a physical NIC or
storage device into it) and keep the hypervisor out of the loop
From: Jan Kiszka jan.kis...@siemens.com
Many real CPUs get this wrong as well, but ours is totally off: bits 9:1
define the highest index value.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86
Nothing critical, but it further improves emulation accuracy,
specifically helpful when analyzing guest bugs...
Corresponding kvm-unit-tests will be provided.
Jan Kiszka (5):
KVM: nVMX: Fix returned value of MSR_IA32_VMX_PROCBASED_CTLS
KVM: nVMX: Advertise support for MSR_IA32_VMX_TRUE_
From: Jan Kiszka jan.kis...@siemens.com
Allow L1 to leak its debug controls into L2, i.e. permit cleared
VM_{ENTRY_LOAD,EXIT_SAVE}_DEBUG_CONTROLS. This requires to manually
transfer the state of DR7 and IA32_DEBUGCTLMSR from L1 into L2 as both
run on different VMCS.
Signed-off-by: Jan Kiszka
From: Jan Kiszka jan.kis...@siemens.com
We already had this control enabled by exposing the broken
MSR_IA32_VMX_PROCBASED_CTLS value. This now advertises our capability by
clearing the right bits in MSR_IA32_VMX_TRUE_PROCBASED_CTLS. We also
have to ensure to test the right value on L2 entry
From: Jan Kiszka jan.kis...@siemens.com
We already implemented them but failed to advertise them. Currently they
all return the identical values to the capability MSRs they are
augmenting. So there is no change in exposed features yet.
Drop related comments at this chance that are partially
From: Jan Kiszka jan.kis...@siemens.com
SDM says bits 1, 4-6, 8, 13-16, and 26 have to be set. Fixing this
temporarily revokes the ability of L1 to control CR3 interceptions.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/vmx.h | 3 +++
arch/x86/kvm/vmx.c | 5
From: Jan Kiszka jan.kis...@siemens.com
Need to fix FIELD_* constants for this to make the exit qualification
check work.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx.h | 2 ++
x86/vmx_tests.c | 32 +---
2 files changed, 31 insertions(+), 3
From: Jan Kiszka jan.kis...@siemens.com
Consistently make sure we are not affected by any compiler reordering
when evaluating the current stage.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx_tests.c | 80 -
1 file changed
From: Jan Kiszka jan.kis...@siemens.com
This particularly checks the case when debug controls are not to be
loaded/saved on host-guest transitions.
We have to fake results related to IA32_DEBUGCTL as support for this MSR
is missing KVM. The test already contains all bits required once KVM
adds
From: Jan Kiszka jan.kis...@siemens.com
Extend the instruction interception test to also check for
interception-free execution.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx_tests.c | 121 +---
1 file changed, 72 insertions
From: Jan Kiszka jan.kis...@siemens.com
Check for required-0 or required-1 bits as well as known field value
restrictions. Also check the consistency between VMX_*_CTLS and
VMX_TRUE_*_CTLS and between CR0/4_FIXED0 and CR0/4_FIXED1.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
x86/vmx.c
The tests corresponding to (and going beyond) the issues fixed in
http://thread.gmane.org/gmane.comp.emulators.kvm.devel/123282
Jan Kiszka (5):
VMX: Add tests for CR3 and CR8 interception
VMX: Only use get_stage accessor
VMX: Test both interception and execution of instructions
VMX
On 2014-06-13 02:47, Rusty Russell wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-06-12 04:27, Rusty Russell wrote:
Henning Schild henning.sch...@siemens.com writes:
It was also never implemented, and remains a thought experiment.
However, implementing it in lguest should be fairly
to the spec.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/vmx.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 7004d21..d989829 100644
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include
On 2014-06-12 04:27, Rusty Russell wrote:
Henning Schild henning.sch...@siemens.com writes:
Hi,
i am working on the jailhouse[1] project and am currently looking at
inter-VM communication. We want to connect guests directly with virtual
consoles based on shared memory. The code complexity in
On 2014-06-04 23:17, Bandan Das wrote:
Verify that vmon fails with unaligned vmxon region or
any bits set beyong the physical address width. Also verify
failure with an invalid revision identifier.
Signed-off-by: Bandan Das b...@redhat.com
---
x86/vmx.c | 46
On 2014-06-03 22:11, Bandan Das wrote:
Paolo Bonzini pbonz...@redhat.com writes:
Il 06/05/2014 08:19, Bandan Das ha scritto:
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=54521
The vmxon region is unused by nvmx, but adding these checks
are probably harmless and may detect buggy
On 2014-05-26 15:51, Arthur Chunqi Li wrote:
Hi there,
External interrupts are injected in function vcpu_enter_guest, with
checking KVM_REQ_EVENT. If there are more than one interrupts in one
vmexit (e.g. nmi and external events occur concurrently in one
vmexit), KVM will handle only one
On 2014-05-15 07:54, Arthur Chunqi Li wrote:
Hi Jan and there,
I want to disable IDE BMDMA in Qemu/KVM and let guest OS uses only PIO
mode. Are there any configurations in Qemu or KVM to disable the
hardware support of DMA?
Not that I know. These features are built into the chipsets we
On 2014-05-15 08:55, Arthur Chunqi Li wrote:
On Thu, May 15, 2014 at 2:39 PM, Jan Kiszka jan.kis...@web.de wrote:
On 2014-05-15 07:54, Arthur Chunqi Li wrote:
Hi Jan and there,
I want to disable IDE BMDMA in Qemu/KVM and let guest OS uses only PIO
mode. Are there any configurations in Qemu
On 2014-04-18 02:35, Nadav Amit wrote:
According to Intel specifications, PAE and non-PAE does not have any reserved
bits. In long-mode, regardless to PCIDE, only the high bits (above the
physical address) are reserved.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
:100644 100644
From: Jan Kiszka jan.kis...@siemens.com
Regression of 346874c9: PAE is set in long mode, but that does not mean
we have valid PDPTRs.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/x86.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm
On 2014-05-06 20:35, gso...@gmail.com wrote:
Signed-off-by: Gabriel Somlo so...@cmu.edu
---
Jan,
After today's pull from kvm, I also need this to build against my
Fedora 20 kernel (3.13.10-200.fc20.x86_64).
Which version did you pull? Neither next nor queue contain this change yet.
On 2014-04-28 07:00, Bandan Das wrote:
Currently, the vmxon region isn't used in the nested case.
However, according to the spec, the vmxon instruction performs
additional sanity checks on this region and the associated
pointer. Modify emulated vmxon to better adhere to the spec
requirements
On 2014-04-28 07:00, Bandan Das wrote:
Reference: https://bugzilla.kernel.org/show_bug.cgi?id=54521
The vmxon region is unused by nvmx, but adding these checks
are probably harmless and may detect buggy L1 hypervisors in
the future!
Nice and welcome! Will you provide unit tests for these
On 2014-04-22 20:43, Gabriel L. Somlo wrote:
On Tue, Apr 22, 2014 at 04:57:32PM +0200, Jan Kiszka wrote:
On 2014-04-22 16:52, gso...@gmail.com wrote:
Signed-off-by: Gabriel Somlo so...@cmu.edu
---
vfio.c gets copied by sync, and it needs vfio.h. I don't think there's
an easy way to #define
On 2014-04-22 16:52, gso...@gmail.com wrote:
Signed-off-by: Gabriel Somlo so...@cmu.edu
---
vfio.c gets copied by sync, and it needs vfio.h. I don't think there's
an easy way to #define ourselves out of this one, copying vfio.h into
kvm-kmod/include/linux/ seems to be the path of least
(vcpu);
+
kvm_queue_exception(vcpu, DB_VECTOR);
return 1;
}
Reviewed-by: Jan Kiszka jan.kis...@siemens.com
--
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux
--
To unsubscribe from
On 2014-04-15 15:40, Huw Davies wrote:
When entering an exception after an ICEBP, the saved instruction
pointer should point to after the instruction.
This fixes the bug here: https://bugs.launchpad.net/qemu/+bug/1119686
Signed-off-by: Huw Davies h...@codeweavers.com
---
On 2014-04-11 21:35, Marcelo Tosatti wrote:
On Fri, Apr 11, 2014 at 08:53:09PM +0200, Jan Kiszka wrote:
On 2014-04-11 20:35, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-04-11 19:26, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-04-11 02:27
On 2014-04-11 02:27, Bandan Das wrote:
Marcelo Tosatti mtosa...@redhat.com writes:
On Mon, Mar 31, 2014 at 05:00:23PM -0400, Bandan Das wrote:
For single context invalidation, we fall through to global
invalidation in handle_invept() except for one case - when
the operand supplied by L1 is
On 2014-04-11 19:26, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-04-11 02:27, Bandan Das wrote:
Marcelo Tosatti mtosa...@redhat.com writes:
On Mon, Mar 31, 2014 at 05:00:23PM -0400, Bandan Das wrote:
For single context invalidation, we fall through to global
On 2014-04-11 20:35, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-04-11 19:26, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-04-11 02:27, Bandan Das wrote:
Marcelo Tosatti mtosa...@redhat.com writes:
On Mon, Mar 31, 2014 at 05:00:23PM -0400
On 2014-04-03 23:05, Gabriel L. Somlo wrote:
Signed-off-by: Gabriel Somlo so...@cmu.edu
---
Jan,
Apparently this is needed to build the latest kvm git on 3.13 kernels
(e.g., Fedora 20, in my case).
Thanks,
Gabriel
x86/external-module-compat.h | 4
1 file changed, 4
On 2014-03-26 21:22, Bandan Das wrote:
Jan Kiszka jan.kis...@web.de writes:
On 2014-03-22 17:43, Bandan Das wrote:
Jan Kiszka jan.kis...@web.de writes:
On 2014-03-20 21:58, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-03-20 04:28, Bandan Das wrote:
Some L1
On 2014-03-27 13:25, Feng Wu wrote:
SMAP is disabled if CPU is in non-paging mode in hardware.
However KVM always uses paging mode to emulate guest non-paging
mode with TDP. To emulate this behavior, SMAP needs to be
manually disabled when guest switches to non-paging mode.
Signed-off-by:
On 2014-03-25 12:18, Paolo Bonzini wrote:
Il 16/12/2013 10:57, Jan Kiszka ha scritto:
This checks for interrupt delivery to L2, unintercepted hlt in L2 and
explicit L2 suspension via the activity state HLT.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
I'm applying this patch
On 2014-03-22 17:43, Bandan Das wrote:
Jan Kiszka jan.kis...@web.de writes:
On 2014-03-20 21:58, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-03-20 04:28, Bandan Das wrote:
Some L1 hypervisors such as Xen seem to be calling invept after
vmclear or before vmptrld
On 2014-03-20 21:58, Bandan Das wrote:
Jan Kiszka jan.kis...@siemens.com writes:
On 2014-03-20 04:28, Bandan Das wrote:
Some L1 hypervisors such as Xen seem to be calling invept after
vmclear or before vmptrld on L2. In this case, proceed with
falling through and syncing roots as a case
On 2014-03-20 04:28, Bandan Das wrote:
Some Type 1 hypervisors such as XEN won't enable VMX without it present
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/kvm/vmx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
Commit description is missing.
On 2014-03-20 04:28, Bandan Das wrote:
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/kvm/irq.c | 1 +
arch/x86/kvm/vmx.c | 17 +
2 files changed, 18 insertions(+)
diff --git a/arch/x86/kvm/irq.c b/arch/x86/kvm/irq.c
index
On 2014-03-20 04:28, Bandan Das wrote:
Some L1 hypervisors such as Xen seem to be calling invept after
vmclear or before vmptrld on L2. In this case, proceed with
falling through and syncing roots as a case where
context wide invalidation can't be supported
Can we also base this behaviour on
On 2014-03-18 15:54, Paolo Bonzini wrote:
After the previous patches, an interrupt whose bit is set in the IRR
register will never be in the LAPIC's IRR and has never been injected
on the migration source. So inject it on the destination.
This fixes migration of Windows guests without HPET
On 2014-03-09 08:33, Paolo Bonzini wrote:
Il 08/03/2014 10:21, Jan Kiszka ha scritto:
On 2014-03-07 20:48, Paolo Bonzini wrote:
Il 07/03/2014 20:03, Jan Kiszka ha scritto:
@@ -4631,22 +4631,8 @@ static void vmx_set_nmi_mask(struct kvm_vcpu
*vcpu, bool masked)
static int vmx_nmi_allowed
On 2014-03-09 09:03, Paolo Bonzini wrote:
Il 09/03/2014 08:33, Paolo Bonzini ha scritto:
Il 08/03/2014 10:21, Jan Kiszka ha scritto:
On 2014-03-07 20:48, Paolo Bonzini wrote:
Il 07/03/2014 20:03, Jan Kiszka ha scritto:
@@ -4631,22 +4631,8 @@ static void vmx_set_nmi_mask(struct kvm_vcpu
*vcpu
On 2014-03-07 12:42, Paolo Bonzini wrote:
Alex Williamson reported that a Windows game does something weird that
makes the guest save and restore debug registers on each context switch.
This cause several hundred thousands vmexits per second, and basically
cuts performance in half when running
On 2014-03-09 09:11, Jan Kiszka wrote:
On 2014-03-07 12:42, Paolo Bonzini wrote:
Alex Williamson reported that a Windows game does something weird that
makes the guest save and restore debug registers on each context switch.
This cause several hundred thousands vmexits per second
On 2014-03-07 20:48, Paolo Bonzini wrote:
Il 07/03/2014 20:03, Jan Kiszka ha scritto:
@@ -4631,22 +4631,8 @@ static void vmx_set_nmi_mask(struct kvm_vcpu
*vcpu, bool masked)
static int vmx_nmi_allowed(struct kvm_vcpu *vcpu)
{
-if (is_guest_mode(vcpu)) {
-if (to_vmx(vcpu
On 2014-03-07 16:44, Paolo Bonzini wrote:
Il 06/03/2014 18:33, Jan Kiszka ha scritto:
Move the check for leaving L2 on pending and intercepted IRQs or NMIs
from the *_allowed handler into a dedicated callback. Invoke this
callback at the relevant points before KVM checks if IRQs/NMIs can
On 2014-03-07 17:46, Paolo Bonzini wrote:
Il 07/03/2014 17:29, Jan Kiszka ha scritto:
On 2014-03-07 16:44, Paolo Bonzini wrote:
With this patch do we still need
if (is_guest_mode(vcpu) nested_exit_on_intr(vcpu))
/*
* We get here
On 2014-03-07 18:28, Jan Kiszka wrote:
On 2014-03-07 17:46, Paolo Bonzini wrote:
Il 07/03/2014 17:29, Jan Kiszka ha scritto:
On 2014-03-07 16:44, Paolo Bonzini wrote:
With this patch do we still need
if (is_guest_mode(vcpu) nested_exit_on_intr(vcpu
On 2014-03-07 19:19, Jan Kiszka wrote:
On 2014-03-07 18:28, Jan Kiszka wrote:
On 2014-03-07 17:46, Paolo Bonzini wrote:
Il 07/03/2014 17:29, Jan Kiszka ha scritto:
On 2014-03-07 16:44, Paolo Bonzini wrote:
With this patch do we still need
if (is_guest_mode(vcpu) nested_exit_on_intr
on nested exit.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 22fa0f7..9abb21f 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -8176,7 +8176,8
vmexit events.
The rework fixes L2 wakeups from HLT and provides the foundation for
preemption timer emulation.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/vmx.c | 67 +++--
arch/x86
As I noticed a rebase conflict of these pending patches and I wanted to
remind the fact that their are still pending ;), a quick update round.
No functional changes since v2.
Jan
Jan Kiszka (4):
KVM: nVMX: Rework interception of IRQs and NMIs
KVM: nVMX: Fully emulate preemption timer
KVM
and evaluated via the new check_nested_events hook. As we no
longer rely on hardware features, we can enable both the preemption
timer support and value saving unconditionally.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 151
enable_irq_window and enable_nmi_window.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/kvm_host.h | 4 ++--
arch/x86/kvm/svm.c | 8 +++-
arch/x86/kvm/vmx.c | 25 +++--
arch/x86/kvm/x86.c | 6 ++
4 files changed
On 2014-03-07 20:03, Jan Kiszka wrote:
As I noticed a rebase conflict of these pending patches and I wanted to
remind the fact that their are still pending ;), a quick update round.
No functional changes since v2.
Forgot to press save to send this as well:
Also passed some stress testing
on nested exit.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index e559675..2c9d21e 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -8176,7 +8176,8
and evaluated via the new check_nested_events hook. As we no
longer rely on hardware features, we can enable both the preemption
timer support and value saving unconditionally.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 151
vmexit events.
The rework fixes L2 wakeups from HLT and provides the foundation for
preemption timer emulation.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/vmx.c | 67 +++--
arch/x86
As I noticed a rebase conflict of these pending patches and I wanted to
remind the fact that their are still pending ;), a quick update round.
No functional changes since v2.
Jan
Jan Kiszka (3):
KVM: nVMX: Rework interception of IRQs and NMIs
KVM: nVMX: Fully emulate preemption timer
KVM
On 2014-03-03 19:17, Stefan Priebe wrote:
Am 03.03.2014 17:36, schrieb Paolo Bonzini:
Il 28/02/2014 20:47, Stefan Priebe ha scritto:
Hello,
i got this stack trace multiple times while using a vanilla 3.10.32
kernel and already sent it to the list in december but got no replies.
Please
On 2014-03-04 11:26, Stefan Priebe - Profihost AG wrote:
Am 04.03.2014 11:01, schrieb Jan Kiszka:
On 2014-03-03 19:17, Stefan Priebe wrote:
Am 03.03.2014 17:36, schrieb Paolo Bonzini:
Il 28/02/2014 20:47, Stefan Priebe ha scritto:
Hello,
i got this stack trace multiple times while using
On 2014-02-26 17:54, Paolo Bonzini wrote:
Here are the patches I mentioned while reviewing Liu Jinsong's MPX
series.
Patch 1 is a further cleanup of xcr0 handling, and patch 2 introduces
nested virtualization support for MPX.
Please review.
Thanks,
Paolo
Paolo Bonzini (2):
On 2014-02-26 16:49, Paolo Bonzini wrote:
When not running in guest-debug mode (i.e. the guest controls the debug
registers, having to take an exit for each DR access is a waste of time.
If the guest gets into a state where each context switch causes DR to be
saved and restored, this can take
On 2014-02-25 11:57, Paolo Bonzini wrote:
Il 24/02/2014 19:29, Jan Kiszka ha scritto:
Hi,
I noticed that KVM (with VMX at least) enters an inifite loop of
vmentries and ept-violations when it has to set the accessed bit in a
guest page table that is in read-only memory (namely: the F-segment
On 2014-02-25 15:26, Paolo Bonzini wrote:
Il 24/02/2014 16:58, Jan Kiszka ha scritto:
On 2014-02-24 16:25, Marius Vlad wrote:
Commit 3b1274463fa8d074dd3bc77efe25b59a4ddd491e uses GCCs extension
labels as values to handle exceptions, but GCC 4.8 ``mistakingly''
uses the next body function
On 2014-02-24 16:25, Marius Vlad wrote:
Commit 3b1274463fa8d074dd3bc77efe25b59a4ddd491e uses GCCs extension
labels as values to handle exceptions, but GCC 4.8 ``mistakingly''
uses the next body function as a jump label, for functions which
do not return. Fixed by returning a int value for
Hi,
I noticed that KVM (with VMX at least) enters an inifite loop of
vmentries and ept-violations when it has to set the accessed bit in a
guest page table that is in read-only memory (namely: the F-segment of
the BIOS). I don't think this is the proper reaction...
Jan
--
Siemens AG, Corporate
On 2014-02-23 10:04, Marius Vlad wrote:
Hello,
$ qemu --version QEMU emulator version 1.7.0 (Debian 1.7.0+dfsg-3),
Copyright (c) 2003-2008 Fabrice Bellard
$ gcc --version gcc (Debian 4.8.2-15) 4.8.2
$ git rev-list HEAD | head -n1
c0a4e715eb30944f984a92fbd4bb2cff6ee298a5
$ git
On 2014-02-11 11:17, Stefan Hajnoczi wrote:
On Mon, Feb 3, 2014 at 8:45 AM, Stefan Hajnoczi stefa...@gmail.com wrote:
Project ideas
Please post project ideas on the wiki page below. Project ideas
should be suitable as a 12-week project that a student fluent in
C/Python/etc can complete. No
-module-compat.o
ifeq ($(CONFIG_IOMMU_API)$(CONFIG_PCI),yy)
kvm-objs += assigned-dev.o iommu.o
On 23.01.2014 19:19, Jan Kiszka wrote:
On 2014-01-23 17:34, Jonas Pfoh wrote:
Hello,
I am currently working on a project involving KVM and have been making use
Jan's kvm-kmod repository. I
On 2014-01-24 15:29, Jonas Pfoh wrote:
vfio.c is being pulled in from the submodule, but it is not being
compiled/linked by the build environment, causing a Unknown symbol in
module error when loading the resulting module.
Adding vfio.o to the kvm-objs variable in x86/Kbuild fixes this
on nested exit.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 081a15c..7ed0ecc 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -8159,7 +8159,8
-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/cpuid.h | 16
arch/x86/kvm/lapic.h | 2 +-
arch/x86/kvm/vmx.c | 9 +
arch/x86/kvm/x86.c | 32 +---
4 files changed, 47 insertions(+), 12 deletions(-)
diff --git a/arch/x86/kvm/cpuid.h b
and evaluated via the new check_nested_events hook. As we no
longer rely on hardware features, we can enable both the preemption
timer support and value saving unconditionally.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/kvm/vmx.c | 151
vmexit events.
The rework fixes L2 wakeups from HLT and provides the foundation for
preemption timer emulation.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/vmx.c | 67 +++--
arch/x86
injection with valid IDT
vectoring info
Paolo, did you already look into nested event handling for SVM? I assume
you will want to (re-)base it on top of this.
Jan
Jan Kiszka (4):
KVM: x86: Validate guest writes to MSR_IA32_APICBASE
KVM: nVMX: Rework interception of IRQs and NMIs
KVM: nVMX
On 2014-01-22 17:29, Paolo Bonzini wrote:
After KVM commit 8a3caa6d74597c2a083f7c87f866891a0b12540b, kvm-kmod
is broken in weird ways (for me it breaks every other time kvm is
loaded, but only with ept=0...).
The reason is that, after this commit, empty_zero_page is expected
to be
On 2014-01-23 17:34, Jonas Pfoh wrote:
Hello,
I am currently working on a project involving KVM and have been making use
Jan's kvm-kmod repository. I receive the below error when I attempt to
compile with the most recent version. My question is simply if this is
something anyone is
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