be touched at all. It would rely only on
drivers' ability to communicate with each other (i guess it should be possible
in Windows, isn't it?)
c) does not need to steal resources (BARs, IRQs, etc) from the actual devices.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research
n why Paolo suggested an extra exit_reason,
> and I think .handled field can be used to pass that information instead.
[skip]
> But the proposed use of .handled costs basically nothing, and it may
> prove useful in general (as a conisistency proof, if anything).
Well... May be... S
nd it. And it's IMHO safe to just
know that SynIC MSRs have some extra handling in
kernel. And i believe this has no direct impact on userland's behavior.
But, you better know the details.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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uct kvm_hyperv_exit hyperv;
> + /*
> + * KVM_EXIT_MSR_READ, KVM_EXIT_MSR_WRITE,
> + * KVM_EXIT_MSR_AFTER_WRITE
> + */
> + struct {
> + __u32 index;/* i.e. ecx; out */
> + __u64 data; /* out (wrmsr) / in (rdmsr) */
> + __u64 type; /* out */
> +#define KVM_EXIT_MSR_UN
implementation.
I guess your hypercalls to be introduced using KVM_EXIT_HYPERV are also not
used inside qemu so require implementation :)
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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the
the purpose?
> but could we replace Hyper-V VMBus hypercall and it's parameters
> by KVM_EXIT_REG_IO/MSR_IO too?
It depends. Can i read about these hypercalls somewhere? Is there any
documentation?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Rus
;
if (!host)
synic_exit(synic, msr);
break;
So, every time one of these thee MSRs is written, we get a vmexit with values
of all three registers, and that's all. We could
easily have 'synic_exit(synic, msr, data)' in all th
mulate physical CP15
timer. And it would require exactly the same capability - process some trapped
system register accesses in userspace.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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Either drop it or just say "The
> architectured timers are not supported without the in-kernel vGIC."
Ok, i'll repost with changed message. But, just to let you know, with this
(http://www.spinics.net/lists/kvm/msg124539.html) the
notice about architected timer loses its re
ink we really
> need to add it as a regression test, unless others disagree and would
> like to see it added.
Considering how difficult it was to find this problem, and how tricky and
unobvious it is, i would ask to add this test. Especially
considering you've already written it. At least it w
Access size is always 64 bits. Since CPU interface state actually affects
only a single vCPU, no vGIC locking is done in order to avoid code
duplication. Just made sure that the vCPU is not running.
Signed-off-by: Pavel Fedin
---
arch/arm64/include/uapi/asm/kvm.h | 14 ++-
arch/arm64/mm
ould normally
be 0), for read operations this would cause duplication of the same word
in both halves.
Signed-off-by: Pavel Fedin
---
arch/arm64/include/uapi/asm/kvm.h | 1 +
include/linux/irqchip/arm-gic-v3.h | 1 +
virt/kvm/arm/vgic-v3-emul.c|
endianness conversion and
masking. Masking is not used here (the mask is set to ~0), so we just
move out the remaining endianness conversion.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic-v2-emul.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/virt/kvm/arm
In order to implement vGICv3 CPU interface access, we will need to
perform table lookup of system registers. We would need both
index_to_params() and find_reg() exported for that purpose, but instead
we export a single function which combines them both.
Signed-off-by: Pavel Fedin
Reviewed-by
differently. Also, vcpu pointer has backpointer to kvm, so 'dev' was
replaced with 'vcpu'.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic-v2-emul.c | 120 +++-
virt/kvm/arm/vgic.c | 57 +
virt/kvm/arm/vgic.h
: Christoffer Dall
Signed-off-by: Pavel Fedin
---
Documentation/virtual/kvm/devices/arm-vgic-v3.txt | 116 ++
Documentation/virtual/kvm/devices/arm-vgic.txt| 21 +---
2 files changed, 120 insertions(+), 17 deletions(-)
create mode 100644 Documentation/virtual/kvm/devices/arm-vgic
nd reusable code extraction.
- Added forgotten documentation
Christoffer Dall (1):
KVM: arm/arm64: Add VGICv3 save/restore API documentation
Pavel Fedin (5):
KVM: arm/arm64: Move endianness conversion out of
vgic_attr_regs_access()
KVM: arm/arm64: Refactor vGIC attributes handling code
KVM:
ost this 5-liner i'll
need to go through the formal approval procedure at my
company, and i just don't want to bother for a single small fix. :) Will do as
a "Reported-by:".
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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/cygdrive/d/Projects/kvm-unit-tests/arm/xzr-test.c:13: undefined reference to
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--- cut ---
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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quot;(some_nonzero_val):"memory");
Then check for res == some_nonzero_val. If they are equal, you've got the bug
:)
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Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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context structure, we introduce a dedicated storage for it in
struct sys_reg_params.
This refactor also gets rid of "massive hack" in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin
Reviewed-by: Marc Zyngier
---
arch/arm64/kvm/sys_regs.c| 87 +---
Using oldstyle vcpu_reg() accessor is proven to be inappropriate and
unsafe on ARM64. This patch converts the rest of use cases to new
accessors and completely removes vcpu_reg() on ARM64.
Signed-off-by: Pavel Fedin
Reviewed-by: Marc Zyngier
---
arch/arm/kvm/psci.c | 20
1 => v2:
- Changed type of transfer value to u64 and store it directly in
struct sys_reg_params instead of a pointer
- Use lower_32_bits()/upper_32_bits() where appropriate
- Fixed wrong usage of 'Rt' instead of 'Rt2' in kvm_handle_cp_64(),
overlooked in v1
- Do not writ
Further rework is going to introduce a dedicated storage for transfer
register value in struct sys_reg_params. Before doing this we have to
remove 'const' modifiers from it in all accessor functions and their
callers.
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c
are also added to ARM32 code.
This patch fixes setting MMIO register to a random value (actually SP)
instead of zero by something like:
*((volatile int *)reg) = 0;
compilers tend to generate "str wzr, [xx]" here
Signed-off-by: Pavel Fedin
Reviewed-by: Marc Zyngier
---
arch/arm/i
Hello!
> Thanks a lot for respining this quickly. I just had a few minor
> comments, so this is almost ready to go. If you can fix that
Damn, the rest of reviews got stuck somewhere and arrived later, so i've just
sent v3 without wrap fix. Will correct it.
Kind regards,
Pavel F
are also added to ARM32 code.
This patch fixes setting MMIO register to a random value (actually SP)
instead of zero by something like:
*((volatile int *)reg) = 0;
compilers tend to generate "str wzr, [xx]" here
Signed-off-by: Pavel Fedin
Reviewed-by: Marc Zyngier
---
arch/arm/i
context structure, we introduce a dedicated storage for it in
struct sys_reg_params.
This refactor also gets rid of "massive hack" in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c| 88 ++--
arch/arm64/kvm/
4 and store it directly in
struct sys_reg_params instead of a pointer
- Use lower_32_bits()/upper_32_bits() where appropriate
- Fixed wrong usage of 'Rt' instead of 'Rt2' in kvm_handle_cp_64(),
overlooked in v1
- Do not write value back when reading
Pavel Fedin (4):
KVM: arm
Further rework is going to introduce a dedicated storage for transfer
register value in struct sys_reg_params. Before doing this we have to
remove 'const' modifiers from it in all accessor functions and their
callers.
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c
Using oldstyle vcpu_reg() accessor is proven to be inappropriate and
unsafe on ARM64. This patch converts the rest of use cases to new
accessors and completely removes vcpu_reg() on ARM64.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/psci.c | 20 ++--
arch/arm64
Hello!
> I think you are being a bit overzealous here, and a few const can
> legitimately be kept, see below.
:) Yes, i've just commanded "search and replace" to the editor. Fixing...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
-
Using oldstyle vcpu_reg() accessor is proven to be inappropriate and
unsafe on ARM64. This patch converts the rest of use cases to new
accessors and completely removes vcpu_reg() on ARM64.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/psci.c | 20 ++--
arch/arm64
ter
- Use lower_32_bits()/upper_32_bits() where appropriate
- Fixed wrong usage of 'Rt' instead of 'Rt2' in kvm_handle_cp_64(),
overlooked in v1
- Do not write value back when reading
Pavel Fedin (4):
KVM: arm64: Correctly handle zero register during MMIO
KVM: arm64: Remove co
context structure, we introduce a dedicated storage for it in
struct sys_reg_params.
This refactor also gets rid of "massive hack" in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c| 88 ++--
arch/arm64/kvm/
are also added to ARM32 code.
This patch fixes setting MMIO register to a random value (actually SP)
instead of zero by something like:
*((volatile int *)reg) = 0;
compilers tend to generate "str wzr, [xx]" here
Signed-off-by: Pavel Fedin
Reviewed-by: Marc Zyngier
---
arch/arm/i
Further rework is going to introduce a dedicated storage for transfer
register value in struct sys_reg_params. Before doing this we have to
remove all 'const' modifiers from it.
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/sys_regs.c| 38 ++--
; But it is cc'd to stable, so unless it is going to be nacked at review
> stage, any subsequent fixes should also be cc'd.
Sorry guys for messing things up a bit, but the affected commit actually is in
stable branch (4.4-rc3), so i decided to Cc: stable, just in case, because the
break
mentioned series
> [1] http://www.spinics.net/lists/kvm/msg121669.html,
> http://www.spinics.net/lists/kvm/msg121662.html
> [2] http://www.spinics.net/lists/kvm/msg119236.html
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
--
To unsubscribe from
const struct sys_reg_params' declaration, and
callers, and their callers... This 'const' is all around the code, and it would
take a separate huge patch to un-const'ify all this.
Does it worth that?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Rus
se a pointer for exchange with userspace, see
vgic_v3_cpu_regs_access() and callers. I wouldn't
like to refactor the code again. What's your opinion on this?
And of course i'll fix up the rest.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
--
To
ICH_HCR_EL2, xzr
It's only because it is KVM code we have never discovered this problem yet.
Somebody could write such a thing in some other place,
with some other register, which would be executed by KVM, and... boo...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Resea
Using oldstyle vcpu_reg() accessor is proven to be inapproptiate and
unsafe on ARM64. This patch fixes the rest of use cases and completely
removes vcpu_reg() on ARM64.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/psci.c | 20 ++--
arch/arm64/include/asm
System register accesses also use zero register for Rt == 31, and
therefore using it will also result in getting SP value instead. This
patch makes them also using new accessors, introduced by the previous
patch.
Additionally, got rid of "massive hack" in kvm_handle_cp_64().
Signed-off
m has been discovered by performing an operation
*((volatile int *)reg) = 0;
which compiles as "str xzr, [xx]", and resulted in strange values being
written.
Pavel Fedin (3):
KVM: arm64: Correctly handle zero register during MMIO
KVM: arm64: Correctly handle zero register in syst
are also added to ARM32 code.
This patch fixes setting MMIO register to a random value (actually SP)
instead of zero by something like:
*((volatile int *)reg) = 0;
compilers tend to generate "str wzr, [xx]" here
Signed-off-by: Pavel Fedin
---
arch/arm/include/asm/kvm_emulat
y ARM64 too, just in case. I was about to finish the
testing and send the patch in maybe one or two hours.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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r), and it still works fine there.
> And instead of reverting, could we fix this properly instead?
Of course, i'm not against alternate approaches, feel free to. I've just
suggested what i could, to fix things quickly. I'm indeed no expert in KVM
memory management yet. After all,
't miss it. I have found the problem, and
it's just good luck that it works on some machines.
Unreliably, BTW. The problem is that it verifies guest's physical addresses
(IPA) against host memory map; and the fix is here:
http://www.spinics.net/lists/kvm/msg124561.html
Kind regar
Samsung proprietary hardware.
Cc: sta...@vger.kernel.org
Fixes: e6fab5442345 ("ARM/arm64: KVM: test properly for a PTE's uncachedness")
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/mmu.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/kvm/mmu.c b/arc
Hello!
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Pavel Fedin
> Sent: Tuesday, December 01, 2015 1:03 PM
> To: 'Marc Zyngier'; kvm...@lists.cs.columbia.edu; kvm@vger.kernel.org
> Cc:
t. The guest is currently suggested to use some memory-mapped
timer which can be emulated in userspace.
Signed-off-by: Pavel Fedin
---
v5 => v6:
- KVM_CAP_IRQFD patch also dropped, causing many problems on PowerPC and
S390
- Rebased on top of 4.3-rc3
v4 => v5:
- Tested on top of kvmarm/n
t ---
2015-12-01T11:03:16.135724Z qemu-system-arm: Error binding guest notifier: 11
2015-12-01T11:03:16.135849Z qemu-system-arm: unable to start vhost net: 11:
falling back on userspace virtio
--- cut ---
So, the resume is: we just drop this patch and only N1 remains.
Kind regards,
Pavel Fedin
Ex
Remove dependency on vgic_initialized() and use the newly introduced
infrastructure to send interrupts via the userspace if vGIC is not being
used.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c| 8 +---
virt/kvm/arm/arch_timer.c | 23 +--
2 files changed, 14
Add documentation for the new exit code.
Signed-off-by: Pavel Fedin
---
Documentation/virtual/kvm/api.txt | 14 ++
1 file changed, 14 insertions(+)
diff --git a/Documentation/virtual/kvm/api.txt
b/Documentation/virtual/kvm/api.txt
index 092ee9f..d8aae4c 100644
--- a/Documentation
API is designed to be as much architecture-agnostic is possible.
Currently it actually supports only a single IRQ, but it can be easily
extended to accomodate more.
Pavel Fedin (3):
KVM: Introduce KVM_EXIT_IRQ
KVM: Documentation: Document KVM_EXIT_IRQ
KVM: arm/arm64: Decouple virtual timer from
code. This can
be extended in the future if necessary.
The interface is designed to be as much arch-agnostic as possible.
Therefore, it has IRQ number and level as parameters (encoded in
struct kvm_irq_level).
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 6 ++
include/linux
that it passed reviews and testing, and i
was involved too. Perhaps it's board's code fault,
however.
Cc'ed to others involved.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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ered only on some particular
HW. I'll try to figure this out.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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have time to investigate this quickly, but i'll post some
new information as soon as i get it
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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the body of a message to major
x27;t remember testing it.
>
> Wouldn't an irqfd emulation cover vhost?
Of course it would. At least it should, but perhaps will need some minor
tweaks.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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s not try to use irqfd without irqchip,
because there's simply no use for them. But, well, perhaps there would be an
exception in vhost, i don't remember testing it.
So what shall we do?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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it just weird? I understand that perhaps we have some real need to
distinguish between different irqchip types, but
shouldn't the kernel also publish KVM_CAP_IRQCHIP, which stands just for "we
support some irqchip virtualization"?
May be we should just add this for PowerPC and S39
Now at least ARM is able to determine whether the machine has
virtualization support for irqchip or not at runtime. Obviously,
irqfd requires irqchip.
Signed-off-by: Pavel Fedin
---
virt/kvm/kvm_main.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/virt/kvm/kvm_main.c
t. The guest is currently suggested to use some memory-mapped
timer which can be emulated in userspace.
Signed-off-by: Pavel Fedin
---
arch/arm/kvm/arm.c | 22 --
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index e
001. Use correct conditions in
callers instead
- Added ARM64-specific code, without which attempt to run a VM ends in a
HYP crash because of unset vGIC save/restore function pointers
Pavel Fedin (2):
arm/arm64: KVM: Detect vGIC presence at runtime
KVM: Make KVM_CAP_IRQFD dependent on KVM
m *kvm);
>
> +int vits_inject_msi(struct kvm *kvm, struct kvm_msi *msi);
> +
> bool vits_queue_lpis(struct kvm_vcpu *vcpu);
> void vits_unqueue_lpi(struct kvm_vcpu *vcpu, int irq);
>
> diff --git a/virt/kvm/arm/vgic-v3-emul.c b/virt/kvm/arm/vgic-v3-emul.c
> index f482e34..90f
=> v2:
- Adde dependency on CONFIG_GENERIC_MSI_IRQ_DOMAIN in some parts of the
code, should fix build without this option
Pavel Fedin (3):
vfio: Introduce map and unmap operations
gicv3, its: Introduce VFIO map and unmap operations
vfio: Introduce generic MSI mapping operations
driv
These new functions allow direct mapping and unmapping of addresses on the
given IOMMU. They will be used for mapping MSI hardware.
Signed-off-by: Pavel Fedin
---
drivers/vfio/vfio_iommu_type1.c | 29 +
include/linux/vfio.h| 4 +++-
2 files changed, 32
x27;s at least one
device referring to it using MSI.
Signed-off-by: Pavel Fedin
---
drivers/vfio/pci/vfio_pci_intrs.c | 11
drivers/vfio/vfio.c | 116 ++
include/linux/vfio.h | 13 +
3 files changed, 140 insertions(+)
diff
These new functions use the supplied IOMMU in order to map and unmap MSI
translation register(s).
Signed-off-by: Pavel Fedin
---
drivers/irqchip/irq-gic-v3-its.c | 31 +++
include/linux/irqchip/arm-gic-v3.h | 2 ++
include/linux/msi.h| 12
Replace Rt with data pointer in struct sys_reg_params. This will allow to
reuse system register handling code in implementation of vGICv3 CPU
interface access API. Additionally, got rid of "massive hack"
in kvm_handle_cp_64().
Signed-off-by: Pavel Fedin
---
arch/arm64/kvm/
In order to implement vGICv3 CPU interface access, we will need to
perform table lookup of system registers. We would need both
index_to_params() and find_reg() exported for that purpose, but instead
we export a single function which combines them both.
Signed-off-by: Pavel Fedin
Reviewed-by
differently. Also, vcpu pointer has backpointer to kvm, so 'dev' was
replaced with 'vcpu'.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic-v2-emul.c | 120 +++-
virt/kvm/arm/vgic.c | 57 +
virt/kvm/arm/vgic.h
Access size is always 64 bits. Since CPU interface state actually affects
only a single vCPU, no vGIC locking is done in order to avoid code
duplication. Just made sure that the vCPU is not running.
Signed-off-by: Pavel Fedin
---
arch/arm64/include/uapi/asm/kvm.h | 14 ++-
include/linux
: Christoffer Dall
Signed-off-by: Pavel Fedin
---
Documentation/virtual/kvm/devices/arm-vgic-v3.txt | 116 ++
Documentation/virtual/kvm/devices/arm-vgic.txt| 21 +---
2 files changed, 120 insertions(+), 17 deletions(-)
create mode 100644 Documentation/virtual/kvm/devices/arm-vgic
endianness conversion and
masking. Masking is not used here (the mask is set to ~0), so we just
move out the remaining endianness conversion.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic-v2-emul.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/virt/kvm/arm
ould normally
be 0), for read operations this would cause duplication of the same word
in both halves.
Signed-off-by: Pavel Fedin
---
arch/arm64/include/uapi/asm/kvm.h | 1 +
include/linux/irqchip/arm-gic-v3.h | 1 +
virt/kvm/arm/vgic-v3-emul.c|
rm/arm64: Add VGICv3 save/restore API documentation
Pavel Fedin (6):
KVM: arm/arm64: Move endianness conversion out of
vgic_attr_regs_access()
KVM: arm/arm64: Refactor vGIC attributes handling code
KVM: arm64: Implement vGICv3 distributor and redistributor access from
userspace
KVM
These new functions allow direct mapping and unmapping of addresses on the
given IOMMU. They will be used for mapping MSI hardware.
Signed-off-by: Pavel Fedin
---
drivers/vfio/vfio_iommu_type1.c | 29 +
include/linux/vfio.h| 4 +++-
2 files changed, 32
x27;s at least one
device referring to it using MSI.
Signed-off-by: Pavel Fedin
---
drivers/vfio/pci/vfio_pci_intrs.c | 11
drivers/vfio/vfio.c | 112 ++
include/linux/vfio.h | 2 +
3 files changed, 125 insertions(+)
diff --
On some architectures (e.g. ARM64) if the device is behind an IOMMU, and
is being mapped by VFIO, it is necessary to also add mappings for MSI
translation register for interrupts to work. This series implements the
necessary API to do this, and makes use of this API for GICv3 ITS on
ARM64.
Pavel
These new functions use the supplied IOMMU in order to map and unmap MSI
translation register(s).
Signed-off-by: Pavel Fedin
---
drivers/irqchip/irq-gic-v3-its.c | 31 +++
include/linux/irqchip/arm-gic-v3.h | 2 ++
include/linux/msi.h| 12
Hello!
Tested-by: Pavel Fedin
Personally i have a small concern about this way of testing. I know many ports
of the kernel to proprietary systems, and they tend to have drivers which just
deal with hardcoded physical memory regions on their own, without even
registering them in the kernel
Hello!
I have tested this patch, it also fixes the crash on Exynos5410, and is indeed
a better approach.
Tested-by: Pavel Fedin
CC'ed general KVM mailing list too.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message
l fix).
Good. Saw it, will test it on monday. Indeed, this is better than my approach,
and
this is what i actually wanted to do but didn't study the thing deeply enough to
implement.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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the whole unmapping logic to
carry
over a flag, telling whether we are removing normal or HYP mappings. But
wouldn't
this be much more complicated?
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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lush_dcache_pte(old_pte);
> +
> + put_page(virt_to_page(pte));
> } while (pte++, addr += PAGE_SIZE, addr != end);
>
> if (kvm_pte_table_empty(kvm, start_pte))
> --
I see you inverted pte_none() check, and now kbuild bot complains about
"mixed declarations and code".
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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more bug recently, it
reproduces on CP15-timer-less boards like Exynos:
http://www.spinics.net/lists/kvm/msg122746.html. Just to make sure that you
don't
miss it.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
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OK to stop
at any point, and actually you should be able to
easily throw away 0003 and apply just 1, 2, 4. The minimum needed thing for
LPIs introduction is 0001.
You can also stick to v4 if the problem does not get triggered by its first
patch, if you prefer reduced commit log.
Kind regard
n
elrsr '1' means 'free').
Signed-off-by: Pavel Fedin
---
include/kvm/arm_vgic.h | 3 ---
virt/kvm/arm/vgic-v2.c | 1 +
virt/kvm/arm/vgic-v3.c | 1 +
virt/kvm/arm/vgic.c| 37 +
4 files changed, 15 insertions(+), 27 deletions(-)
diff
it in order to get prepared for LPI support
introduction. After this number of IRQs will grow up to at least 16384,
while numbers from 1024 to 8192 are never going to be used. This would be
a huge memory waste.
Signed-off-by: Pavel Fedin
---
include/kvm/arm_vgic.h | 3 ---
virt/kvm/arm/vgic.c
gic_irq_clear_queued() inside of it.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic.c | 37 ++---
1 file changed, 10 insertions(+), 27 deletions(-)
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 265a410..96e45f3 100644
--- a/virt/kvm/arm/vgic.c
+++ b
k more care about vgic_retire_lr(), which has deserved own patch.
Pavel Fedin (4):
KVM: arm/arm64: Remove vgic_irq_lr_map
KVM: arm/arm64: Replace lr_used with elrsr
KVM: arm/arm64: Clean up vgic_retire_lr() and surroundings
KVM: arm/arm64: Merge vgic_set_lr() and vgic_sync_lr_elrsr()
include/kvm
Now we see that vgic_set_lr() and vgic_sync_lr_elrsr() are always used
together. Merge them into one function, saving from second vgic_ops
dereferencing every time.
Signed-off-by: Pavel Fedin
---
include/kvm/arm_vgic.h | 1 -
virt/kvm/arm/vgic-v2.c | 5 -
virt/kvm/arm/vgic-v3.c | 5
ckly, we could stick to that version then, which will provide
the necessary changes to plug in LPIs, yet with
minimal changes (it will only remove vgic_irq_lr_map).
I guess i should have done it before. Or, i could even respin v5, with current
0001 split up. This should make it easier to bise
:
--- cut ---
-EBUSY: One or more VCPUs are running
--- cut ---
While my version says "VCPU is running". Since this is CPU interface, it does
not affect other CPUs, so for simplicity i check only current vCPU in my code.
That's all. Just i'm maybe too careful about fundamental
elrsr/aisr
in sync with software model"), because together with lr_used we also update
elrsr. This allows to easily replace lr_used with elrsr, inverting all
conditions (because in elrsr '1' means 'free').
Signed-off-by: Pavel Fedin
---
include/kvm/arm_vgic.h | 6 -
gic_irq_clear_queued() inside of it.
Signed-off-by: Pavel Fedin
---
virt/kvm/arm/vgic.c | 37 ++---
1 file changed, 10 insertions(+), 27 deletions(-)
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 265a410..96e45f3 100644
--- a/virt/kvm/arm/vgic.c
+++ b
Now we see that vgic_set_lr() and vgic_sync_lr_elrsr() are always used
together. Merge them into one function, saving from second vgic_ops
dereferencing every time.
Signed-off-by: Pavel Fedin
---
include/kvm/arm_vgic.h | 1 -
virt/kvm/arm/vgic-v2.c | 5 -
virt/kvm/arm/vgic-v3.c | 5
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