On 14 October 2014 08:21, Victor Kamensky victor.kamen...@linaro.org wrote:
On 14 October 2014 02:47, Marc Zyngier marc.zyng...@arm.com wrote:
On Sun, Sep 28 2014 at 03:04:26 PM, Christoffer Dall
christoffer.d...@linaro.org wrote:
The EIRSR and ELRSR registers are 32-bit registers on GICv2
On 14 October 2014 02:47, Marc Zyngier marc.zyng...@arm.com wrote:
On Sun, Sep 28 2014 at 03:04:26 PM, Christoffer Dall
christoffer.d...@linaro.org wrote:
The EIRSR and ELRSR registers are 32-bit registers on GICv2, and we
store these as an array of two such registers on the vgic vcpu struct.
On 25 January 2014 01:20, Alexander Graf ag...@suse.de wrote:
Am 25.01.2014 um 03:37 schrieb Victor Kamensky victor.kamen...@linaro.org:
On 24 January 2014 18:15, Alexander Graf ag...@suse.de wrote:
On 25.01.2014, at 02:58, Scott Wood scottw...@freescale.com wrote:
On Sat, 2014-01-25
On 25 January 2014 10:31, Christoffer Dall christoffer.d...@linaro.org wrote:
On Sat, Jan 25, 2014 at 04:23:00PM +, Peter Maydell wrote:
On 25 January 2014 02:15, Alexander Graf ag...@suse.de wrote:
Ok, let's go through the combinations for a 32-bit write of 0x01020304 on
PPC and what
On 25 January 2014 19:46, Victor Kamensky victor.kamen...@linaro.org wrote:
On 25 January 2014 10:31, Christoffer Dall christoffer.d...@linaro.org
wrote:
On Sat, Jan 25, 2014 at 04:23:00PM +, Peter Maydell wrote:
On 25 January 2014 02:15, Alexander Graf ag...@suse.de wrote:
Ok, let's go
On 25 January 2014 10:31, Christoffer Dall christoffer.d...@linaro.org wrote:
On Sat, Jan 25, 2014 at 04:23:00PM +, Peter Maydell wrote:
On 25 January 2014 02:15, Alexander Graf ag...@suse.de wrote:
Ok, let's go through the combinations for a 32-bit write of 0x01020304 on
PPC and what
On 24 January 2014 05:13, Alexander Graf ag...@suse.de wrote:
On 24.01.2014, at 14:09, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 01:01, Peter Maydell ha scritto:
+The 'data' member byte order is host kernel native endianness,
regardless of
+the endianness of the guest,
On 24 January 2014 07:32, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 16:23, Victor Kamensky ha scritto:
Also if you use ints on real bus as description, you may want to clarify
restrictions on mmio.len. Basically on 32 bit platform (i.e like V7
ARM) one cannot have mmio.len=8
On 24 January 2014 07:23, Victor Kamensky victor.kamen...@linaro.org wrote:
On 24 January 2014 05:13, Alexander Graf ag...@suse.de wrote:
On 24.01.2014, at 14:09, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 01:01, Peter Maydell ha scritto:
+The 'data' member byte order is host
On 24 January 2014 05:13, Alexander Graf ag...@suse.de wrote:
On 24.01.2014, at 14:09, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 01:01, Peter Maydell ha scritto:
+The 'data' member byte order is host kernel native endianness,
regardless of
+the endianness of the guest,
On 24 January 2014 15:51, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-24 at 15:39 -0800, Christoffer Dall wrote:
The KVM API documentation is not clear about the semantics of the data
field on the mmio struct on the kvm_run struct.
This has become problematic when supporting ARM
On 24 January 2014 18:15, Alexander Graf ag...@suse.de wrote:
On 25.01.2014, at 02:58, Scott Wood scottw...@freescale.com wrote:
On Sat, 2014-01-25 at 00:24 +, Peter Maydell wrote:
On 24 January 2014 23:51, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-24 at 15:39 -0800,
On 24 January 2014 05:13, Alexander Graf ag...@suse.de wrote:
On 24.01.2014, at 14:09, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 01:01, Peter Maydell ha scritto:
+The 'data' member byte order is host kernel native endianness,
regardless of
+the endianness of the guest,
On 24 January 2014 07:32, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 16:23, Victor Kamensky ha scritto:
Also if you use ints on real bus as description, you may want to clarify
restrictions on mmio.len. Basically on 32 bit platform (i.e like V7
ARM) one cannot have mmio.len=8
On 24 January 2014 07:23, Victor Kamensky victor.kamen...@linaro.org wrote:
On 24 January 2014 05:13, Alexander Graf ag...@suse.de wrote:
On 24.01.2014, at 14:09, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 01:01, Peter Maydell ha scritto:
+The 'data' member byte order is host
On 24 January 2014 05:13, Alexander Graf ag...@suse.de wrote:
On 24.01.2014, at 14:09, Paolo Bonzini pbonz...@redhat.com wrote:
Il 24/01/2014 01:01, Peter Maydell ha scritto:
+The 'data' member byte order is host kernel native endianness,
regardless of
+the endianness of the guest,
On 24 January 2014 15:51, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-24 at 15:39 -0800, Christoffer Dall wrote:
The KVM API documentation is not clear about the semantics of the data
field on the mmio struct on the kvm_run struct.
This has become problematic when supporting ARM
On 23 January 2014 02:23, Peter Maydell peter.mayd...@linaro.org wrote:
On 23 January 2014 00:22, Victor Kamensky victor.kamen...@linaro.org wrote:
Peter, could I please ask you a favor. Could you please
stop deleting pieces of your and my previous responses
when you reply.
No, sorry
On 23 January 2014 07:33, Peter Maydell peter.mayd...@linaro.org wrote:
On 23 January 2014 15:06, Victor Kamensky victor.kamen...@linaro.org wrote:
In [1] I wrote
I don't see why you so attached to desire to describe
data part of memory transaction as just one of int
types. If we are talking
On 23 January 2014 08:25, Victor Kamensky victor.kamen...@linaro.org wrote:
On 23 January 2014 07:33, Peter Maydell peter.mayd...@linaro.org wrote:
On 23 January 2014 15:06, Victor Kamensky victor.kamen...@linaro.org wrote:
In [1] I wrote
I don't see why you so attached to desire to describe
On 23 January 2014 12:45, Christoffer Dall christoffer.d...@linaro.org wrote:
On Thu, Jan 23, 2014 at 08:25:35AM -0800, Victor Kamensky wrote:
On 23 January 2014 07:33, Peter Maydell peter.mayd...@linaro.org wrote:
On 23 January 2014 15:06, Victor Kamensky victor.kamen...@linaro.org
wrote
On 23 January 2014 18:14, Christoffer Dall christoffer.d...@linaro.org wrote:
On Thu, Jan 23, 2014 at 04:50:18PM -0800, Victor Kamensky wrote:
On 23 January 2014 12:45, Christoffer Dall christoffer.d...@linaro.org
wrote:
On Thu, Jan 23, 2014 at 08:25:35AM -0800, Victor Kamensky wrote
Hi Peter,
On 22 January 2014 02:22, Peter Maydell peter.mayd...@linaro.org wrote:
On 22 January 2014 05:39, Victor Kamensky victor.kamen...@linaro.org wrote:
Hi Guys,
Christoffer and I had a bit heated chat :) on this
subject last night. Christoffer, really appreciate
your time! We did
On 22 January 2014 09:29, Peter Maydell peter.mayd...@linaro.org wrote:
On 22 January 2014 17:19, Victor Kamensky victor.kamen...@linaro.org wrote:
On 22 January 2014 02:22, Peter Maydell peter.mayd...@linaro.org wrote:
but the major issue here is that the data being
transferred is not just
On 22 January 2014 12:02, Peter Maydell peter.mayd...@linaro.org wrote:
On 22 January 2014 19:29, Victor Kamensky victor.kamen...@linaro.org wrote:
On 22 January 2014 09:29, Peter Maydell peter.mayd...@linaro.org wrote:
This just isn't how real buses work. There is no
address + 1, address + 2
,
it will make your response email bigger, but I am very
confused otherwise.
On 22 January 2014 15:18, Peter Maydell peter.mayd...@linaro.org wrote:
On 22 January 2014 22:47, Victor Kamensky victor.kamen...@linaro.org wrote:
You deleted my example, but I need it again:
Consider the following ARM code
Hi Alex,
Sorry, for delayed reply, I was focusing on discussion
with Peter. Hope you and other folks may get something
out of it :).
Please see responses inline
On 22 January 2014 02:52, Alexander Graf ag...@suse.de wrote:
On 22.01.2014, at 08:26, Victor Kamensky victor.kamen...@linaro.org
Hi Guys,
Christoffer and I had a bit heated chat :) on this
subject last night. Christoffer, really appreciate
your time! We did not really reach agreement
during the chat and Christoffer asked me to follow
up on this thread.
Here it goes. Sorry, it is very long email.
I don't believe we can
On 21 January 2014 22:41, Alexander Graf ag...@suse.de wrote:
Am 22.01.2014 um 07:31 schrieb Anup Patel a...@brainfault.org:
On Wed, Jan 22, 2014 at 11:09 AM, Victor Kamensky
victor.kamen...@linaro.org wrote:
Hi Guys,
Christoffer and I had a bit heated chat :) on this
subject last night
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