[PATCH] qemu-kvm: fix unmatched RAM alloction/free

calling will cause a segment fault. Signed-off-by: Xudong Hao --- exec.c |6 +- 1 files changed, 1 insertions(+), 5 deletions(-) diff --git a/exec.c b/exec.c index fa1e0c3..d40d237 100644 --- a/exec.c +++ b/exec.c @@ -1152,15 +1152,11 @@ void qemu_ram_free(ram_addr_t addr

[PATCH v3] qemu-kvm/pci-assign: 64 bits bar emulation

Enable 64 bits bar emulation. v3 changes from v2: - Leave original error string and drop the leading 016. v2 changes from v1: - Change 0lx% to 0x%016 when print a 64 bit variable. Test pass with the current seabios which already support 64bit pci bars. Signed-off-by: Xudong Hao --- hw/kvm

[PATCH v2] qemu-kvm/pci-assign: 64 bits bar emulation

Enable 64 bits bar emulation. v2 changes from v1: - Change 0lx% to 0x%016 when print a 64 bit variable. Test pass with the current seabios which already support 64bit pci bars. Signed-off-by: Xudong Hao --- hw/kvm/pci-assign.c | 22 ++ 1 files changed, 14 insertions

[PATCH v5] kvm/fpu: Enable fully eager restore kvm FPU

while update cr4 too. v3 changes from v2: - Make fpu active explicitly while guest xsave is enabling and non-lazy xstate bit exist. v2 changes from v1: - Expand KVM_XSTATE_LAZY to 64 bits before negating it. Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c | 9 ++--- arch/x86/kvm/x86.c

[PATCH] seabios/pci: enable 64 bit bar on seabios

64 bit bar sizing and MMIO allocation. The 64 bit window is placed above high memory, top down from the end of guest physical address space. Signed-off-by: Xudong Hao --- src/mtrr.c| 24 +- src/pci.h |2 +- src/pciinit.c | 99

[PATCH 2/2] qemu-kvm/pci-assign: 64 bits bar emulation

Enable 64 bits bar emulation. Signed-off-by: Xudong Hao --- hw/kvm/pci-assign.c | 18 -- 1 files changed, 12 insertions(+), 6 deletions(-) diff --git a/hw/kvm/pci-assign.c b/hw/kvm/pci-assign.c index 05b93d9..f1f8d1e 100644 --- a/hw/kvm/pci-assign.c +++ b/hw/kvm/pci-assign.c

[PATCH 1/2] qemu-kvm/cpuid: fix a emulation of guest physical address space

For 64 bit processor, emulate 40 bits physical address if the host physical address space >= 40bits, else guest physical is same as host. Signed-off-by: Xudong Hao --- target-i386/cpu.c |5 - 1 files changed, 4 insertions(+), 1 deletions(-) diff --git a/target-i386/cpu.c b/target-i

[PATCH v4] kvm/fpu: Enable fully eager restore kvm FPU

ve is enabling and non-lazy xstate bit exist. v2 changes from v1: - Expand KVM_XSTATE_LAZY to 64 bits before negating it. Signed-off-by: Xudong Hao --- arch/x86/include/asm/kvm.h |4 arch/x86/include/asm/kvm_host.h |1 + arch/x86/kvm/svm.c |1 + arch/x86/kvm/

[PATCH v3] kvm/fpu: Enable fully eager restore kvm FPU

igned-off-by: Xudong Hao --- arch/x86/include/asm/kvm.h |4 arch/x86/kvm/vmx.c |2 ++ arch/x86/kvm/x86.c | 15 ++- 3 files changed, 20 insertions(+), 1 deletions(-) diff --git a/arch/x86/include/asm/kvm.h b/arch/x86/include/asm/kvm.h index 521bf25..4c

[PATCH v2] kvm/fpu: Enable fully eager restore kvm FPU

Enable KVM FPU fully eager restore, if there is other FPU state which isn't tracked by CR0.TS bit. Changes from v1: Expand KVM_XSTATE_LAZY to 64 bits before negating it. Signed-off-by: Xudong Hao --- arch/x86/include/asm/kvm.h |4 arch/x86/kvm/x86.c | 13 +++

[PATCH] kvm/fpu: Enable fully eager restore kvm FPU

Enable KVM FPU fully eager restore, if there is other FPU state which isn't tracked by CR0.TS bit. Tested with these cases: 1) SpecCPU2000 workload( 1 VM, 2 VMs) 2) Program for floating point caculate Signed-off-by: Xudong Hao --- arch/x86/include/asm/kvm.h |4 arch/x86/kvm/

[PATCH 1/4] Add pci_obff_supported() function.

Add pci_obff_supported() function and use it by obff relative function. Signed-off-by: Xudong Hao --- drivers/pci/pci.c | 30 -- 1 files changed, 24 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 447e834..a70093b 100644

[PATCH 3/4] Enable OBFF before device is used by driver

Enable OBFF(optimized buffer flush/fill) in pci_enable_device() function, make sure this feature is enabled before device is used by driver. Signed-off-by: Xudong Hao --- drivers/pci/pci.c |9 + 1 files changed, 9 insertions(+), 0 deletions(-) diff --git a/drivers/pci/pci.c b

[PATCH 4/4] PCI: save/restore max Latency Value for device LTR

LTR: Save Max snoop/no-snoop Latency Value in pci_save_pcie_state, and restore them in pci_restore_pcie_state. Signed-off-by: Xudong Hao --- drivers/pci/pci.c | 71 --- drivers/pci/probe.c |5 +++- 2 files changed, 71 insertions(+), 5

[PATCH 2/4] Enable LTR before device is used by driver

Enable LTR(Latency tolerance reporting) in pci_enable_device(), make sure this feature is enabled before the device is used by driver. Signed-off-by: Xudong Hao --- drivers/pci/pci.c | 19 +++ 1 files changed, 19 insertions(+), 0 deletions(-) diff --git a/drivers/pci/pci.c b

[PATCH 0/4] PCI: Enable LTR/OBFF before device is used by driver

The series of patches enable LTR and OBFF before device is used by driver, and introduce a couple of functions to save/restore LTR latency value. Patch 1/4 introduce new function pci_obff_supported() as pci_ltr_support(). Patch 2/4 enable LTR(Latency tolerance reporting) before device is used by

[PATCH] KVM: change PT_FIRST_AVAIL_BITS_SHIFT to avoid conflict with EPT Dirty bit

EPT Dirty bit use bit 9 as Intel SDM definition, to avoid conflict, change PT_FIRST_AVAIL_BITS_SHIFT to 10. Signed-off-by: Xudong Hao Signed-off-by: Xiantao Zhang --- arch/x86/kvm/mmu.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm

[PATCH v3 3/4] Enable EPT A/D bits if supported by turning on relevant bit in EPTP.

In EPT page structure entry, Enable EPT A/D bits if processor supported. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 811a61e..89151a9 100644

[PATCH v3 2/4] Add parameter to control A/D bits support, default is on.

Add kernel parameter to control A/D bits support, it's on by default. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index d2bd719..81

[PATCH v3 1/4] Add EPT A/D bits definitions.

Add EPT A/D bits definitions. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/include/asm/vmx.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 31f180c..de007c2 100644 --- a/arch/x86

[PATCH v3 4/4] Enabling Access bit when doing memory swapping

Enabling Access bit when doing memory swapping. Changes from v2: -Still using claer_bit() function to make sure it's atomic operation. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/mmu.c | 14 -- arch/x86/kvm/vmx.c |6 -- 2 files change

[PATCH v3 4/4] Enabling Access bit when doing memory swapping

Enabling Access bit when doing memory swapping. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/mmu.c | 14 -- arch/x86/kvm/vmx.c |6 -- 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index

[PATCH v2 2/4] Add parameter to control A/D bits support

Add kernel parameter to control A/D bits support, it's on by default. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 3062ea9..f3

[PATCH v2 4/4] Enabling Access bit when doing memory swapping

Enabling Access bit when doing memory swapping. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/mmu.c | 13 +++-- arch/x86/kvm/vmx.c |6 -- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index

[PATCH v2 3/4] Enable EPT A/D bits if supported by turning on relevant bit in EPTP

In EPT page structure entry, Enable EPT A/D bits if processor supported. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index f3858bf..e8003b6 100644

[PATCH v2 1/4] Add EPT A/D bits definitions

Add EPT A/D bits definitions. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/include/asm/vmx.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 31f180c..de007c2 100644 --- a/arch/x86

[PATCH v2 2/4] Add parameter to control A/D bits support

Add kernel parameter to control A/D bits support, it's on by default. Changes from v1: -Use bool type for enable_ept_ad_bit. -Use "eptad" to replace "ept_ad_bits". Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c | 12 1 fil

[PATCH 4/4] Enabling Access bit when doing memory swapping

Enabling Access bit when doing memory swapping. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/mmu.c | 13 +++-- arch/x86/kvm/vmx.c |6 -- 2 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index

[PATCH 3/4] Enable EPT A/D bits if supported by turning on relevant bit in EPTP

In EPT page structure entry, Enable EPT A/D bits if processor supported. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c |2 ++ 1 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index 811a61e..89151a9 100644

[PATCH 2/4] Add parameter to control A/D bits support

Add kernel parameter to control A/D bits support, it's on by default. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/kvm/vmx.c | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index d2bd719..81

[PATCH 1/4] Add EPT A/D bits definitions

Add EPT A/D bits definitions. Signed-off-by: Haitao Shan Signed-off-by: Xudong Hao --- arch/x86/include/asm/vmx.h |4 1 files changed, 4 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h index 31f180c..de007c2 100644 --- a/arch/x86

[PATCH 0/4] KVM: Enable EPT access bit feature

EPT A/D bits enable VMMs to efficiently implement memory management and page classification algorithms to optimize VM memory operations such as de-fragmentation, paging, live-migration, and check-pointing. The series of patches enable the EPT access bit in KVM. PATCH 1: Add EPT A/D bits definit

[PATCH 1/1] Enable LTR/OBFF before device is used by driver

Enable LTR(Latency tolerance reporting) and OBFF(optimized buffer flush/fill) in pci_enable_device(), so that they are enabled before the device is used by driver. Signed-off-by: Xudong Hao --- drivers/pci/pci.c | 29 + 1 files changed, 29 insertions(+), 0

[PATCH] kvm: Enable device LTR/OBFF capibility before doing guest device assignment

Enable device LTR/OBFF capibility before do device assignment, so that guest can benefit from them. Signed-off-by: Xudong Hao --- virt/kvm/iommu.c | 32 1 files changed, 32 insertions(+), 0 deletions(-) diff --git a/virt/kvm/iommu.c b/virt/kvm/iommu.c index

[PATCH] PCI: save/restore max Latency Value for device LTR

LTR: Save Max snoop/no-snoop Latency Value in pci_save_pcie_state, and restore them in pci_restore_pcie_state. Signed-off-by: Xudong Hao --- drivers/pci/pci.c | 12 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index