> So if your question/issue is regarding stepping < 3, then it is something
> VIA explicitly indicates is not supported and has not been finished.
It is about stepping 3, see the original post for the cpuinfo.
_
>> Any details or workarounds?
>>
>
> There's a bug in the vm86/vmx interaction that happens to hit kvm. No
> known workarounds.
What about details?
Yuhong Bao
_
Hot
> It's a known bug in the Nano's vmx implementation.
Any details or workarounds?
Yuhong Bao
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old dual Celerons. At first achieved byhacking
slockets, later ABIT released the BP6 motherboard with dualSocket 370
specifically wired to allow this config. They were once commonamong
the enthusiast community, Ars Technica among other review siteshad old articles
about it.
Y
