[PATCH 13/20] MIPS: KVM: Add FP exception handling

to the guest (because no guest FPU was supported), but the hypervisor can now handle them if the guest has its FPU enabled by restoring the guest FPU context and enabling the FPU. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Paul Burton paul.bur...@imgtec.com

[PATCH 04/20] MIPS: KVM: Implement PRid CP0 register access

Implement access to the guest Processor Identification CP0 register using the KVM_GET_ONE_REG and KVM_SET_ONE_REG ioctls. This allows the owning process to modify and read back the value that is exposed to the guest in this register. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo

[PATCH 06/20] MIPS: KVM: Drop pr_info messages on init/exit

The information messages when the KVM module is loaded and unloaded are a bit pointless and out of line with other architectures, so lets drop them. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g

[PATCH 03/20] MIPS: KVM: Handle TRAP exceptions from guest kernel

message and stack trace. Implement handling of the trap exception so that it gets passed to the guest and the user is left with a more useful log message. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g

[PATCH 19/20] MIPS: KVM: Expose MSA registers

-bit half native endian as the kernel uses internally. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Paul Burton paul.bur...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc: Jonathan Corbet cor...@lwn.net Cc: linux-m

[PATCH 15/20] MIPS: KVM: Wire up FPU capability

Now that the code is in place for KVM to support FPU in MIPS KVM guests, wire up the new KVM_CAP_MIPS_FPU capability. For backwards compatibility, the capability must be explicitly enabled in order to detect or make use of the FPU from the guest. Signed-off-by: James Hogan james.ho...@imgtec.com

[PATCH 12/20] MIPS: KVM: Emulate FPU bits in COP0 interface

, but that's fine) when it is next used in the new FP mode. Any change to the Config5.FRE bit is immediately updated in the host state so that the guest can get the relevant exceptions right away for single-precision FPU operations. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini

[PATCH 5/9] mips/kvm: Support unsigned KVM registers

Add KVM register access functions for the uint32_t type. This is required for FP and MSA control registers, which are represented as unsigned 32-bit integers. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Leon Alrae leon.al...@imgtec.com Cc: Aurelien

[PATCH 6/9] mips/kvm: Support signed 64-bit KVM registers

Rename kvm_mips_{get,put}_one_reg64() to kvm_mips_{get,put}_one_ureg64() since they take an int64_t pointer, and add separate signed 64-bit accessors. These will be used for double precision floating point registers. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz

[PATCH 1/9] mips/kvm: Drop KVM_REG_MIPS_COUNT_* definitions

The KVM_REG_MIPS_COUNT_* definitions are now included in linux-headers/asm-mips/kvm.h since commit b061808d39fa (linux-headers: update linux headers to kvm/next), therefore the duplicate definitions in target-mips/kvm.c can now be dropped. Signed-off-by: James Hogan james.ho...@imgtec.com Cc

[PATCH 2/9] mips/kvm: Remove a couple of noisy DPRINTFs

The DPRINTFs in cpu_mips_io_interrupts_pending() and kvm_arch_pre_run() are particularly noisy during normal execution, and also not particularly helpful. Remove them so that more important debug messages can be more easily seen. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini

[PATCH 9/9] mips/kvm: Support MSA in MIPS KVM guests

.MSAP) and so that QEMU can save/restore the guest modifiable bits (Config5.MSAEn). The MSACSR/MSAIR registers and the MSA vector registers are now saved/restored. Since the FP registers are a subset of the vector registers, they are omitted if the guest has MSA. Signed-off-by: James Hogan james.ho

[PATCH 10/20] MIPS: KVM: Add vcpu_get_regs/vcpu_set_regs callback

guest registers as provided by the VZ ASE. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Paolo Bonzini pbonz...@redhat.com Cc: Gleb Natapov g...@kernel.org Cc: linux-m...@linux-mips.org Cc: kvm@vger.kernel.org --- arch/mips/include/asm/kvm_host.h | 2

[PATCH 20/20] MIPS: KVM: Wire up MSA capability

if the hardware supports MSA vector partitioning, since the extra support cannot be tested yet and it extends the state that the userland program would have to save. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb

[PATCH 18/20] MIPS: KVM: Add MSA exception handling

and the FPU. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Paul Burton paul.bur...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc: linux-m...@linux-mips.org Cc: kvm@vger.kernel.org --- arch/mips/include/asm/kvm_host.h | 16

[PATCH 09/20] MIPS: KVM: Add Config4/5 and writing of Config registers

not to change bits without fully handling the possible extra state that may then exist and which the guest may begin to use and depend on. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc

Re: [Patch v3] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

) and hope to have some patches to show in the near future. Signed-off-by: James Sullivan sullivan.jame...@gmail.com --- Changes since v2: * Added one time warning message when RH=1 * Documented conflict between RH=1 and delivery mode * Tidied code to check RH=1/DM=1 (remove bool phys

[Patch v4] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

) and hope to have some patches to show in the near future. Signed-off-by: James Sullivan sullivan.jame...@gmail.com --- Changes since v2: * Added one time warning message when RH=1 * Documented conflict between RH=1 and delivery mode * Tidied code to check RH=1/DM=1 (remove bool phys

Re: [PATCH 8/9] mips/kvm: Support FPU in MIPS KVM guests

On 12/03/15 16:44, Paolo Bonzini wrote: On 11/03/2015 16:22, James Hogan wrote: diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index 12045a11c036..410eb158f564 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -761,6 +761,7 @@ struct

Re: [PATCH 4/9] mips/kvm: Implement Config CP0 registers

On 12/03/15 16:41, Leon Alrae wrote: On 11/03/2015 15:22, James Hogan wrote: Implement saving and restoring to KVM state of the Config CP0 registers (namely Config, Config1, Config2, Config3, Config4, and Config5). These control the features available to a guest, and a few of the fields

[Patch v3] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

kvm_lapic_irq, introduction of MSI specific delivery functions or helpers, etc) and hope to have some patches to show in the near future. Signed-off-by: James Sullivan sullivan.jame...@gmail.com --- Changes since v2: * Added one time warning message when RH=1 * Documented conflict between RH

[PATCH v2] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

interrupt delivery function for MSI interrupts in kvm_set_msi, which is a bit hacky but probably the only way to do this without modifying the kvm_lapic_irq struct. I'll write this up and see how it looks, unless there are major objections. Signed-off-by: James Sullivan sullivan.jame

[PATCH 4/9] mips/kvm: Implement Config CP0 registers

them on migration/savevm. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Leon Alrae leon.al...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net --- target-mips/kvm.c | 108 ++ 1 file changed, 108

[PATCH 8/9] mips/kvm: Support FPU in MIPS KVM guests

that QEMU can save/restore the guest modifiable bits (Config5.FRE, Config5.UFR, Config5.UFE). The FCSR/FIR registers and the floating point registers are now saved/restored (depending on the FR mode bit). Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Leon

[PATCH 3/9] mips/kvm: Implement PRid CP0 register

Implement saving and restoring to KVM state of the Processor ID (PRid) CP0 register. This allows QEMU to control the PRid exposed to the guest instead of using the default set by KVM. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Leon Alrae leon.al

[PATCH 7/9] mips/kvm: Add FP MSA register definitions

Add the new floating point and MIPS SIMD Architecture (MSA) KVM register definitions to kvm.c. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Leon Alrae leon.al...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net --- target-mips/kvm.c | 27

[PATCH 0/9] mips/kvm: Support FPU SIMD (MSA) in MIPS KVM guests

. James Hogan (9): mips/kvm: Drop KVM_REG_MIPS_COUNT_* definitions mips/kvm: Remove a couple of noisy DPRINTFs mips/kvm: Implement PRid CP0 register mips/kvm: Implement Config CP0 registers mips/kvm: Support unsigned KVM registers mips/kvm: Support signed 64-bit KVM registers mips/kvm

Re: [PATCH] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

On 03/11/2015 07:43 AM, Radim Krčmář wrote: 2015-03-10 16:39-0600, James Sullivan: On 03/10/2015 08:47 AM, Radim Krčmář wrote: + irq-dest_mode = phys ? 0 : (MSI_ADDR_DEST_MODE_LOGICAL); (Should be APIC_DEST_LOGICAL. All works because it is a boolean and we only checked

[PATCH 00/20] MIPS: KVM: Guest FPU SIMD (MSA) support

to restore FCSR/MSACSR registers with exceptions pending. - Patches 3..10 add various misc KVM improvements and cleanups, most of which the later patches depend on. - Patches 11..15 add the main guest FPU support. - Patches 16..20 add the main guest MSA support (structured like 11.15). James

[PATCH 16/20] MIPS: KVM: Add base guest MSA support

-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Paul Burton paul.bur...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc: linux-m...@linux-mips.org Cc: kvm@vger.kernel.org --- arch/mips/include/asm/kvm_host.h | 21 - arch/mips/kernel

[PATCH 14/20] MIPS: KVM: Expose FPU registers

mode of the guest, with each sized access showing what the guest would see with an equivalent access, and like the architecture they may become UNPREDICTABLE if the FR mode is changed. When FR=0, odd doubles are inaccessible as they do not exist in that mode. Signed-off-by: James Hogan james.ho

[PATCH 07/20] MIPS: KVM: Clean up register definitions a little

-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc: linux-m...@linux-mips.org Cc: kvm@vger.kernel.org --- arch/mips/include/asm/kvm_host.h | 4 +- arch/mips/include/uapi/asm/kvm.h | 115

[PATCH 05/20] MIPS: KVM: Sort kvm_mips_get_reg() registers

Sort the registers in the kvm_mips_get_reg() switch by register number, which puts ERROREPC after the CONFIG registers. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc: linux-m

[PATCH 02/20] MIPS: Clear [MSA]FPE CSR.Cause after notify_die()

(msacsr) and calls notify_die() with the new DIE_MSAFP, allowing die notifiers to be informed of MSA FPEs too. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Paul Burton paul.bur...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Gleb Natapov g

[PATCH 11/20] MIPS: KVM: Add base guest FPU support

architecturally UNPREDICTABLE (change of FR mode) to force a reload of [stale] context in the new FR mode. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Paul Burton paul.bur...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb Natapov g...@kernel.org Cc

[PATCH 08/20] MIPS: KVM: Simplify default guest Config registers

Various semi-used definitions exist in kvm_host.h for the default guest config registers. Remove them and use the appropriate values directly when initialising the Config registers. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux

[PATCH 01/20] MIPS: KVM: Handle MSA Disabled exceptions from guest

Disabled exception by emulating a Reserved Instruction exception in the guest, via a new handle_msa_disabled() KVM callback. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Paul Burton paul.bur...@imgtec.com Cc: Ralf Baechle r...@linux-mips.org Cc: Gleb

Re: [PATCH] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

-James -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] x86: irq_comm: Add check for RH bit in kvm_set_msi_irq

the RH bit is unset, and physical destination mode is used in this case. Fixed this to set irq-dest_mode to logical just when both bits are set, and physical otherwise. Signed-off-by: James Sullivan sullivan.jame...@gmail.com --- arch/x86/kvm/irq_comm.c | 12 ++-- 1 file changed, 10

[PATCH stable 3.10, 3.12, 3.14] MIPS: Export FP functions used by lose_fpu(1) for KVM

: Don't leak FPU/DSP to guest): ERROR: _save_fp [arch/mips/kvm/kvm.ko] undefined! Signed-off-by: James Hogan james.ho...@imgtec.com Fixes: f798217dfd03 (KVM: MIPS: Don't leak FPU/DSP to guest) Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Paul Burton paul.bur

Re: [PATCH 3.14 58/73] KVM: MIPS: Dont leak FPU/DSP to guest

Hi Greg, On Tue, Mar 03, 2015 at 10:13:26PM -0800, Greg Kroah-Hartman wrote: 3.14-stable review patch. If anyone has any objections, please let me know. -- From: James Hogan james.ho...@imgtec.com commit f798217dfd038af981a18bbe4bc57027a08bb182 upstream. The FPU

[PATCH stable 3.12, 3.14] KVM: MIPS: Don't leak FPU/DSP to guest

lazily restored, so for that it is simpler to just clear the MX bit again when re-entering the guest. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Sanjay Lal sanj...@kymasys.com Cc: Gleb Natapov g...@kernel.org Cc

[PATCH stable 3.10] KVM: MIPS: Don't leak FPU/DSP to guest

lazily restored, so for that it is simpler to just clear the MX bit again when re-entering the guest. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Sanjay Lal sanj...@kymasys.com Cc: Gleb Natapov g...@kernel.org Cc

[PATCH] MIPS: KVM: Fix trace event to save PC directly

value is accessible later. Fixes: 669e846e6c4e (KVM/MIPS32: MIPS arch specific APIs for KVM) Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Marcelo Tosatti mtosa...@redhat.com Cc: Gleb Natapov g...@kernel.org Cc

Re: [PATCH] arch: mips: kvm: Enable after disabling interrupt

On Sun, Feb 22, 2015 at 09:48:21PM +0530, Tapasweni Pathak wrote: Enable disabled interrupt, on unsuccessful operation. Found by Coccinelle. Signed-off-by: Tapasweni Pathak tapaswenipat...@gmail.com Acked-by: Julia Lawall julia.law...@lip6.fr Reviewed-by: James Hogan james.ho

Re: [PATCH] KVM: MIPS: Don't leak FPU/DSP to guest

On Tue, Feb 10, 2015 at 09:01:07AM +0100, Paolo Bonzini wrote: -BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 09/02/2015 23:58, James Hogan wrote: First lets save and disable the FPU (and MSA) state with lose_fpu(1) Please don't apply this patch yet. lose_fpu() uses function

[PATCH 1/2] MIPS: Export FP functions used by lose_fpu(1) for KVM

/kvm.ko] undefined! Fixes: f798217dfd03 (KVM: MIPS: Don't leak FPU/DSP to guest) Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Paul Burton paul.bur...@imgtec.com Cc: Gleb Natapov g...@kernel.org Cc: kvm@vger.kernel.org

[PATCH 0/2] MIPS: Export functions used by lose_fpu(1) for KVM

...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Paul Burton paul.bur...@imgtec.com Cc: Gleb Natapov g...@kernel.org Cc: kvm@vger.kernel.org Cc: linux-m...@linux-mips.org Cc: sta...@vger.kernel.org James Hogan (2): MIPS: Export FP functions used by lose_fpu(1) for KVM MIPS: Export MSA

[PATCH 2/2] MIPS: Export MSA functions used by lose_fpu(1) for KVM

: _save_msa [arch/mips/kvm/kvm.ko] undefined! Fixes: f798217dfd03 (KVM: MIPS: Don't leak FPU/DSP to guest) Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Paul Burton paul.bur...@imgtec.com Cc: Gleb Natapov g

Re: [PATCH] KVM: MIPS: Don't leak FPU/DSP to guest

Hi Paolo, On Wed, Feb 04, 2015 at 05:06:37PM +, James Hogan wrote: The FPU and DSP are enabled via the CP0 Status CU1 and MX bits by kvm_mips_set_c0_status() on a guest exit, presumably in case there is active state that needs saving if pre-emption occurs. However neither of these bits

[PATCH] KVM: MIPS: Don't leak FPU/DSP to guest

the MX bit again when re-entering the guest. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Sanjay Lal sanj...@kymasys.com Cc: Gleb Natapov g...@kernel.org Cc: kvm@vger.kernel.org Cc: linux-m...@linux-mips.org Cc: sta

[PATCH] KVM: MIPS: Disable HTW while in guest

the HTW is only disabled in normal kernel mode while interrupts are disabled, so that the HTW doesn't get left disabled if the process is preempted. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Ralf Baechle r...@linux-mips.org Cc: Markos Chandras

Re: [PATCH v12 2/6] KVM: Add generic support for dirty page logging

a bit wrong to add a generic higher level function which doesn't make use of the existing generic lower level abstraction. (Appologies if this has already been brought up in previous versions of the patchset, I haven't been tracking them). Cheers James + + r = 0; +out: + mutex_unlock

Re: [PATCH v12 2/6] KVM: Add generic support for dirty page logging

a bit wrong to add a generic higher level function which doesn't make use of the existing generic lower level abstraction. (Appologies if this has already been brought up in previous versions of the patchset, I haven't been tracking them). Cheers James + + r = 0; +out: + mutex_unlock

[PATCH] target-mips: Ignore unassigned accesses with KVM

with Malta emulation by making the guest write to the reset region at physical address 0x1bf0, since it is marked read-only which is treated as unassigned for writes. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Peter Maydell peter.mayd

Re: [PATCH 35/38] unicore32: clean-up uapi Kbuild file

. For UAPI, they're presumably only needed for architectures which support KVM (s390, ia64, arm, powerpc, arm64, mips, x86 all provide an asm/kvm.h). Is that right? Clearly there's some cleanup to do for kvm_para.h (which is what made me look at the header issues previously). Cheers James

Re: [Qemu-devel] [PATCH v5 00/12] KVM Support for MIPS32 Processors

Hi Peter, On 10/07/14 13:17, Peter Maydell wrote: On 17 June 2014 23:10, James Hogan james.ho...@imgtec.com wrote: The patchset depends on v4 of target-mips: implement UserLocal Register. I'm aiming for QEMU 2.1, hopefully it isn't too late to get some final review. Thanks to everybody who

Re: [Qemu-devel] [PATCH v5 00/12] KVM Support for MIPS32 Processors

On 14/07/14 15:35, Peter Maydell wrote: On 14 July 2014 14:33, James Hogan james.ho...@imgtec.com wrote: On 10/07/14 13:17, Peter Maydell wrote: More generally, there doesn't really seem to be provision in the KVM KVM_EXIT_MMIO API for returning this access failed. I guess in theory userspace

[PATCH 0/3] KVM: Document MIPS specifics of KVM API

A few patches to improve the KVM API documentation, especially with respect to MIPS. James Hogan (3): KVM: Document KVM_SET_SIGNAL_MASK as universal KVM: Reformat KVM_SET_ONE_REG register documentation KVM: MIPS: Document MIPS specifics of KVM API. Documentation/virtual/kvm/api.txt | 287

[PATCH 2/3] KVM: Reformat KVM_SET_ONE_REG register documentation

. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Gleb Natapov g...@kernel.org Cc: kvm@vger.kernel.org Cc: Randy Dunlap rdun...@infradead.org Cc: linux-...@vger.kernel.org --- Documentation/virtual/kvm/api.txt | 222 +++--- 1 file

[PATCH 3/3] KVM: MIPS: Document MIPS specifics of KVM API.

and KVM_GET_REG_LIST are supported on MIPS. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Gleb Natapov g...@kernel.org Cc: kvm@vger.kernel.org Cc: Randy Dunlap rdun...@infradead.org Cc: linux-...@vger.kernel.org --- Documentation/virtual/kvm/api.txt | 63

[PATCH 1/3] KVM: Document KVM_SET_SIGNAL_MASK as universal

KVM_SET_SIGNAL_MASK is implemented in generic code and isn't x86 specific, so document it as being applicable for all architectures. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Gleb Natapov g...@kernel.org Cc: kvm@vger.kernel.org Cc: Randy Dunlap

Re: [PATCH v4 0/7] MIPS: KVM: Bugfixes and cleanups

in kvm_mips_emul_tlbwr()), add Reported-by. Thanks. The remaining changes look good to me. Patches 1, 2, and 7: Reviewed-by: James Hogan james.ho...@imgtec.com Cheers James v3 - v2: o In patch #2, change the use of kvm_[err|info|debug]. o In patch #3, add err removal

[PATCH v2 2/4] mips/kvm: Disable FPU on reset with KVM

, however we should ensure it is set correctly now to reduce the risk of breaking migration/loadvm to a future version of QEMU/Linux that does support it. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Paolo Bonzini pbonz...@redhat.com --- A slight

[PATCH 1/4] mips/kvm: Init EBase to correct KSEG0

of QEMU that does support EBase. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Paolo Bonzini pbonz...@redhat.com --- target-mips/translate.c | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/target-mips/translate.c b/target

[PATCH 0/4] QEMU MIPS KVM improvements for v2.1

This patchset has a few improvements minor fixes for MIPS KVM support. Patches 1-2 are fixes for forward compatibility of savevm with MIPS KVM. Patch 3 just corrects comments and an error message. Patch 4 adds errors when the wrong type of kernel is provided. James Hogan (4): mips/kvm: Init

[PATCH 2/4] mips_malta: Change default KVM cpu to 24Kc (no FP)

the risk of breaking migration/loadvm to a future version of QEMU/Linux that does support them. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Paolo Bonzini pbonz...@redhat.com --- hw/mips/mips_malta.c | 7 ++- 1 file changed, 6 insertions(+), 1

[PATCH 4/4] mips_malta: Catch kernels linked at wrong address

Add error reporting if the wrong type of kernel is provided for the current mode of acceleration. Currently a KVM kernel linked at 0x4000 can't be used with TCG, and a normal kernel linked at 0x8000 can't be used with KVM. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien

[PATCH 3/4] mips_malta: Remove incorrect KVM TE references

Fix the error message and code comments relating to KVM not supporting booting from the flash mapping when no kernel is provided. The issue is a general MIPS KVM issue and isn't specific to the Trap Emulate version of MIPS KVM. Reported-by: Andreas Färber afaer...@suse.de Signed-off-by: James

Re: [PATCH 0/4] QEMU MIPS KVM improvements for v2.1

On 26/06/14 11:12, Paolo Bonzini wrote: Il 26/06/2014 11:44, James Hogan ha scritto: This patchset has a few improvements minor fixes for MIPS KVM support. Patches 1-2 are fixes for forward compatibility of savevm with MIPS KVM. Patch 3 just corrects comments and an error message. Patch 4

Re: [PATCH v4 5/7] MIPS: KVM: Rename files to remove the prefix kvm_ and kvm_mips_

of the files start with kvm_mips_ at the moment, which is completely redundant. As for churn, renaming the files hardly produces much churn compared to cleaning up coding style issues like some of the other patches, but I still think even they are worth doing. Cheers James -- To unsubscribe from

Re: [PATCH v3 2/9] MIPS: KVM: Use KVM internal logger

that userland wasn't trying to access memory that would be accessible on a normal MIPS core but isn't with the TE segment layout. Otherwise this patch looks okay to me. Cheers James -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org

Re: [PATCH v3 3/9] MIPS: KVM: Simplify functions by removing redundancy

On 24/06/14 18:31, Deng-Cheng Zhu wrote: From: Deng-Cheng Zhu dengcheng@imgtec.com No logic changes inside. Signed-off-by: Deng-Cheng Zhu dengcheng@imgtec.com I'm indifferent to many of the changes, but still, Reviewed-by: James Hogan james.ho...@imgtec.com Thanks James

Re: [PATCH v3 4/9] MIPS: KVM: Remove unneeded volatile

On 24/06/14 18:31, Deng-Cheng Zhu wrote: From: Deng-Cheng Zhu dengcheng@imgtec.com The keyword volatile for idx in the TLB functions is unnecessary. Signed-off-by: Deng-Cheng Zhu dengcheng@imgtec.com Reviewed-by: James Hogan james.ho...@imgtec.com Cheers James --- arch/mips

Re: [PATCH v3 5/9] MIPS: KVM: Rename files to remove the prefix kvm_ and kvm_mips_

it won't make backporting patches a pain). Reviewed-by: James Hogan james.ho...@imgtec.com Cheers James -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH v3 6/9] MIPS: KVM: Restore correct value for WIRED at TLB uninit

, so I don't think this is an improvement. I suspect to really be safe/correct in the presence of other dynamic users of wired it would have to either manage arbitrary allocation/deallocation of per-cpu tlb entries correctly from a single place, or abandon the use of wired altogether. Cheers James

Re: [PATCH v3 7/9] MIPS: KVM: Fix memory leak on VCPU

-Cheng Zhu dengcheng@imgtec.com Reviewed-by: James Hogan james.ho...@imgtec.com Maybe worth adding Cc: sta...@vger.kernel.org and moving this to the beginning of the patchset to avoid conflicts. Cheers James -- To unsubscribe from this list: send the line unsubscribe kvm in the body

Re: [PATCH v3 8/9] MIPS: KVM: Skip memory cleaning in kvm_mips_commpage_init()

Reviewed-by: James Hogan james.ho...@imgtec.com Cheers James -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH v3 1/9] MIPS: KVM: Reformat code and comments

Otherwise this patch looks good. Thanks for doing this! Cheers James -- To unsubscribe from this list: send the line unsubscribe kvm in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [Qemu-devel] [PATCH v5 10/12] hw/mips: malta: Add KVM support

Hi, On 20/06/14 07:07, Paolo Bonzini wrote: - Messaggio originale - Da: Aurelien Jarno aurel...@aurel32.net A: Sanjay Lal sanj...@kymasys.com Cc: James Hogan james.ho...@imgtec.com, qemu-de...@nongnu.org, Peter Maydell peter.mayd...@linaro.org, kvm@vger.kernel.org, Gleb Natapov g

Re: [Qemu-devel] [PATCH v5 10/12] hw/mips: malta: Add KVM support

On 19/06/14 22:47, Aurelien Jarno wrote: On Thu, Jun 19, 2014 at 12:34:24PM -0700, Sanjay Lal wrote: On Jun 19, 2014, at 9:27 AM, Aurelien Jarno aurel...@aurel32.net wrote: On Tue, Jun 17, 2014 at 11:10:35PM +0100, James Hogan wrote: In KVM mode the bootrom is loaded and executed from

Re: [Qemu-devel] [PATCH v5 10/12] hw/mips: malta: Add KVM support

that to QEMU too. lkvm patchset (applied): https://www.mail-archive.com/kvm%40vger.kernel.org/msg102792.html linux kernel patchset (merged in v3.16-rc1): https://www.mail-archive.com/kvm%40vger.kernel.org/msg102806.html Cheers James -- To unsubscribe from this list: send the line unsubscribe kvm in the body

[PATCH v5 08/12] target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset()

When KVM is enabled call kvm_mips_reset_vcpu() from mips_cpu_reset() as done for other targets since commit 50a2c6e55fa2 (kvm: reset state from the CPU's reset method). Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Paolo Bonzini pbonz...@redhat.com

[PATCH v5 09/12] hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls

From: Sanjay Lal sanj...@kymasys.com COP0 emulation is in-kernel for KVM, so inject IRQ2 (I/O) interrupts via ioctls. Signed-off-by: Sanjay Lal sanj...@kymasys.com Signed-off-by: James Hogan james.ho...@imgtec.com Reviewed-by: Aurelien Jarno aurel...@aurel32.net Reviewed-by: Andreas Färber afaer

[PATCH v5 06/12] kvm: Allow arch to set sigmask length

kvm_arch_init(). Otherwise default to 8 bytes. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Sanjay Lal sanj...@kymasys.com Cc: Gleb Natapov g...@redhat.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Peter Maydell peter.mayd...@linaro.org --- Changes

[PATCH v5 12/12] MAINTAINERS: Add entry for MIPS KVM

Add MAINTAINERS entry for MIPS KVM. Signed-off-by: James Hogan james.ho...@imgtec.com --- Changes in v4: - Add MAINTAINERS entry for MIPS KVM. --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 51a6f51842be..0a637c90c679 100644

[PATCH v5 03/12] hw/mips: Add API to convert KVM guest KSEG0 - GPA

-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net --- Changes in v5: - KSEG0 doesn't actually change size, so fix mask in cpu_mips_kseg0_to_phys() instead of having the KVM specific cpu_mips_kvm_um_kseg0_to_phys(). Changes in v2: - Expand commit message - Remove

[PATCH v5 02/12] hw/mips/cputimer: Don't start periodic timer in KVM mode

, treating the timer as stopped so that CP0_Count is modified directly. Signed-off-by: Sanjay Lal sanj...@kymasys.com [james.ho...@imgtec.com: Update after target-mips: Reset CPU timer consistently which moves timer start to reset time] Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien

[PATCH v5 01/12] target-mips: Reset CPU timer consistently

and the CPU timer, so env-timer will be NULL. This case is handled explicitly in cpu_mips_store_count(), treating the timer as disabled (which will also be the right thing to do when KVM support is added). Reported-by: Paolo Bonzini pbonz...@redhat.com Signed-off-by: James Hogan james.ho

[PATCH v5 07/12] target-mips: kvm: Add main KVM support for MIPS

From: Sanjay Lal sanj...@kymasys.com Implement the main KVM arch API for MIPS. Signed-off-by: Sanjay Lal sanj...@kymasys.com Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net Cc: Gleb Natapov g...@redhat.com Cc: Paolo Bonzini pbonz...@redhat.com Cc

[PATCH v5 10/12] hw/mips: malta: Add KVM support

In KVM mode the bootrom is loaded and executed from the last 1MB of DRAM. Based on [PATCH 12/12] KVM/MIPS: General KVM support and support for SMP Guests by Sanjay Lal sanj...@kymasys.com. Signed-off-by: James Hogan james.ho...@imgtec.com Reviewed-by: Aurelien Jarno aurel...@aurel32.net Cc

[PATCH v5 04/12] target-mips: get_physical_address: Add defines for segment bases

Add preprocessor definitions for 32bit segment bases for use in get_physical_address(). These will also be taken advantage of in the next patch which adds KVM awareness. Signed-off-by: James Hogan james.ho...@imgtec.com Reviewed-by: Aurelien Jarno aurel...@aurel32.net --- target-mips/helper.c

[PATCH v5 11/12] target-mips: Enable KVM support in build system

From: Sanjay Lal sanj...@kymasys.com Enable KVM support for MIPS in the build system. Signed-off-by: Sanjay Lal sanj...@kymasys.com Signed-off-by: James Hogan james.ho...@imgtec.com Reviewed-by: Aurelien Jarno aurel...@aurel32.net --- Changes in v2: - Expand commit message - Remove GIC code

[PATCH v5 00/12] KVM Support for MIPS32 Processors

61cc919f73ea (configure: detect endian via compile test) - Add translation of guest kernel segments to allow an attached gdb to see kernel memory correctly James Hogan (7): target-mips: Reset CPU timer consistently target-mips: get_physical_address: Add defines for segment bases target-mips

[PATCH v5 05/12] target-mips: get_physical_address: Add KVM awareness

kseg0 or kseg2 address before doing the normal address translation. The real virtual address is still used for TLB lookups. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Aurelien Jarno aurel...@aurel32.net --- target-mips/helper.c | 33 ++--- 1 file changed, 26

Re: [PATCH v2 00/23] MIPS: KVM: Fixes and guest timer rewrite

On 30/05/14 08:57, Paolo Bonzini wrote: Il 29/05/2014 22:44, James Hogan ha scritto: Yes, I agree with your analysis and had considered something like this, although it doesn't particularly appeal to my sense of perfectionism :). I can see that. But I think the simplification of the code

[PATCH v2 00/23] MIPS: KVM: Fixes and guest timer rewrite

values are rejected if they refer to a monotonic time in the future. - Expand on description of KVM_REG_MIPS_COUNT_RESUME about the effects of the register and that it can be written. v1 (tag:kvm_mips_timer_v1): see http://marc.info/?l=kvmm=139843936102657w=2 James Hogan (23): MIPS: KVM

[PATCH v2 04/23] MIPS: KVM: Use tlb_write_random

. This happens to also fix an issue with Ingenic XBurst cores where the same TLB entry is replaced each time preventing forward progress on stores due to alternating between TLB load misses for the instruction fetch and TLB store misses. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini

[PATCH v2 01/23] MIPS: KVM: Allocate at least 16KB for exception handlers

overwritten and infinitely recursive exceptions on the next exit from the guest. Increase the minimum size from 0x200 to 0x4000 to cover the full use of the page. Signed-off-by: James Hogan james.ho...@imgtec.com Cc: Paolo Bonzini pbonz...@redhat.com Cc: Gleb Natapov g...@kernel.org Cc: kvm

[PATCH v2 10/23] MIPS: KVM: Deliver guest interrupts after local_irq_disable()

When about to run the guest, deliver guest interrupts after disabling host interrupts. This should prevent an hrtimer interrupt from being handled after delivering guest interrupts, and therefore not delivering the guest timer interrupt until after the next guest exit. Signed-off-by: James Hogan

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