On 05/05/2010 01:38 PM, Shane Wang wrote:
Per Intel SDM 3B 20.7, for IA32_FEATURE_CONTROL MSR
Bit 1 enables VMXON in SMX operation. If the bit is clear, execution of VMXON
in SMX operation causes a general-protection exception.
Bit 2 enables VMXON outside SMX operation. If the bit is clear, exec
Per Intel SDM 3B 20.7, for IA32_FEATURE_CONTROL MSR
Bit 1 enables VMXON in SMX operation. If the bit is clear, execution of VMXON
in SMX operation causes a general-protection exception.
Bit 2 enables VMXON outside SMX operation. If the bit is clear, execution of
VMXON outside SMX operation causes