Currently, the following instructions are translated:
- CACHE (indexed)
- CACHE (va based): translated to a synci, overkill on D-CACHE operations, but
still much faster than a trap.
- mfc0/mtc0: the virtual COP0 registers for the guest are implemented as 2-D
array
[COP#][SEL] and this is mapped
On 10/31/2012 05:19 PM, Sanjay Lal wrote:
> Currently, the following instructions are translated:
> - CACHE (indexed)
> - CACHE (va based): translated to a synci, overkill on D-CACHE operations,
> but still much faster than a trap.
> - mfc0/mtc0: the virtual COP0 registers for the guest are implem
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
> Behalf Of Avi Kivity
> Sent: Thursday, November 01, 2012 8:54 PM
> To: Sanjay Lal
> Cc: kvm@vger.kernel.org; linux-m...@linux-mips.org
> Subject: Re: [PATCH 07/20] KVM/M
On Nov 1, 2012, at 11:24 AM, Avi Kivity wrote:
> On 10/31/2012 05:19 PM, Sanjay Lal wrote:
>> Currently, the following instructions are translated:
>> - CACHE (indexed)
>> - CACHE (va based): translated to a synci, overkill on D-CACHE operations,
>> but still much faster than a trap.
>> - mfc0/m
On Nov 1, 2012, at 11:24 AM, Avi Kivity wrote:
> On 10/31/2012 05:19 PM, Sanjay Lal wrote:
>> Currently, the following instructions are translated:
>> - CACHE (indexed)
>> - CACHE (va based): translated to a synci, overkill on D-CACHE operations,
>> but still much faster than a trap.
>> - mfc0/m
