On Saturday 27 September 2008 21:55:33 Zwane Mwaikambo wrote:
> On Sat, 27 Sep 2008, Avi Kivity wrote:
> > Yang, Sheng wrote:
> > > I think we should do a little more than just write msr to update mtrr.
> > >
> > > Intel SDM 10.11.8 "MTRR consideration in MP Systems" define the
> > > procedure to m
On Sat, 27 Sep 2008, Avi Kivity wrote:
> Yang, Sheng wrote:
> > I think we should do a little more than just write msr to update mtrr.
> >
> > Intel SDM 10.11.8 "MTRR consideration in MP Systems" define the procedure to
> > modify MTRR msr in MP. Especially, step 4 enter no-fill cache mode(set
>
Yang, Sheng wrote:
I think we should do a little more than just write msr to update mtrr.
Intel SDM 10.11.8 "MTRR consideration in MP Systems" define the procedure to
modify MTRR msr in MP. Especially, step 4 enter no-fill cache mode(set CR0.CD
bit and clean NW bit), step 12 re-enabled the cac
On Friday 26 September 2008 01:52:29 Alex Williamson wrote:
> kvm: bios: switch MTRRs to cover only the PCI range and default to WB
>
> This matches how some bare metal machines report MTRRs and avoids
> the problem of running out of MTRRs to cover all of RAM.
>
> Signed-off-by: Alex Williamson <[E
kvm: bios: switch MTRRs to cover only the PCI range and default to WB
This matches how some bare metal machines report MTRRs and avoids
the problem of running out of MTRRs to cover all of RAM.
Signed-off-by: Alex Williamson <[EMAIL PROTECTED]>
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bios/rombios32.c | 24 ---
