On Fri, Oct 31, 2014 at 01:49:12PM +, Andre Przywara wrote:
Hi Christoffer,
On 15/10/14 17:26, Christoffer Dall wrote:
On Thu, Aug 21, 2014 at 02:06:45PM +0100, Andre Przywara wrote:
[...]
+ * 8 bytes long, caused by a 64-bit access
+ */
+
+ mmio32.len = 4;
+
Hi Christoffer,
On 15/10/14 17:26, Christoffer Dall wrote:
On Thu, Aug 21, 2014 at 02:06:45PM +0100, Andre Przywara wrote:
Some GICv3 registers can and will be accessed as 64 bit registers.
Currently the register handling code can only deal with 32 bit
accesses, so we do two consecutive calls
On Thu, Aug 21, 2014 at 02:06:45PM +0100, Andre Przywara wrote:
Some GICv3 registers can and will be accessed as 64 bit registers.
Currently the register handling code can only deal with 32 bit
accesses, so we do two consecutive calls to cover this.
Signed-off-by: Andre Przywara
Some GICv3 registers can and will be accessed as 64 bit registers.
Currently the register handling code can only deal with 32 bit
accesses, so we do two consecutive calls to cover this.
Signed-off-by: Andre Przywara andre.przyw...@arm.com
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virt/kvm/arm/vgic.c | 48
