On Fri, 2014-05-02 at 13:10 +0200, Alexander Graf wrote:
> On 05/02/2014 12:12 PM, David Laight wrote:
> > You also probably want the page mapped uncached - no point polluting the
> > data
> > cache.
We can't do that without creating an architecturally illegal alias
between cacheable and non-cach
On 05/02/2014 12:12 PM, David Laight wrote:
From: Alexander Graf
...
+ page = pfn_to_page(pfn);
+ eaddr = (unsigned long)kmap_atomic(page);
+ eaddr |= addr & ~PAGE_MASK;
+ *instr = *(u32 *)eaddr;
+ kunmap_atomic((u32 *)eaddr);
I think I'd rather write this as
From: Alexander Graf
...
> > + page = pfn_to_page(pfn);
> > + eaddr = (unsigned long)kmap_atomic(page);
> > + eaddr |= addr & ~PAGE_MASK;
> > + *instr = *(u32 *)eaddr;
> > + kunmap_atomic((u32 *)eaddr);
>
> I think I'd rather write this as
>
>*instr = *(u32 *)(eaddr | (addr & ~PAGE)
On 05/01/2014 02:45 AM, Mihai Caraman wrote:
On bookehv vcpu's last instruction is read using load external pid
(lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need
to be handled by KVM. These exceptions originate from host state
(MSR[GS] = 0) which implies additional checks in DO
On bookehv vcpu's last instruction is read using load external pid
(lwepx) instruction. lwepx exceptions (DTLB_MISS, DSI and LRAT) need
to be handled by KVM. These exceptions originate from host state
(MSR[GS] = 0) which implies additional checks in DO_KVM macro (beside
the current MSR[GS] = 1) by