On Thu, Mar 06, 2014 at 06:33:58PM +0100, Jan Kiszka wrote:
We cannot rely on the hardware-provided preemption timer support because
we are holding L2 in HLT outside non-root mode.
Furthermore, emulating
the preemption will resolve tick rate errata on older Intel CPUs.
Can you describe this
Il 07/03/2014 18:20, Marcelo Tosatti ha scritto:
On Thu, Mar 06, 2014 at 06:33:58PM +0100, Jan Kiszka wrote:
We cannot rely on the hardware-provided preemption timer support because
we are holding L2 in HLT outside non-root mode.
Furthermore, emulating
the preemption will resolve tick rate
We cannot rely on the hardware-provided preemption timer support because
we are holding L2 in HLT outside non-root mode. Furthermore, emulating
the preemption will resolve tick rate errata on older Intel CPUs.
The emulation is based on hrtimer which is started on L2 entry, stopped
on L2 exit and