[PATCH v4 0/4] irqchip: GICv2/v3: Add support for irq_vcpu_affinity

2015-08-26 Thread Marc Zyngier
The GICv2 and GICv3 architectures allow an active physical interrupt to be forwarded to a guest, and the guest to indirectly perform the deactivation of the interrupt by performing an EOI on the virtual interrupt (see for example the GICv2 spec, 3.2.1). This allows some substantial performance imp

Re: [PATCH v4 0/4] irqchip: GICv2/v3: Add support for irq_vcpu_affinity

2015-08-27 Thread Eric Auger
Hi Marc, I tested the series on Calxeda Midway with VFIO use case. Also reviewed it again without finding anything new. Tested-by: Eric Auger Reviewed-by: Eric Auger Best Regards Eric On 08/26/2015 06:00 PM, Marc Zyngier wrote: > The GICv2 and GICv3 architectures allow an active physical in

Re: [PATCH v4 0/4] irqchip: GICv2/v3: Add support for irq_vcpu_affinity

2015-08-27 Thread Marc Zyngier
Hi Eric, On 27/08/15 14:03, Eric Auger wrote: > Hi Marc, > > I tested the series on Calxeda Midway with VFIO use case. Also reviewed > it again without finding anything new. > > Tested-by: Eric Auger > Reviewed-by: Eric Auger Thanks a lot Eric, much appreciated! M. -- Jazz is not de