On 19/03/2015 23:51, James Sullivan wrote:
I played around with native_compose_msi_msg and discovered the following:
* dm=0, rh=0 = Physical Destination Mode
* dm=0, rh=1 = Failed delivery
* dm=1, rh=0 = Logical Destination Mode, No Redirection
* dm=1, rh=1 = Logical Destination Mode,
2015-04-21 14:18+0200, Paolo Bonzini:
On 19/03/2015 23:51, James Sullivan wrote:
I played around with native_compose_msi_msg and discovered the following:
* dm=0, rh=0 = Physical Destination Mode
* dm=0, rh=1 = Failed delivery
* dm=1, rh=0 = Logical Destination Mode, No Redirection
*
2015-04-02 16:08-0600, James Sullivan:
On 03/24/2015 08:03 AM, Radim Krčmář wrote:
2015-03-23 16:46-0600, James Sullivan:
On 03/23/2015 03:13 PM, Radim Krčmář wrote:
I tested it and Linux got a lot of unexpected NMIs, so the emulation in
your latest patch looks correct.
Good to hear,
On 03/24/2015 08:03 AM, Radim Krčmář wrote:
2015-03-23 16:46-0600, James Sullivan:
On 03/23/2015 03:13 PM, Radim Krčmář wrote:
I meant if the delivery mode from data register isn't ignored with RH=1,
and the message delivered as if lowest-priority was set there.
(Decided by having something
On 03/24/2015 08:03 AM, Radim Krčmář wrote:
2015-03-23 16:46-0600, James Sullivan:
On 03/23/2015 03:13 PM, Radim Krčmář wrote:
I meant if the delivery mode from data register isn't ignored with RH=1,
and the message delivered as if lowest-priority was set there.
(Decided by having something
2015-03-23 16:46-0600, James Sullivan:
On 03/23/2015 03:13 PM, Radim Krčmář wrote:
I meant if the delivery mode from data register isn't ignored with RH=1,
and the message delivered as if lowest-priority was set there.
(Decided by having something else than fixed or lowest-priority there.)
2015-03-20 11:50-0600, James Sullivan:
On 03/20/2015 09:22 AM, James Sullivan wrote:
On 03/20/2015 09:15 AM, Radim Krčmář wrote:
2015-03-19 16:51-0600, James Sullivan:
I played around with native_compose_msi_msg and discovered the following:
* dm=0, rh=0 = Physical Destination Mode
*
On 03/23/2015 03:13 PM, Radim Krčmář wrote:
2015-03-20 11:50-0600, James Sullivan:
On 03/20/2015 09:22 AM, James Sullivan wrote:
On 03/20/2015 09:15 AM, Radim Krčmář wrote:
2015-03-19 16:51-0600, James Sullivan:
I played around with native_compose_msi_msg and discovered the following:
*
2015-03-19 16:51-0600, James Sullivan:
I played around with native_compose_msi_msg and discovered the following:
* dm=0, rh=0 = Physical Destination Mode
* dm=0, rh=1 = Failed delivery
* dm=1, rh=0 = Logical Destination Mode, No Redirection
* dm=1, rh=1 = Logical Destination Mode,
On 03/20/2015 09:15 AM, Radim Krčmář wrote:
2015-03-19 16:51-0600, James Sullivan:
I played around with native_compose_msi_msg and discovered the following:
* dm=0, rh=0 = Physical Destination Mode
* dm=0, rh=1 = Failed delivery
* dm=1, rh=0 = Logical Destination Mode, No Redirection
*
On 03/20/2015 09:22 AM, James Sullivan wrote:
On 03/20/2015 09:15 AM, Radim Krčmář wrote:
2015-03-19 16:51-0600, James Sullivan:
I played around with native_compose_msi_msg and discovered the following:
* dm=0, rh=0 = Physical Destination Mode
* dm=0, rh=1 = Failed delivery
* dm=1, rh=0 =
On 03/19/2015 07:00 AM, Radim Krčmář wrote:
2015-03-18 22:09-0300, Marcelo Tosatti:
See native_compose_msi_msg:
((apic-irq_dest_mode == 0) ?
MSI_ADDR_DEST_MODE_PHYSICAL :
MSI_ADDR_DEST_MODE_LOGICAL) |
2015-03-18 22:09-0300, Marcelo Tosatti:
See native_compose_msi_msg:
((apic-irq_dest_mode == 0) ?
MSI_ADDR_DEST_MODE_PHYSICAL :
MSI_ADDR_DEST_MODE_LOGICAL) |
((apic-irq_delivery_mode != dest_LowestPrio) ?
On Fri, Mar 13, 2015 at 09:14:35AM -0600, James Sullivan wrote:
This patch adds a check for RH=1 in kvm_set_msi_irq. Currently the
DM bit is the only thing used to decide irq-dest_mode (logical when DM
set, physical when unset). Documentation indicates that the DM bit will
be 'ignored' when
On Wed, Mar 18, 2015 at 06:59:22PM -0600, James Sullivan wrote:
The documentation states the following:
* When RH is 0, the interrupt is directed to the processor listed in the
Destination ID field.
* If RH is 0, then the DM bit is ignored and the message is sent ahead
On Wed, Mar 18, 2015 at 06:59:22PM -0600, James Sullivan wrote:
The documentation states the following:
* When RH is 0, the interrupt is directed to the processor listed in the
Destination ID field.
* If RH is 0, then the DM bit is ignored and the message is sent ahead
The documentation states the following:
* When RH is 0, the interrupt is directed to the processor listed in the
Destination ID field.
* If RH is 0, then the DM bit is ignored and the message is sent ahead
independent of whether the physical or logical destination mode is used.
N.B. This patch has been re-submitted in a larger patch, see
1426555822-3280-1-git-send-email-sullivan.jame...@gmail.com
(The new patch relies on changes made in this patch, and as such
it makes more sense to bundle them)
On 03/13/2015 09:14 AM, James Sullivan wrote:
This patch adds a check
This patch adds a check for RH=1 in kvm_set_msi_irq. Currently the
DM bit is the only thing used to decide irq-dest_mode (logical when DM
set, physical when unset). Documentation indicates that the DM bit will
be 'ignored' when the RH bit is unset, and physical destination mode is
used in this
2015-03-13 09:14-0600, James Sullivan:
---
Changes since v2:
* Added one time warning message when RH=1
* Documented conflict between RH=1 and delivery mode
* Tidied code to check RH=1/DM=1 (remove bool phys, use if/else)
Changes since v3:
* Fixed logical error in RH=1/DM=1
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