Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-07 Thread Peter Zijlstra
On Mon, Jul 07, 2014 at 01:57:16PM +, Liang, Kan wrote: > > > This doesn't work, e.g. hardware debuggers can take over at any time. > > > > Tough cookies. Hardware debuggers get to deal with whatever crap they > > cause. > > If so, I think I may discard this patch (2/3). I will resubmit the >

Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-07 Thread Peter Zijlstra
On Mon, Jul 07, 2014 at 05:46:35PM +0200, Peter Zijlstra wrote: > On Mon, Jul 07, 2014 at 01:57:16PM +, Liang, Kan wrote: > > > > This doesn't work, e.g. hardware debuggers can take over at any time. > > > > > > Tough cookies. Hardware debuggers get to deal with whatever crap they > > > cause.

RE: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-07 Thread Liang, Kan
> > On Thu, Jul 03, 2014 at 05:52:37PM +0200, Andi Kleen wrote: > > > If there's active LBR users out there, we should refuse to enable PT > > > and vice versa. > > > > This doesn't work, e.g. hardware debuggers can take over at any time. > > Tough cookies. Hardware debuggers get to deal with w

Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-03 Thread Peter Zijlstra
On Thu, Jul 03, 2014 at 05:52:37PM +0200, Andi Kleen wrote: > > If there's active LBR users out there, we should refuse to enable PT and > > vice versa. > > This doesn't work, e.g. hardware debuggers can take over at any time. Tough cookies. Hardware debuggers get to deal with whatever crap they

Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-03 Thread Andi Kleen
> If there's active LBR users out there, we should refuse to enable PT and > vice versa. This doesn't work, e.g. hardware debuggers can take over at any time. -Andi -- a...@linux.intel.com -- Speaking for myself only. -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body

Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-03 Thread Peter Zijlstra
On Wed, Jul 02, 2014 at 11:14:14AM -0700, kan.li...@intel.com wrote: > From: Kan Liang > > If RTIT_CTL.TraceEn=1, any attempt to read or write the LBR or LER MSRs, > including LBR_TOS, will result in a #GP. > Since Intel PT can be enabled/disabled at runtime, LBR MSRs have to be > protected by

Re: [PATCH V2 2/3] perf protect LBR when Intel PT is enabled.

2014-07-02 Thread Andi Kleen
On Wed, Jul 02, 2014 at 11:14:14AM -0700, kan.li...@intel.com wrote: > From: Kan Liang > > If RTIT_CTL.TraceEn=1, any attempt to read or write the LBR or LER MSRs, > including LBR_TOS, will result in a #GP. > Since Intel PT can be enabled/disabled at runtime, LBR MSRs have to be > protected by