RE: [PATCH v3] KVM: x86: INIT and reset sequences are different

2015-10-09 Thread Zhang, Yang Z
Paolo Bonzini wrote on 2015-10-01: Hi Paolo Sorry for the late reply. I am just back from vacation. > > > On 13/04/2015 13:34, Nadav Amit wrote: >> x86 architecture defines differences between the reset and INIT >> sequences. INIT does not initialize the FPU (including MMX, XMM, YMM, >>

Re: [PATCH v3] KVM: x86: INIT and reset sequences are different

2015-10-01 Thread Paolo Bonzini
On 13/04/2015 13:34, Nadav Amit wrote: > x86 architecture defines differences between the reset and INIT sequences. > INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU, > MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP. > > References (from

Re: [PATCH v3] KVM: x86: INIT and reset sequences are different

2015-04-13 Thread Paolo Bonzini
On 13/04/2015 13:34, Nadav Amit wrote: x86 architecture defines differences between the reset and INIT sequences. INIT does not initialize the FPU (including MMX, XMM, YMM, etc.), TSC, PMU, MSRs (in general), MTRRs machine-check, APIC ID, APIC arbitration ID and BSP. References (from Intel