On 11.04.2010, at 23:07, Andre Przywara wrote:
> On SVM we set the instruction length of skipped instructions
> to hard-coded, well known values, which could be wrong when (bogus,
> but valid) prefixes (REX, segment override) are used.
> Newer AMD processors (Fam10h 45nm and better, aka. PhenomII
On 11.04.2010, at 23:40, Alexander Graf wrote:
>
> /* Either adds offset n to the instruction counter or takes the next
>instruction pointer from the vmcb if the CPU supports it */
>
> static u64 svm_next_rip(struct kvm_vcpu *vcpu, int add)
> {
>if (svm->vmcb->control.next_rip != 0)
Alexander Graf wrote:
On 11.04.2010, at 23:40, Alexander Graf wrote:
/* Either adds offset n to the instruction counter or takes the next
instruction pointer from the vmcb if the CPU supports it */
static u64 svm_next_rip(struct kvm_vcpu *vcpu, int add)
{
if (svm->vmcb->control.next_
On 11.04.2010, at 23:51, Andre Przywara wrote:
> Alexander Graf wrote:
>> On 11.04.2010, at 23:40, Alexander Graf wrote:
>>> /* Either adds offset n to the instruction counter or takes the next
>>> instruction pointer from the vmcb if the CPU supports it */
>>>
>>> static u64 svm_next_rip(stru
Alexander Graf wrote:
On 11.04.2010, at 23:51, Andre Przywara wrote:
Alexander Graf wrote:
On 11.04.2010, at 23:40, Alexander Graf wrote:
/* Either adds offset n to the instruction counter or takes the next
instruction pointer from the vmcb if the CPU supports it */
static u64 svm_next_rip
On 12.04.2010, at 00:13, Andre Przywara wrote:
> Alexander Graf wrote:
>> On 11.04.2010, at 23:51, Andre Przywara wrote:
>>> Alexander Graf wrote:
On 11.04.2010, at 23:40, Alexander Graf wrote:
> /* Either adds offset n to the instruction counter or takes the next
> instruction poin
On 04/12/2010 12:07 AM, Andre Przywara wrote:
On SVM we set the instruction length of skipped instructions
to hard-coded, well known values, which could be wrong when (bogus,
but valid) prefixes (REX, segment override) are used.
Newer AMD processors (Fam10h 45nm and better, aka. PhenomII or
Athlo
On 12.04.2010, at 12:20, Avi Kivity wrote:
> On 04/12/2010 12:07 AM, Andre Przywara wrote:
>> On SVM we set the instruction length of skipped instructions
>> to hard-coded, well known values, which could be wrong when (bogus,
>> but valid) prefixes (REX, segment override) are used.
>> Newer AMD p
On 04/12/2010 01:29 PM, Alexander Graf wrote:
On 12.04.2010, at 12:20, Avi Kivity wrote:
On 04/12/2010 12:07 AM, Andre Przywara wrote:
On SVM we set the instruction length of skipped instructions
to hard-coded, well known values, which could be wrong when (bogus,
but valid) prefixes
On Sun, Apr 11, 2010 at 11:07:28PM +0200, Andre Przywara wrote:
> On SVM we set the instruction length of skipped instructions
> to hard-coded, well known values, which could be wrong when (bogus,
> but valid) prefixes (REX, segment override) are used.
> Newer AMD processors (Fam10h 45nm and better
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