On Tue, Apr 09, 2013 at 01:22:15AM +, Yoder Stuart-B08248 wrote:
What happens if a normal unmap call is done on the MSI iova? Do we
need a separate unmap?
I was thinking a normal unmap on an MSI windows would be an error...but
I'm not set on that. I put the msi unmap there to make
: vfio API changes needed for powerpc (v3)
On Tue, Apr 09, 2013 at 01:22:15AM +, Yoder Stuart-B08248 wrote:
What happens if a normal unmap call is done on the MSI iova? Do we
need a separate unmap?
I was thinking a normal unmap on an MSI windows would be an error...but
I'm
On 04/11/2013 07:56:59 AM, Joerg Roedel wrote:
On Tue, Apr 09, 2013 at 01:22:15AM +, Yoder Stuart-B08248 wrote:
What happens if a normal unmap call is done on the MSI iova? Do
we
need a separate unmap?
I was thinking a normal unmap on an MSI windows would be an
error...but
I'm
So now the sequence would be something like:
1)VFIO_GROUP_SET_CONTAINER // add groups to the container
2)VFIO_SET_IOMMU(VFIO_FSL_PAMU)// set iommu model
3)count = VFIO_IOMMU_GET_MSI_BANK_COUNT// returns max # of MSI banks
4)
Subject: Re: RFC: vfio API changes needed for powerpc (v3)
On 04/04/2013 05:10:27 PM, Yoder Stuart-B08248 wrote:
/*
* VFIO_IOMMU_PAMU_UNMAP_MSI_BANK
*
* Unmaps the MSI bank at the specified iova.
* Caller provides struct vfio_pamu_msi_bank_unmap with all fields
set.
* Operates
On 04/04/2013 05:10:27 PM, Yoder Stuart-B08248 wrote:
/*
* VFIO_IOMMU_PAMU_UNMAP_MSI_BANK
*
* Unmaps the MSI bank at the specified iova.
* Caller provides struct vfio_pamu_msi_bank_unmap with all fields
set.
* Operates on VFIO file descriptor (/dev/vfio/vfio).
* Return: 0 on success,
On Thu, 2013-04-04 at 17:32 +, Yoder Stuart-B08248 wrote:
Based on the email thread over the last couple of days, I have
below an more concrete proposal (v2) for new ioctls supporting vfio-pci
on SoCs with the Freescale PAMU.
Example usage is as described by Scott:
count =
/*
* VFIO_PAMU_MAP_MSI_BANK
*
* Maps the MSI bank at the specified index and iova. User space must
* call this ioctl once for each MSI bank (count of banks is returned by
* VFIO_IOMMU_GET_MSI_BANK_COUNT).
* Caller provides struct vfio_pamu_msi_bank_map with all fields set.
On 04/04/2013 04:38:44 PM, Yoder Stuart-B08248 wrote:
/*
* VFIO_PAMU_MAP_MSI_BANK
*
* Maps the MSI bank at the specified index and iova. User space
must
* call this ioctl once for each MSI bank (count of banks is
returned by
* VFIO_IOMMU_GET_MSI_BANK_COUNT).
* Caller
Subject: Re: RFC: vfio API changes needed for powerpc (v2)
On 04/04/2013 04:38:44 PM, Yoder Stuart-B08248 wrote:
/*
* VFIO_PAMU_MAP_MSI_BANK
*
* Maps the MSI bank at the specified index and iova. User space
must
* call this ioctl once for each MSI bank (count
Type1 is arbitrary. It might as well be named brown and this one
can be
blue.
The difference is that type1 seems to refer to hardware that can do
arbitrary 4K page mappings, possibly constrained by an aperture but
nothing else. More than one IOMMU can reasonably fit that. The odds
On Tue, Apr 2, 2013 at 5:50 PM, Scott Wood scottw...@freescale.com wrote:
On 04/02/2013 04:38:45 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 16:08 -0500, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood scottw...@freescale.com
wrote:
C. Explicit mapping using
On 04/03/2013 01:32:26 PM, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 5:50 PM, Scott Wood scottw...@freescale.com
wrote:
On 04/02/2013 04:38:45 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 16:08 -0500, Stuart Yoder wrote:
VFIO_IOMMU_MAP_MSI(iova, size)
Not sure how you mean
Would is be possible for userspace to simply leave room for MSI bank
mapping (how much room could be determined by something like
VFIO_IOMMU_GET_MSI_BANK_COUNT) then document the API that userspace can
DMA_MAP starting at the 0x0 address of the aperture, growing up, and
VFIO will map banks on
On 04/03/2013 02:09:45 PM, Stuart Yoder wrote:
Would is be possible for userspace to simply leave room for MSI bank
mapping (how much room could be determined by something like
VFIO_IOMMU_GET_MSI_BANK_COUNT) then document the API that userspace
can
DMA_MAP starting at the 0x0 address of
On Wed, 2013-04-03 at 14:09 -0500, Stuart Yoder wrote:
Would is be possible for userspace to simply leave room for MSI bank
mapping (how much room could be determined by something like
VFIO_IOMMU_GET_MSI_BANK_COUNT) then document the API that userspace can
DMA_MAP starting at the 0x0
On 04/03/2013 02:09:45 PM, Stuart Yoder wrote:
Would is be possible for userspace to simply leave room for MSI bank
mapping (how much room could be determined by something like
VFIO_IOMMU_GET_MSI_BANK_COUNT) then document the API that userspace
can
DMA_MAP starting at the 0x0 address of
On Wed, Apr 3, 2013 at 2:18 PM, Scott Wood scottw...@freescale.com wrote:
On 04/03/2013 02:09:45 PM, Stuart Yoder wrote:
Would is be possible for userspace to simply leave room for MSI bank
mapping (how much room could be determined by something like
VFIO_IOMMU_GET_MSI_BANK_COUNT) then
On 04/03/2013 02:43:06 PM, Stuart Yoder wrote:
On Wed, Apr 3, 2013 at 2:18 PM, Scott Wood scottw...@freescale.com
wrote:
On 04/03/2013 02:09:45 PM, Stuart Yoder wrote:
Would is be possible for userspace to simply leave room for MSI
bank
mapping (how much room could be determined by
On 04/02/2013 10:37:20 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 17:50 -0500, Scott Wood wrote:
On 04/02/2013 04:38:45 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 16:08 -0500, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood
scottw...@freescale.com wrote:
On 04/02/2013 10:12:31 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 17:44 -0500, Scott Wood wrote:
On 04/02/2013 04:32:04 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 15:57 -0500, Scott Wood wrote:
On 04/02/2013 03:32:17 PM, Alex Williamson wrote:
On x86 the interrupt remapper
On 04/02/2013 12:32:00 PM, Yoder Stuart-B08248 wrote:
Alex,
We are in the process of implementing vfio-pci support for the
Freescale
IOMMU (PAMU). It is an aperture/window-based IOMMU and is quite
different
than x86, and will involve creating a 'type 2' vfio implementation.
For each
Hi Stuart,
On Tue, 2013-04-02 at 17:32 +, Yoder Stuart-B08248 wrote:
Alex,
We are in the process of implementing vfio-pci support for the Freescale
IOMMU (PAMU). It is an aperture/window-based IOMMU and is quite different
than x86, and will involve creating a 'type 2' vfio
On Tue, Apr 2, 2013 at 2:39 PM, Scott Wood scottw...@freescale.com wrote:
On 04/02/2013 12:32:00 PM, Yoder Stuart-B08248 wrote:
Alex,
We are in the process of implementing vfio-pci support for the Freescale
IOMMU (PAMU). It is an aperture/window-based IOMMU and is quite different
than x86,
On 04/02/2013 03:38:42 PM, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 2:39 PM, Scott Wood scottw...@freescale.com
wrote:
On 04/02/2013 12:32:00 PM, Yoder Stuart-B08248 wrote:
Alex,
We are in the process of implementing vfio-pci support for the
Freescale
IOMMU (PAMU). It is an
On Tue, Apr 2, 2013 at 3:32 PM, Alex Williamson
alex.william...@redhat.com wrote:
2. MSI window mappings
The more problematic question is how to deal with MSIs. We need to
create mappings for up to 3 MSI banks that a device may need to target
to generate interrupts. The Linux MSI
On 04/02/2013 03:32:17 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 17:32 +, Yoder Stuart-B08248 wrote:
2. MSI window mappings
The more problematic question is how to deal with MSIs. We need
to
create mappings for up to 3 MSI banks that a device may need to
target
to
On Tue, Apr 2, 2013 at 3:47 PM, Scott Wood scottw...@freescale.com wrote:
On 04/02/2013 03:38:42 PM, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 2:39 PM, Scott Wood scottw...@freescale.com
wrote:
On 04/02/2013 12:32:00 PM, Yoder Stuart-B08248 wrote:
Alex,
We are in the process of
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood scottw...@freescale.com wrote:
This could also be done as another type2 ioctl extension.
Again, what is type2, specifically? If someone else is adding their own
IOMMU that is kind of, sort of like PAMU, how would they know if it's close
enough?
On Tue, 2013-04-02 at 15:54 -0500, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:32 PM, Alex Williamson
alex.william...@redhat.com wrote:
2. MSI window mappings
The more problematic question is how to deal with MSIs. We need to
create mappings for up to 3 MSI banks that a device
On Tue, 2013-04-02 at 15:57 -0500, Scott Wood wrote:
On 04/02/2013 03:32:17 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 17:32 +, Yoder Stuart-B08248 wrote:
2. MSI window mappings
The more problematic question is how to deal with MSIs. We need
to
create mappings
On Tue, 2013-04-02 at 16:08 -0500, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood scottw...@freescale.com wrote:
C. Explicit mapping using normal DMA map. The last idea is that
we would introduce a new ioctl to give user-space an fd to
the MSI bank,
On 04/02/2013 04:08:27 PM, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood scottw...@freescale.com
wrote:
This could also be done as another type2 ioctl extension.
Again, what is type2, specifically? If someone else is adding
their own
IOMMU that is kind of, sort of like
On 04/02/2013 04:16:11 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 15:54 -0500, Stuart Yoder wrote:
The number of windows is always power of 2 (and max is 256). And
to reduce
PAMU cache pressure you want to use the fewest number of windows
you can.So, I don't see practically how
On 04/02/2013 04:32:04 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 15:57 -0500, Scott Wood wrote:
On 04/02/2013 03:32:17 PM, Alex Williamson wrote:
On x86 the interrupt remapper handles this transparently when MSI
is enabled and userspace never gets direct access to the device
MSI
On 04/02/2013 04:38:45 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 16:08 -0500, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood
scottw...@freescale.com wrote:
C. Explicit mapping using normal DMA map. The last idea
is that
we would introduce a new ioctl
On Tue, 2013-04-02 at 17:13 -0500, Scott Wood wrote:
On 04/02/2013 04:16:11 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 15:54 -0500, Stuart Yoder wrote:
The number of windows is always power of 2 (and max is 256). And
to reduce
PAMU cache pressure you want to use the fewest
On Tue, 2013-04-02 at 17:44 -0500, Scott Wood wrote:
On 04/02/2013 04:32:04 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 15:57 -0500, Scott Wood wrote:
On 04/02/2013 03:32:17 PM, Alex Williamson wrote:
On x86 the interrupt remapper handles this transparently when MSI
is enabled
On Tue, 2013-04-02 at 17:50 -0500, Scott Wood wrote:
On 04/02/2013 04:38:45 PM, Alex Williamson wrote:
On Tue, 2013-04-02 at 16:08 -0500, Stuart Yoder wrote:
On Tue, Apr 2, 2013 at 3:57 PM, Scott Wood
scottw...@freescale.com wrote:
C. Explicit mapping using normal DMA map. The
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