Re: [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register

2016-01-07 Thread Marc Zyngier
On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which > is mapped to PMEVCNTRn. > > The access handler translates all aarch32 register offsets to aarch64 > ones and uses vcpu_sys_reg() to

[PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register

2015-12-22 Thread Shannon Zhao
From: Shannon Zhao These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which is mapped to PMEVCNTRn. The access handler translates all aarch32 register offsets to aarch64 ones and uses vcpu_sys_reg() to access their values to avoid taking care of big