From: Marcelo Tosatti <[EMAIL PROTECTED]>
Add support for the cr3 cache feature on Intel VMX CPU's. This avoids
vmexits on context switch if the cr3 value is cached in one of the
entries (currently 4 are present).
This is especially important for Xenner, where each guest syscall
involves a cr3 sw
> * We only need to hook operations that are MMU writes. We hook these so
> that
> * we can use lazy MMU mode to batch these operations. We could probably
> * improve the performance of the host code if we used some of the
> information
> @@ -219,6 +359,9 @@ static void paravirt_ops_setup(void)
> p
Zhao Forrest wrote:
>> * We only need to hook operations that are MMU writes. We hook these so
>> that
>> * we can use lazy MMU mode to batch these operations. We could probably
>> * improve the performance of the host code if we used some of the
>> information
>> @@ -219,6 +359,9 @@ static void pa
