>> >Why so many vm switches? First up, a typical I/O system maxes at
>> >about 1Gb/s, right? That would be a gigabit NIC, or striped RAID,
or
>> >something like that. This suggests an average of only about 300
>> >bytes/transfer, to get >150k individual transfers per second? I
>> >thought block
> >Why so many vm switches? First up, a typical I/O system maxes at
> >about 1Gb/s, right? That would be a gigabit NIC, or striped RAID, or
> >something like that. This suggests an average of only about 300
> >bytes/transfer, to get >150k individual transfers per second? I
> >thought block I/O
> Great news.
> Expecting to see the patch soon.
there's still a wart or two on the host side but it's getting ready
quickly.. give me a few days ;)
> Do you base your code over the kernel's paravirt_ops and Ingo's KVM
> hypercall?
I'm using Ingo's KVM hypercall yes; I don't need paravirt_ops
>
>> Second, we currently use Qemu's device emulation were the ne2k device
>> does dozens of IO accesses per packet! The rtl8139 is better and does
>> about 3 IO(MMIO) per packet. The current maximum throughput using the
>
>and this is where paravirtualized device drivers can help, like Ingo's
>net
> Second, we currently use Qemu's device emulation were the ne2k device
> does dozens of IO accesses per packet! The rtl8139 is better and does
> about 3 IO(MMIO) per packet. The current maximum throughput using the
and this is where paravirtualized device drivers can help, like Ingo's
network dr
>> > Intel is indeed slower than AMD with this one.
>> > I didn't measure such roundtrip specifically. We usually see that
the
>> > VMETNRY/VMEXIT cycle limits our performance (for io/mmio,..)
>> > On Intel core duo we cannot get more than 150k-200k VMEXITS per
second
>> > for regular guest doin
> > Intel is indeed slower than AMD with this one.
> > I didn't measure such roundtrip specifically. We usually see that the
> > VMETNRY/VMEXIT cycle limits our performance (for io/mmio,..)
> > On Intel core duo we cannot get more than 150k-200k VMEXITS per second
> > for regular guest doing extens
>>> On Mon, Feb 12, 2007 at 9:23 AM, in message
<[EMAIL PROTECTED]>,
"Dor Laor" <[EMAIL PROTECTED]> wrote:
>
> Thanks man, my mistake, I meant microsecond when wrote the 'ms'.
FYI: The SI symbol for micro is the greek lower-case letter Mu. However, since
that would be a pain in ASCII, the le
>On Mon, Feb 12, 2007 at 05:21:26AM -0800, Dor Laor wrote:
>> >>
>> >> >hi,
>> >> >Can someone briefly explain what the cr3-cache feature on
intel
>> VT
>> >> >processors is and how it is used to improve performance in
>> >> >paravirtualization.
>> >>
>> >> In short, this is a unique Intel VT f
On Mon, Feb 12, 2007 at 05:21:26AM -0800, Dor Laor wrote:
> >>
> >> >hi,
> >> >Can someone briefly explain what the cr3-cache feature on intel
> VT
> >> >processors is and how it is used to improve performance in
> >> >paravirtualization.
> >>
> >> In short, this is a unique Intel VT feature th
>>
>> >hi,
>> >Can someone briefly explain what the cr3-cache feature on intel
VT
>> >processors is and how it is used to improve performance in
>> >paravirtualization.
>>
>> In short, this is a unique Intel VT feature that supposed to save
vmexit
>> on cr3 switch. The vmexit operation is quite
On Sat, Feb 10, 2007 at 02:22:25PM -0800, Dor Laor wrote:
>
> >hi,
> >Can someone briefly explain what the cr3-cache feature on intel VT
> >processors is and how it is used to improve performance in
> >paravirtualization.
>
> In short, this is a unique Intel VT feature that supposed to save v
Thanks Dor.
Omar
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>hi,
>Can someone briefly explain what the cr3-cache feature on intel VT
>processors is and how it is used to improve performance in
>paravirtualization.
In short, this is a unique Intel VT feature that supposed to save vmexit
on cr3 switch. The vmexit operation is quite expensive at the mome
hi,
Can someone briefly explain what the cr3-cache feature on intel VT
processors is and how it is used to improve performance in paravirtualization.
Thanks
Omar
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