On Tue, Sep 13, 2011 at 04:49:55PM -0400, Eric B Munson wrote:
> On Fri, 09 Sep 2011, Marcelo Tosatti wrote:
>
> > On Thu, Sep 01, 2011 at 02:27:49PM -0600, emun...@mgebm.net wrote:
> > > On Thu, 01 Sep 2011 14:24:12 -0500, Anthony Liguori wrote:
> > > >On 08/30/2011 07:26 AM, Marcelo Tosatti wrot
On 09/05/2011 05:28 PM, Alexander Graf wrote:
>> +/*
>> + * SPRG4-7 are user-readable, so we can't keep these
>> + * consistent between the magic page and the real
>> + * registers. We provide space in case the guest
>> + * can deal with this.
>> + *
>> + * This also ap
On 09/08/2011 10:39 AM, Alexander Graf wrote:
>
> On 08.09.2011, at 17:34, Scott Wood wrote:
>
>> On Wed, Sep 07, 2011 at 12:41:35PM +0200, Alexander Graf wrote:
>>> Yes, but why can't we do this in the vcpu thread's context so we only
>>> ever have a single instance accessing the vcpu struct? I
> -Original Message-
> From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-ow...@vger.kernel.org] On
> Behalf Of Kun
> Wang
> Sent: Tuesday, September 13, 2011 5:43 AM
> To: Yoder Stuart-B08248; ag...@suse.de; ji...@pobox.com;
> kvm-ppc@vger.kernel.org
> Subject: synergy between IBM A2
On 09/05/2011 05:30 PM, Alexander Graf wrote:
>
> On 27.08.2011, at 01:31, Scott Wood wrote:
>
>> +#ifdef CONFIG_E500
>> +/*
>> + * Skip the overhead of HID0 accesses that KVM ignores --
>> + * just write MSR[WE].
>> + *
>> + * We don't need _TLF_NAPPING, because under KVM we
