On Fri, Mar 08, 2013 at 12:04:30PM +0100, Alexander Graf wrote:
>
>
> Am 08.03.2013 um 11:37 schrieb Paul Mackerras :
>
> > I have
> > used the first argument (cap->args[0]) to specify which interrupt
> > controller you want to connect the vcpu to.
>
> Ah, nice idea. So you basically make the v
On 08.03.2013, at 21:25, Scott Wood wrote:
> The existing check handles the case where we've migrated to a different
> core than we last ran on, but it doesn't handle the case where we're
> still on the same cpu we last ran on, but some other vcpu has run on
> this cpu in the meantime.
>
> Witho
The existing check handles the case where we've migrated to a different
core than we last ran on, but it doesn't handle the case where we're
still on the same cpu we last ran on, but some other vcpu has run on
this cpu in the meantime.
Without this, guest segfaults (and other misbehavior) have bee
On 14.02.2013, at 06:37, Scott Wood wrote:
> Scott Wood (3):
> kvm/ppc/e500: h2g_tlb1_rmap: esel 0 is valid
> kvm/ppc/e500: g2h_tlb1_map: clear old bit before setting new bit
> kvm/ppc/e500: eliminate tlb_refs
>
> arch/powerpc/kvm/e500.h | 24 ---
> arch/powerpc/kvm/e500_mmu
On 19.02.2013, at 05:13, Scott Wood wrote:
> The existing check handles the case where we've migrated to a different
> core than we last ran on, but it doesn't handle the case where we're
> still on the same cpu we last ran on, but some other vcpu has run on
> this cpu in the meantime.
>
> Signe
Am 08.03.2013 um 11:37 schrieb Paul Mackerras :
> On Thu, Mar 07, 2013 at 03:00:52PM +0100, Alexander Graf wrote:
>>
>> Could you please (in a quick and drafty way) try and see if setting the IRQ
>> arch (using enable_cap) after the vcpu got created would work for you?
>>
>> That enable_cap w
On Thu, Mar 07, 2013 at 03:00:52PM +0100, Alexander Graf wrote:
>
> Could you please (in a quick and drafty way) try and see if setting the IRQ
> arch (using enable_cap) after the vcpu got created would work for you?
>
> That enable_cap would then have to loop through all devices and notify irq
