On Wed, Nov 6, 2013 at 1:01 PM, Paul Mackerras wrote:
> On Tue, Nov 05, 2013 at 03:42:42PM +0800, Liu Ping Fan wrote:
>> After the primary vcpu changes vcore_state to VCORE_RUNNING, there is
>> very little chance to schedule to secondary vcpu. So if we change the
>
> Why do you say there is very l
On Wed, Nov 6, 2013 at 1:04 PM, Paul Mackerras wrote:
> On Tue, Nov 05, 2013 at 03:42:43PM +0800, Liu Ping Fan wrote:
>> Since kvmppc_hv_find_lock_hpte() is called from both virtmode and
>> realmode, so it can trigger the deadlock.
>
> Good catch, we should have preemption disabled while ever we h
On Tue, Nov 05, 2013 at 02:01:14PM +0100, Alexander Graf wrote:
>
> On 05.11.2013, at 13:28, Cedric Le Goater wrote:
>
> > +/*
> > + * Compare endian order of host and guest to determine whether we need
> > + * to byteswap or not
> > + */
> > static inline bool kvmppc_need_byteswap(struct kvm_vc
On Tue, Nov 05, 2013 at 07:06:17AM +0100, Alexander Graf wrote:
>
>
> Am 05.11.2013 um 04:53 schrieb Paul Mackerras :
>
> > On Mon, Nov 04, 2013 at 01:53:36PM +0100, Alexander Graf wrote:
> >>
> >> On 06.09.2013, at 05:55, Paul Mackerras wrote:
> >>
> >>> This allows us to select architecture
On Tue, Nov 05, 2013 at 03:42:43PM +0800, Liu Ping Fan wrote:
> Since kvmppc_hv_find_lock_hpte() is called from both virtmode and
> realmode, so it can trigger the deadlock.
Good catch, we should have preemption disabled while ever we have a
HPTE locked.
> @@ -474,8 +474,10 @@ static int kvmppc_m
On Tue, Nov 05, 2013 at 03:42:42PM +0800, Liu Ping Fan wrote:
> After the primary vcpu changes vcore_state to VCORE_RUNNING, there is
> very little chance to schedule to secondary vcpu. So if we change the
Why do you say there is very little chance to run the secondary vcpu?
> code sequence aroun
On Tue, Nov 05, 2013 at 03:42:44PM +0800, Liu Ping Fan wrote:
> Signed-off-by: Liu Ping Fan
> ---
> arch/powerpc/kvm/book3s_64_mmu_hv.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/arch/powerpc/kvm/book3s_64_mmu_hv.c
> b/arch/powerpc/kvm/book3s_64_mmu_hv.c
> index 28160ac..7682837 10
On Tue, 2013-11-05 at 19:05 +1100, Alexey Kardashevskiy wrote:
> Signed-off-by: Alexey Kardashevskiy
> ---
>
> Changes:
> v2:
> * it does not try to introduce a realmode search function.
> Instead, liobn-to-iommu-group lookup is done by VFIO KVM device
> in virtual mode and the result (iommu_grou
This patch adds an helper routine kvmppc_ld32() to load an
instruction form the guest. This routine will be modified in
the next patch to take into account the endian order of the
guest.
Signed-off-by: Cédric Le Goater
---
Changes in v4:
- got rid of useless helper routine kvmppc_ld_inst(). (A
MMIO emulation reads the last instruction executed by the guest
and then emulates. If the guest is running in Little Endian mode,
the instruction needs to be byte-swapped before being emulated.
This patch stores the last instruction in the endian order of the
host, primarily doing a byte-swap if
If the host is in little endian order, there is no need to byte-swap
in little endian guests.
Signed-off-by: Cédric Le Goater
---
arch/powerpc/include/asm/kvm_book3s.h |4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/include/asm/kvm_book3s.h
b/arch/powerpc/include/asm/kvm
They will be used to decide whether to byte-swap or not. When Little
Endian host kernels come, these routines will need to be changed
accordingly.
Signed-off-by: Cédric Le Goater
---
arch/powerpc/include/asm/kvm_book3s.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/powe
MIO emulation reads the last instruction executed by the guest
and then emulates. If the guest is running in Little Endian mode,
the instruction needs to be byte-swapped before being emulated.
The first patches add simple helper routines to load instructions from
the guest. It prepares ground for
Instruction and data storage accesses are done in opposite order
when the Split Little Endian mode is used. This patch modifies
the kvmppc_ld32() routine to reverse the byteswap when the guest
is in SLE mode.
Signed-off-by: Cédric Le Goater
---
arch/powerpc/include/asm/kvm_book3s.h | 14 ++
Architecture 2.07 defines a new MSR Split Little Endian (SLE) bit,
which changes the order used for data storage accesses.
If MSR[SLE] is 0, instruction and data storage accesses for the
thread are the same and use the value specified by MSR[LE].
If MSR[SLE] is 1, instruction and data storage acc
On 05.11.2013, at 13:28, Cedric Le Goater wrote:
> On 11/04/2013 12:44 PM, Alexander Graf wrote:
>>
>> On 10.10.2013, at 12:16, Paul Mackerras wrote:
>>
>>> On Wed, Oct 09, 2013 at 10:29:53AM +0200, Alexander Graf wrote:
Am 09.10.2013 um 07:59 schrieb Paul Mackerras :
>
On 11/04/2013 12:44 PM, Alexander Graf wrote:
>
> On 10.10.2013, at 12:16, Paul Mackerras wrote:
>
>> On Wed, Oct 09, 2013 at 10:29:53AM +0200, Alexander Graf wrote:
>>>
>>>
>>> Am 09.10.2013 um 07:59 schrieb Paul Mackerras :
>>>
On Wed, Oct 09, 2013 at 01:46:29AM +0200, Alexander Graf wrot
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v2:
* it does not try to introduce a realmode search function.
Instead, liobn-to-iommu-group lookup is done by VFIO KVM device
in virtual mode and the result (iommu_group pointer) is cached
in kvm_arch so the realmode handlers do not use VFIO KVM d
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