[PATCH 2/2] KVM : powerpc/booke: Allow debug interrupt injection to guest

This patch allow userspace to inject debug interrupt to guest. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com --- arch/powerpc/kvm/booke.c | 31 +-- arch/powerpc/kvm/e500mc.c | 10 +- 2 files changed, 38 insertions(+), 3 deletions(-) diff --git

[PATCH 1/2] KVM: powerpc/booke: allow debug interrupt at debug level

Debug interrupt can be either critical level or debug level. There are separate set of save/restore registers used for different level. Example: DSRR0/DSRR1 are used for debug level and CSRR0/CSRR1 are used for critical level debug interrupt. Using CPU_FTR_DEBUG_LVL_EXC to decide which interrupt

[PATCH] KVM: PPC: BOOK3S: HV: Update compute_tlbie_rb to handle 16MB base page

When calculating the lower bits of AVA field, use the shift count based on the base page size. Also add the missing segment size and remove stale comment. Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com --- arch/powerpc/include/asm/kvm_book3s_64.h | 6 --

Re: [PATCH 2/2] KVM : powerpc/booke: Allow debug interrupt injection to guest

On Fri, 2014-06-27 at 11:55 +0530, Bharat Bhushan wrote: This patch allow userspace to inject debug interrupt to guest. Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com Could you describe how userspace plans to make use of this, and go into more detail about the changes you're

[PATCH 2/5 v4] KVM: PPC: Book3e: Add TLBSEL/TSIZE defines for MAS0/1

Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E. Signed-off-by: Mihai Caraman mihai.cara...@freescale.com --- v4-v2: - no change arch/powerpc/include/asm/mmu-book3e.h | 7 ++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git

[PATCH 3/5 v4] KVM: PPC: Book3s: Remove kvmppc_read_inst() function

In the context of replacing kvmppc_ld() function calls with a version of kvmppc_get_last_inst() which allow to fail, Alex Graf suggested this: If we get EMULATE_AGAIN, we just have to make sure we go back into the guest. No need to inject an ISI into the guest - it'll do that all by itself. With

[PATCH 5/5 v4] KVM: PPC: Bookehv: Get vcpu's last instruction for emulation

On book3e, KVM uses load external pid (lwepx) dedicated instruction to read guest last instruction on the exit path. lwepx exceptions (DTLB_MISS, DSI and LRAT), generated by loading a guest address, needs to be handled by KVM. These exceptions are generated in a substituted guest translation

[PATCH 4/5 v4] KVM: PPC: Alow kvmppc_get_last_inst() to fail

On book3e, guest last instruction is read on the exit path using load external pid (lwepx) dedicated instruction. This load operation may fail due to TLB eviction and execute-but-not-read entries. This patch lay down the path for an alternative solution to read the guest last instruction, by

[PATCH 1/5 v4] KVM: PPC: e500mc: Revert add load inst fixup

The commit 1d628af7 add load inst fixup made an attempt to handle failures generated by reading the guest current instruction. The fixup code that was added works by chance hiding the real issue. Load external pid (lwepx) instruction, used by KVM to read guest instructions, is executed in a

[PATCH 0/5 v4] Read guest last instruction from kvmppc_get_last_inst()

Read guest last instruction from kvmppc_get_last_inst() allowing the function to fail in order to emulate again. On bookehv architecture search for the physical address and kmap it, instead of using Load External PID (lwepx) instruction. This fixes an infinite loop caused by lwepx's data TLB miss