Add ONE_REG support for AltiVec on Book3E.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 32
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 01eb635..019496d 100644
--- a
Rename BOOKE_IRQPRIO_SPE_UNAVAIL and BOOKE_IRQPRIO_SPE_FP_DATA names
to accommodate ALTIVEC. Replace BOOKE_INTERRUPT_SPE_UNAVAIL and
BOOKE_INTERRUPT_SPE_FP_DATA with the common version.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 12 ++--
arch/powerpc/kvm
KVM Book3E FPU support gracefully reuse host infrastructure so we do the
same for AltiVec. To keep AltiVec lazy call kvmppc_load_guest_altivec()
just when returning to guest instead of each sched in.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 74
guarantees to hard enable interrupts. To do so replace exception
function calls like timer_interrupt() with irq_happened flags. The
local_irq_enable() call takes care of replaying them and lets the interrupts
hard enabled.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |9 +++--
1
Refactor Book3E ONE_REG ioctl implementation to use kvmppc_get_one_reg/
kvmppc_set_one_reg delegation interface introduced by Book3S. This is
necessary for MMU SPRs which are platform specifics.
Get rid of useless case braces in the process.
Signed-off-by: Mihai Caraman
---
v3:
- Split ONE_REG
Enable basic support for Freescale e6500 core, adding MAV 2.0 support.
Validated on T4240QDS platfrom. Altivec, Multithreading and HW Tablewalk
are not addressed by this patchset.
Mihai Caraman (8):
KVM: PPC: Book3E: Refactor ONE_REG ioctl implementation
KVM: PPC: e500: Expose MMU registers
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman
Reviewed-by: Alexander Graf
---
v3:
- No change
arch/powerpc/kvm/e500mc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Emulate it now.
Signed-off-by: Mihai Caraman
---
v3:
- Initialize EPTCFG to 0 since E.PT is not supported now
Documentation/virtual/kvm/api.txt |1 +
arch/powerpc/include/asm
Add e6500 core to Kconfig description.
Signed-off-by: Mihai Caraman
---
v3:
- No change
arch/powerpc/kvm/Kconfig |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 63c67ec..4489520 100644
--- a/arch/powerpc
Vcpu's MMU default configuration and geometry update logic was buried in
a chunk of code. Move them to dedicated functions to add more clarity.
Signed-off-by: Mihai Caraman
---
v3:
- No change
v2:
- Add better patch description
arch/powerpc/kvm/e500_mmu.c |
Embedded.Page Table (E.PT) category is not supported yet in e6500 kernel.
Configure TLBnCFG to remove E.PT and E.HV.LRAT categories from VCPUs.
Signed-off-by: Mihai Caraman
---
v3:
- No change
arch/powerpc/kvm/e500_mmu.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff
MMU registers were exposed to user-space using sregs interface. Add them
to ONE_REG interface using kvmppc_get_one_reg/kvmppc_set_one_reg delegation
mechanism.
Signed-off-by: Mihai Caraman
---
v3:
- Fix case breaks
v2:
- Restrict set_one_reg operation for MMU registers to HW values
Add support for TLBnPS registers available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman
---
v3:
- Add vcpu_ftr enum
v2:
- Add vcpu generic function has_feature()
Documentation/virtual/kvm/api.txt |4
arch/powerpc/include/asm/kvm_host.h |1 +
arch
MMU registers were exposed to user-space using sregs interface. Add them
to ONE_REG interface and use kvmppc_get_one_reg/kvmppc_set_one_reg delegation
interface introduced by book3s.
Signed-off-by: Mihai Caraman
---
v2:
- Restrict set_one_reg operation for MMU registers to HW values
Enable basic support for Freescale e6500 core, adding MAV 2.0 support.
Validated on T4240QDS platfrom. Altivec, Multithreading and HW Tablewalk
are not addressed by this patchset.
Mihai Caraman (7):
KVM: PPC: e500: Expose MMU registers via ONE_REG
KVM: PPC: e500: Move vcpu's MMU configur
Add support for TLBnPS registers available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman
---
v2:
- Add vcpu generic function has_feature()
Documentation/virtual/kvm/api.txt |4
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/include/uapi/asm/kvm.h
Vcpu's MMU default configuration and geometry update logic was buried in
a chunk of code. Move them to dedicated functions to add more clarity.
Signed-off-by: Mihai Caraman
---
v2:
- Add better patch description. Hopefully :)
arch/powerpc/kvm/e500_mmu.c |
Add e6500 core to Kconfig description.
Signed-off-by: Mihai Caraman
---
v2:
- New patch
arch/powerpc/kvm/Kconfig |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 63c67ec..4489520 100644
--- a/arch/powerpc
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman
Reviewed-by: Alexander Graf
---
v2:
- No change
arch/powerpc/kvm/e500mc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index
Embedded.Page Table (E.PT) category in VMs requires indirect tlb entries
emulation which is not supported yet. Configure TLBnCFG to remove E.PT
and E.HV.LRAT categories from VCPUs.
Signed-off-by: Mihai Caraman
---
v2:
- Remove E.HV.LRAT from vcpus
arch/powerpc/kvm/e500_mmu.c |6 ++
1
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Support it now.
Signed-off-by: Mihai Caraman
---
v2:
- Use has_feature() function
Documentation/virtual/kvm/api.txt |1 +
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc
MMU registers were exposed to user-space using sregs interface. Add them to
ONE_REG interface.
Signed-off-by: Mihai Caraman
---
Documentation/virtual/kvm/api.txt | 13 +
arch/powerpc/include/uapi/asm/kvm.h | 14 ++
arch/powerpc/kvm/44x.c | 12 +
arch/powerpc/kvm
Move vcpu's MMU default configuration and geometry update into their own
functions.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_mmu.c | 59 +++
1 files changed, 37 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/kvm/e500_mm
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index 1f89d26..6c87299 100644
--- a/arch/powerpc/kvm
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Emulate EPTCFG register now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/e500.h |6 ++
arch/powerpc/kvm/e500_emulate.c
Enable Freescale e6500 core adding missing MAV 2.0 support. LRAT and Page
Table are not addresses by this commit.
Mihai Caraman (5):
KVM: PPC: e500: Move VCPU's MMUCFG register initialization earlier
KVM: PPC: e500: Emulate TLBnPS registers
KVM: PPC: e500: Remove E.PT category from
Embedded.Page Table (E.PT) category in VMs requires indirect tlb entries
emulation which is not supported yet. Configure TLBnCFG to remove E.PT
category from VCPUs.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_mmu.c | 10 ++
1 files changed, 6 insertions(+), 4 deletions
Emulate TLBnPS registers which are available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/e500.h |5 +
arch/powerpc/kvm/e500_emulate.c | 10 ++
arch/powerpc/kvm/e500_mmu.c
VCPU's MMUCFG register initialization should not depend on KVM_CAP_SW_TLB
ioctl call. Move it earlier into tlb initalization phase.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_mmu.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerp
On mfspr/mtspr emulation path Book3E's MMUCFG SPR with value 1015 clashes
with G4's MSSSR0 SPR. Move MSSSR0 emulation from generic part to Books3S.
MSSSR0 also clashes with Book3S's DABRX SPR. DABRX was not explicitly
handled so Book3S execution flow will behave as before.
Signe
Reflect the uapi folder change in SREGS API documentation.
Signed-off-by: Mihai Caraman
---
Documentation/virtual/kvm/api.txt |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/Documentation/virtual/kvm/api.txt
b/Documentation/virtual/kvm/api.txt
index a4df553..9cf591d
Implement ONE_REG interface for EPCR register adding KVM_REG_PPC_EPCR to
the list of ONE_REG PPC supported registers.
Signed-off-by: Mihai Caraman
---
Documentation/virtual/kvm/api.txt |1 +
arch/powerpc/include/asm/kvm.h|2 ++
arch/powerpc/kvm/booke.c | 16
Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.
Signed-off-by: Mihai Caraman
---
v1: use _t_ype instead of _t_arget _r_egister in tlbilx emulation.
arch/powerpc/include/asm/kvm_ppc.h | 11 +++
arch/powerpc/kvm/e500.h|6
Extend MAS2 EPN mask to retain most significant bits on 64-bit hosts.
Use this mask in tlb effective address accessor.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/mmu-book3e.h |2 +-
arch/powerpc/kvm/e500.h |2 +-
2 files changed, 2 insertions(+), 2 deletions
Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined only
for 64-bit and HV categories, we will expose it at this point only to 64-bit
virtual processors running on 64-bit HV hosts.
Define a reusable setter function for vcpu's EPCR.
Signed-off-by: Mihai Caraman
-
Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs for 64-bit
hosts.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index e6159f5..d396374
GET_VCPU define will not be implemented for 64-bit for performance reasons
so get rid of it also on 32-bit.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |7 ++-
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S
64-bit GCC 4.5.1 warns about an uninitialized variable which was guarded
by a flag. Initialize the variable to make it happy.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_tlb.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b
handlers version.
Signed-off-by: Mihai Caraman
---
v1: updated CRIT and TLB exception handling following core side changes.
arch/powerpc/include/asm/kvm_booke_hv_asm.h | 25 +
arch/powerpc/kvm/bookehv_interrupts.S | 138 +--
2 files changed, 155 insertions
When delivering guest IRQs, update MSR computation mode according to guest
interrupt computation mode found in EPCR.
Signed-off-by: Mihai Caraman
---
v1: added intermediate msr variable.
arch/powerpc/kvm/booke.c |9 -
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a
Mask high 32 bits of MAS2's effective page number in tlbwe emulation for guests
running in 32-bit mode.
Signed-off-by: Mihai Caraman
---
v1: patch splited.
arch/powerpc/kvm/e500_tlb.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b
Include header file for get_tb() declaration.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 3d1f35d..7c9c389 100644
--- a/arch/powerpc/kvm/booke.c
+++ b
ernel/git/stable/linux-stable.git
Mihai Caraman (12):
KVM: PPC: e500: Silence bogus GCC warning in tlb code
KVM: PPC: booke: Fix get_tb() compile error on 64-bit
KVM: PPC: bookehv: Remove GET_VCPU macro from exception handler
KVM: PPC64: bookehv: Add support for interrupt handling
KVM:
Mask high 32 bits of effective address in emulation layer for guests running
in 32-bit mode.
Signed-off-by: Mihai Caraman
---
v1: added BOOK3S implementation.
arch/powerpc/include/asm/kvm_ppc.h | 10 ++
1 files changed, 10 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc
to avoid conflicts with the calling contexts.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_booke_hv_asm.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_booke_hv_asm.h
b/arch/powerpc/include/asm/kvm_booke_hv_asm.h
index
Critical exception on 64-bit booke uses user-visible SPRG3 as scratch.
Restore VDSO information in SPRG3 on exception prolog.
Use a common sprg3 field in PACA for all powerpc64 architectures.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_book3s_asm.h |1 -
arch/powerpc
These patches add core support for KVM on 64-bit Book3E PowerPC, mainly
integrating the DO_KVM macro. KVM arch specific patches will follow shortly.
Mihai Caraman (6):
powerpc/booke64: fix machine check handler to use the right prolog
powerpc/booke64: use GSRR registers in Guest Doorbell
Guest Doorbell interrupts use guest save and restore registers. Add a new
Guest Doorbell exception type to accommodate GSRR0/1 SPRs usage in exception
prolog and fix the exception handler.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/exception-64e.h |1 +
arch/powerpc/include
Critical exception handler on 64-bit booke uses user-visible SPRG3 as scratch.
Restore VDSO information in SPRG3 on exception prolog.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/paca.h |3 +++
arch/powerpc/kernel/asm-offsets.c|1 +
arch/powerpc/kernel/exceptions
in SPRG3. Add EX_R13 to paca slots to free up
SPRG3 and change the critical exception epilog to use it.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/exception-64e.h |5 +++--
arch/powerpc/include/asm/reg.h |5 +++--
arch/powerpc/kernel/exceptions-64e.S | 17
Machine check exception handler was using a wrong prolog. Hypervisors like
KVM which are called early from the exception handler rely on the interrupt
source.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff
Hook DO_KVM macro into 64-bit booke for KVM integration. Extend interrupt
handlers' parameter list with interrupt vector numbers to accomodate the macro.
Only the bolted version of tlb miss handers is addressed now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |
.
For syscalls case this change does not add any performance penalty. For irq
soft-disabled case the change adds a store/load of conditional register value
to/from a paca slot. Paca slots fit in one 64-byte cache line so these
additional operations have little impact on performance.
Signed-off-by:
64-bit GCC 4.5.1 warns about an uninitialized variable which was guarded
by a flag. Initialize the variable to make it happy.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500_tlb.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b
tlbilxva emulation was using an u32 variable for guest effective address.
Replace it with gva_t type to handle 64-bit guests.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch
Extend MAS2 EPN mask for 64-bit hosts, to retain most significant bits.
Change get tlb eaddr to use this mask.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/mmu-book3e.h |2 +-
arch/powerpc/kvm/e500.h |2 +-
2 files changed, 2 insertions(+), 2 deletions
Mask high 32 bits of effective address in emulation layer, for guests running
in 32-bit mode.
MAS2's high-order 32 bits represents the upper 32 bits of the effective address
of the page. Mask it too for tlbwe instruction emulation.
Signed-off-by: Mihai Caraman
---
arch/powerp
Refactor exception prolog to allow save/restore register parameters. Add
addition none definition for exception prolog usage.
This is needed for exceptions like Guest Doorbell that use GSRRx regsiters
which do not map on exception type.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel
GET_VCPU define will not be implemented for 64-bit for performance reasons
so get rid of it also on 32-bit.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |7 ++-
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S
Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined
only for 64-bit and HV categories, so it shoud be available only on 64-bit
virtual processors. Undefine the support for 32-bit builds.
Define a reusable setter function for vcpu's EPCR.
Signed-off-by: Mihai Ca
When delivering guest IRQs, update MSR computaion mode according to guest
interrupt computation mode found in EPCR.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |8 +++-
1 files changed, 7 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc
git://repo.or.cz/qemu/agraf.git ppc-e5500
To use qemu run:
$ qemu-system-ppc64 -M mpc8544ds -cpu e5500 -nographic -kernel uImage \
-machine dt_compatible=fsl,,P5020DS
Mike
Mihai Caraman (17):
KVM: PPC64: booke: Set interrupt computation mode for 64-bit host
KVM: PPC64: booke: Add EPCR suppo
Include header file for get_tb() declaration.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index db05692..a427031 100644
--- a/arch/powerpc/kvm/booke.c
+++ b
64-bit host runs with lazy interrupt disabling, so local_irq_disable() does
not disable interrupts right away and does not protect against preemption
required by __kvmppc_vcpu_run(). Define a macro for 64-bit to use
hard_irq_disable().
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c
handlers is supported now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/kvm_booke_hv_asm.h | 12 +++-
arch/powerpc/kvm/bookehv_interrupts.S | 120 +--
2 files changed, 122 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm
olted version of tlb miss handers is addressed now.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S | 114 --
arch/powerpc/mm/tlb_low_64e.S| 14 +++-
2 files changed, 92 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/k
Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs
for 64-bit hosts.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/booke.c | 14 ++
1 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index f9fa260
SPRN_SPRG_GEN_SCRATCH (aka SPRG0) instead of
SPRN_SPRG_TLB_SCRATCH (aka SPRG6) and replace TLB with GEN PACA slots to
keep consitency.
For critical exception handler use SPRG3 instead of SPRG7.
Signed-off-by: Mihai Caraman
---
arch/powerpc/include/asm/exception-64e.h | 14 +++---
arch/powerpc/include
Machine check exception handler was using a wrong prolog. Hypervisors, like
KVM, which are called early from the exception handler rely on the interrupt
source.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kernel/exceptions-64e.S |2 +-
1 files changed, 1 insertions(+), 1 deletions
Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500.h |6 +++---
arch/powerpc/kvm/e500_emulate.c | 21 ++---
arch/powerpc/kvm/e500_tlb.c | 23
64-bit host needs to remain in 64-bit mode when an exception take place.
Set interrupt computaion mode in EPCR register.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/e500mc.c |5 -
1 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500mc.c b/arch
ESR register is required by Data Storage Interrupt handling code.
Add the specific flag to the interrupt handler.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm
mtspr/mfspr emulation prints an error message for unknown SPRs. The message
was badly formatted displaying the hex value without 0x prefix. Use decimal
representation in accordance with the manuals, though the Linux headers
annoyingly use hex.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm
Interrupt code used PPC_LL/PPC_STL macros to load/store some of u32 fields
which led to memory overflow on 64-bit. Use lwz/stw instead.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S | 16
1 files changed, 8 insertions(+), 8 deletions(-)
diff --git a
Guest r8 register is held in the scratch register and stored correctly,
so remove the instruction that clobbers it. Guest r13 was missing from vcpu,
store it there.
Signed-off-by: Mihai Caraman
---
arch/powerpc/kvm/bookehv_interrupts.S |2 +-
1 files changed, 1 insertions(+), 1 deletions
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