On Mon, 2013-11-04 at 07:56 +1100, Benjamin Herrenschmidt wrote:
> On Sun, 2013-11-03 at 16:30 +0200, Gleb Natapov wrote:
> > On Thu, Oct 31, 2013 at 10:18:19PM +0100, Alexander Graf wrote:
> > > From: Bharat Bhushan
> > >
> > > This way we can use same data type struct with KVM and
> > > also he
On Mon, 2013-10-28 at 15:52 +0530, Bharat Bhushan wrote:
> We need to search linux "pte" to get "pte" attributes for
> setting TLB in KVM.
> This patch defines a linux_pte_lookup() function for same.
>
> Signed-off-by: Bharat Bhushan
> ---
> v1->v2
> -- removed _PAGE_BUSY and _PAGE_PRESENT as su
On Fri, 2013-11-15 at 11:01 +0530, Bharat Bhushan wrote:
> @@ -440,9 +437,9 @@ static inline int kvmppc_e500_shadow_map(struct
> kvmppc_vcpu_e500 *vcpu_e500,
> }
>
> if (likely(!pfnmap)) {
> - unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
> + tsi
v_rm_mmu.c |8 +++--
> arch/powerpc/kvm/booke.c|1 +
> arch/powerpc/kvm/e500.h |8 +++--
> arch/powerpc/kvm/e500_mmu_host.c| 55 +++++++---
> 6 files changed, 64 insertions(+), 31 deletions(-)
Reviewed-by: Scott Wood wit
On Mon, 2013-11-18 at 16:09 -0500, Alexander Graf wrote:
> On 18.11.2013, at 03:34, “tiejun.chen” wrote:
>
> > On 10/23/2013 09:26 AM, Tiejun Chen wrote:
> >> We enter with interrupts disabled in hardware, but we need to
> >> call RECONCILE_IRQ_STATE anyway to ensure that the software state
> >>
On Tue, 2013-11-19 at 10:51 +0100, Alexander Graf wrote:
>
> Am 19.11.2013 um 00:49 schrieb Scott Wood :
>
> > On Mon, 2013-11-18 at 16:09 -0500, Alexander Graf wrote:
> >> On 18.11.2013, at 03:34, “tiejun.chen” wrote:
> >>
> >>> On 10/23/2013 09:2
ke.o] Error 1
make[1]: *** [arch/powerpc/kvm] Error 2
make[1]: *** Waiting for unfinished jobs
Signed-off-by: Scott Wood
Cc: Bharat Bhushan
---
Build tested only. Bharat, please test.
arch/powerpc/include/asm/switch_to.h | 2 +-
arch/powerpc/kernel/process.c| 32 --
; > cc1: warnings being treated as errors
> > arch/powerpc/kvm/booke.c: In function 'kvmppc_vcpu_run':
> > arch/powerpc/kvm/booke.c:760:1: error: the frame size of 1424 bytes is
> > larger
> > than 1024 bytes
> > make[2]: *** [arch/powerpc/kvm/booke.o] Er
On Tue, 2013-12-10 at 03:05 +0100, Alexander Graf wrote:
> On 09.12.2013, at 22:18, Scott Wood wrote:
>
> > On Mon, 2013-11-25 at 04:26 -0600, Bharat Bhushan wrote:
> >>
> >>> -Original Message-
> >>> From: Wood Scott-B07421
> >&g
On Sun, 2013-12-29 at 16:43 +0100, Alexander Graf wrote:
> On 11.07.2013, at 00:47, Scott Wood wrote:
> > diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
> > index ddfaf56..c13caa0 100644
> > --- a/arch/powerpc/kvm/book3s_pr.c
> > +++ b/a
Commit 7940876e1330671708186ac3386aa521ffb5c182 ("kvm: make local
functions static") broke KVM PPC builds due to removing (rather than
moving) the stub version of kvm_vcpu_eligible_for_directed_yield().
This patch reintroduces it.
Signed-off-by: Scott Wood
Cc: Stephen Hemminger
Cc:
caller do it. Also
move the IRQ enabling on heavyweight exit into
kvmppc_prepare_to_enter().
Signed-off-by: Scott Wood
---
v2:
- rebased
- removed redundant (on 64-bit) and possibly performance-affecting WARNs
- addressed cosmetic feedback
arch/powerpc/include/asm/kvm_ppc.h | 6 ++
arch
On Fri, 2014-01-24 at 15:39 -0800, Christoffer Dall wrote:
> The KVM API documentation is not clear about the semantics of the data
> field on the mmio struct on the kvm_run struct.
>
> This has become problematic when supporting ARM guests on big-endian
> host systems with guests of both endianne
On Sat, 2014-01-25 at 00:24 +, Peter Maydell wrote:
> On 24 January 2014 23:51, Scott Wood wrote:
> > On Fri, 2014-01-24 at 15:39 -0800, Christoffer Dall wrote:
> >> diff --git a/Documentation/virtual/kvm/api.txt
> >> b/Documentation/virtual/kvm/api.txt
> &g
On Fri, 2014-01-24 at 17:56 -0800, Christoffer Dall wrote:
> On Sat, Jan 25, 2014 at 12:24:08AM +, Peter Maydell wrote:
> > Finally, I think it's a bit confusing in that "as if the guest had
> > accessed memory" is assigning implicit semantics to memory
> > in the emulated system, when memory i
On Sat, 2014-01-25 at 03:15 +0100, Alexander Graf wrote:
> Ok, let's go through the combinations for a 32-bit write of 0x01020304 on PPC
> and what data[] looks like
>
> your proposal:
>
> BE guest, BE host: { 0x01, 0x02, 0x03, 0x04 }
> LE guest, BE host: { 0x04, 0x03, 0x02, 0x01 }
> BE gu
I guess we need to start looking at paravirt ticketlocks for PPC now...
-Scott
--- Begin Message ---
Ticket locks for ppc, version 2. Changes since v1:
* The atomically exchanged entity is always 32 bits.
* asm inline string variations thus removed.
* Carry the additional holder hint only #if def
roblems for other architectures or other PPC platforms.
>
> The patches are against the master branch of the kvm tree but should
> apply equally on Linus' current master branch.
>
> Scott, please ack.
>
> Paolo, I meant to get these out earlier, but a personal emerg
KVM guest, move VDSO to SPRG7 on book3e. Since neither SPRG4-7 nor
critical interrupts exist on book3s, SPRG3 is still used for VDSO
there.
Signed-off-by: Scott Wood
Cc: Mihai Caraman
Cc: Anton Blanchard
Cc: Paul Mackerras
Cc: kvm-ppc@vger.kernel.org
---
arch/powerpc/include/asm/exception-64e.h
tpath,
though -- the special level exception will handle that.
Signed-off-by: Scott Wood
Cc: Mihai Caraman
Cc: kvm-ppc@vger.kernel.org
---
arch/powerpc/include/asm/exception-64e.h| 10 ---
arch/powerpc/include/asm/kvm_booke_hv_asm.h | 8 --
arch/powerpc/kvm/bookehv_interrupts.S
On Thu, 2014-03-13 at 19:00 -0500, Scott Wood wrote:
> @@ -444,6 +451,9 @@ _GLOBAL(kvmppc_resume_host)
> PPC_STD(r8, VCPU_SHARED_SPRG6, r11)
> mfxer r3
> PPC_STD(r9, VCPU_SHARED_SPRG7, r11)
> +#ifdef CONFIG_64BIT
> + mtspr SPRN_SPRG_VDSO_WRITE, r3
>
tpath,
though -- the special level exception will handle that.
Signed-off-by: Scott Wood
Cc: Mihai Caraman
Cc: kvm-ppc@vger.kernel.org
---
v2: Removed accidental duplicate/misplaced write to SPRG_VDSO,
which had been in a previous version of patch 5/10.
arch/powerpc/include/asm/exception-64e.h
memslots() in real
> [PATCH 7/8] KVM: PPC: Book3S HV: Fix decrementer timeouts with
> [PATCH 8/8] KVM: PPC: Book3S HV: Save/restore host PMU registers that
Acked-by: Scott Wood
-Scott
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On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman wrote:
> diff --git a/arch/powerpc/kvm/book3s_paired_singles.c
> b/arch/powerpc/kvm/book3s_paired_singles.c
> index a59a25a..80c533e 100644
> --- a/arch/powerpc/kvm/book3s_paired_singles.c
> +++ b/arch/powerpc/kvm/book3s_paired_singles.c
> @@ -640,1
On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman wrote:
> Load external pid (lwepx) instruction faults (when called from
> KVM with guest context) needs to be handled by KVM. This implies
> additional code in DO_KVM macro to identify the source of the
> exception (which oiginate from KVM host rathe
On Mon, 2014-03-31 at 15:41 +0200, Alexander Graf wrote:
> On 03/26/2014 10:17 PM, Scott Wood wrote:
> > On Thu, 2014-02-20 at 18:30 +0200, Mihai Caraman wrote:
> >> + /*
> >> + * Another thread may rewrite the TLB entry in parallel, don't
> >> +
On Tue, 2014-04-01 at 07:47 +0200, Alexander Graf wrote:
>
> > Am 01.04.2014 um 01:03 schrieb Scott Wood :
> >
> >> On Mon, 2014-03-31 at 15:41 +0200, Alexander Graf wrote:
> >>> On 03/26/2014 10:17 PM, Scott Wood wrote:
> >>>> On
On Thu, Aug 21, 2008 at 09:21:39AM -0500, Kumar Gala wrote:
> Where is the other discussion? I'd like to understand what's going on
> here.. (especially since I added the wrtee[i] changes to kernel way
> back when).
Presumably, they want to be able to replace wrtee with a store to a
hyperviso
On Fri, Aug 22, 2008 at 09:56:16AM -0400, Jimi Xenidis wrote:
> Sorry, I have not really been following this, I assume you are
> replacing SPR accesses with load/stores that do not trap.
> I believe thats fine for reading any SPR, but not true for modifying
> some SPRs, particularly MSR.
> IMHO
On Mon, Oct 20, 2008 at 06:46:29PM +0200, Christian Ehrhardt wrote:
> Hi Scott,
> I just discussed with Hollis about shadow tlb management in the
> hypervisor and he mentioned that you already have a patch that lets the
> guest use more tlb entries than it would have on bare metal hardware and
>
On Tue, Oct 21, 2008 at 08:55:46AM -0500, Hollis Blanchard wrote:
> On Tue, 2008-10-21 at 08:27 -0500, Scott Wood wrote:
> > It's not a patch to KVM, it's something I've done on Freescale's
> > hypervisor (which isn't released yet).
>
> I think Christ
On Fri, 2 Jul 2010 20:47:44 +0200
Alexander Graf wrote:
>
> On 02.07.2010, at 19:59, Hollis Blanchard wrote:
>
> > [Resending...]
> >
> > Please reconcile this with
> > http://www.linux-kvm.org/page/PowerPC_Hypercall_ABI, which has been
> > discussed in the (admittedly closed) Power.org embedd
On Sun, 1 Aug 2010 22:21:37 +0200
Alexander Graf wrote:
>
> On 01.08.2010, at 16:02, Avi Kivity wrote:
>
> > Looks reasonable. Since it's fair to say I understand nothing about
> > powerpc, I'd like someone who does to review it and ack, please, with an
> > emphasis on the interfaces.
>
> S
On Tue, 17 Aug 2010 15:57:56 +0200
Alexander Graf wrote:
> There are some heuristics in the PPC power management code that try to find
> out if the particular hardware we're running on supports proper power
> management
> or just hangs the machine when going into nap mode.
>
> Since we know tha
This was preventing the guest from setting any bits in the
hardware MSR which aren't forced on, such as MSR[SPE].
Signed-off-by: Scott Wood
---
Saving/restoring of SPE registers appears to still be missing, though.
arch/powerpc/kvm/booke_interrupts.S |2 +-
1 files changed, 1 inser
It is not legal to call mutex_lock() with interrupts disabled.
This will assert with debug checks enabled.
If there's a real need to disable interrupts here, it could be done
after the mutex is acquired -- but I don't see why it's needed at all.
Signed-off-by: Scott Wood
---
a
The VCPU uninit calls some TLB functions, and the TLB uninit function
frees the memory used by them.
Signed-off-by: Scott Wood
---
arch/powerpc/kvm/e500.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index 71750f2
2 AM
> >> To: Wood Scott-B07421
> >> Cc: kvm-ppc@vger.kernel.org; Liu Yu-B13201
> >> Subject: Re: [PATCH] KVM: PPC: e500: Call kvm_vcpu_uninit()
> >> before kvmppc_e500_tlb_uninit().
> >>
> >>
> >> On 05.10.2010, at 21:22, Scott Wood
Fix an unresolved symbol with CONFIG_KVM_GUEST plus CONFIG_RELOCATABLE on
Book E.
Signed-off-by: Scott Wood
---
arch/powerpc/kernel/kvm.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
index 428d0e5..b06bdae 100644
On Tue, 9 Nov 2010 13:14:47 +0100
Alexander Graf wrote:
> On 09.11.2010, at 04:40, Liu Yu-B13201 wrote:
>
> > Software breakpoint is a instruction which should make guest exit.
> > We replace guest code with software breakpoint instruction so that we can
> > stop at anywhere we want.
> >
> > I
On Tue, 9 Nov 2010 18:14:31 +0100
Alexander Graf wrote:
> Now, if we can get away with not using an undefined instruction (be it sc 64
> or trap) I don't know. I'm not even sure we can get away with trap.
> Basically, WARN_ON should also trigger a trap, so you'd end up in gdb for
> that when h
On Tue, 9 Nov 2010 17:50:12 +0100
Alexander Graf wrote:
> > There are also some fun issues regarding MSR[DE] with E.HV --
> > there are two modes, either the guest can control it directly (and shut
> > down KVM's debug events) or the guest does not have access to debug
> > resources at all and gu
On Tue, 9 Nov 2010 19:26:25 +0100
Alexander Graf wrote:
>
> On 09.11.2010, at 19:17, Scott Wood wrote:
>
> > On Tue, 9 Nov 2010 18:14:31 +0100
> > Alexander Graf wrote:
> >
> >> Now, if we can get away with not using an undefined instruction (be it sc
&g
On Mon, 13 Dec 2010 10:45:30 +0200
Avi Kivity wrote:
> On 12/13/2010 10:42 AM, Alexander Graf wrote:
> > Yeah, let me rephrase my exact memory on this:
> >
> > If the HV just rewrites instructions in the guest, it behaves different
> > from real hw which is bad. It could potentially break checks
On Tue, 14 Dec 2010 00:54:38 +0100
Alexander Graf wrote:
> On 13.12.2010, at 20:03, Scott Wood wrote:
> > [1] Speaking of which, what happens when an interrupt is raised in the
> > middle of a paravirt critical section? KVM will hold off the
> > interrupt delivery if it s
On Tue, 14 Dec 2010 01:24:50 +0100
Alexander Graf wrote:
>
> On 14.12.2010, at 01:18, Scott Wood wrote:
>
> > Right, but I'm not talking about an interrupt that happens when the
> > virtual EE bit is zero. I'm talking about an interrupt that happens
> >
On Tue, 14 Dec 2010 18:48:18 +0100
Alexander Graf wrote:
> The critical section is to prevent us from overwriting the scratch
> registers, yeah. And I think you're right - I had a thinko last night.
>
> If we see that we should inject an interrupt, but we're inside of a
> critical section, we co
On Tue, 14 Dec 2010 10:40:57 +0200
Avi Kivity wrote:
> On 12/13/2010 09:03 PM, Scott Wood wrote:
> > >
> > > The interface is a lot simpler. The guest decides what to patch and
> > > where to jump. A "please patch me" flag needs a ton of documentation
On Tue, 14 Dec 2010 12:37:32 -0600
Scott Wood wrote:
> On Tue, 14 Dec 2010 18:48:18 +0100
> Alexander Graf wrote:
>
> > The critical section is to prevent us from overwriting the scratch
> > registers, yeah. And I think you're right - I had a thinko last night.
On Wed, 15 Dec 2010 00:00:08 +0100
Alexander Graf wrote:
>
> On 14.12.2010, at 21:04, Scott Wood wrote:
>
> > Well, the TLB path might not be so bad if it can reuse an existing
> > check for mapping the magic page in the first place -- but if an
> > interrupt happen
On Wed, 15 Dec 2010 00:29:40 +0100
Alexander Graf wrote:
> On 15.12.2010, at 00:17, Scott Wood wrote:
>
> > So that once KVM has an interrupt to deliver, and sees that critical is
> > engaged, it knows that the next magic page store will resolve things.
> > Either it is
On Fri, 7 Jan 2011 16:38:35 +0100
Jan Kiszka wrote:
> Am 07.01.2011 13:40, Alexander Graf wrote:
> >
> > On 07.01.2011, at 13:08, Liu Yu-B13201 wrote:
> >
> >>
> >> Hi all,
> >>
> >> When guest reboot, it's better to reset status by qemu, and then sync them
> >> back to kvm
> >> However as you
On Wed, 2 Feb 2011 22:33:41 +0100
Alexander Graf wrote:
>
> On 02.02.2011, at 21:33, Yoder Stuart-B08248 wrote:
>
> > Below is a proposal for a new API for PPC to allow KVM clients
> > to set MMU state in a vcpu.
> >
> > BookE processors have one or more software managed TLBs and
> > currently
On Thu, 3 Feb 2011 10:19:06 +0100
Alexander Graf wrote:
> On 02.02.2011, at 23:08, Scott Wood wrote:
> > On Wed, 2 Feb 2011 22:33:41 +0100
> > Alexander Graf wrote:
> >> This seems to fine-grained. I'd prefer a list of all TLB entries to be
> >>
On Mon, 7 Feb 2011 17:49:51 +0100
Alexander Graf wrote:
>
> On 07.02.2011, at 17:40, Yoder Stuart-B08248 wrote:
>
> > Suggested change to this would be to have Qemu set tlb_type as
> > an _input_ argument. If KVM supports it, that type gets used,
> > else an error is returned.This would
On Mon, 7 Feb 2011 16:43:02 +0100
Alexander Graf wrote:
> On 04.02.2011, at 23:33, Scott Wood wrote:
>
> > On Thu, 3 Feb 2011 10:19:06 +0100
> > Alexander Graf wrote:
> >
> >> Makes sense. So we basically need an ioctl that tells KVM the MMU type and
>
On Wed, 9 Feb 2011 18:21:40 +0100
Alexander Graf wrote:
>
> On 07.02.2011, at 21:15, Scott Wood wrote:
>
> > That's pretty much what the proposed API does -- except it uses a void
> > pointer instead of uint64_t *.
>
> Oh? Did I miss something there? T
On Thu, 3 Feb 2011 10:19:06 +0100
Alexander Graf wrote:
> Yeah, that one's tricky. Usually the way the memory resolver in qemu works is
> as follows:
>
> * kvm goes to qemu
> * qemu fetches all mmu and register data from kvm
> * qemu runs its mmu resolution function as if the target was emul
On Thu, 10 Feb 2011 12:45:38 +0100
Alexander Graf wrote:
> Ok, thinking about this a bit more. You're basically proposing a list of
> tlb set calls, with each array field identifying one tlb set call. What
> I was thinking of was a full TLB sync, so we could keep qemu's internal
> TLB representat
On Fri, 11 Feb 2011 02:41:35 +0100
Alexander Graf wrote:
> >> Maybe we should go with Avi's proposal after all and simply keep the full
> >> soft-mmu synced between kernel and user space? That way we only need a
> >> setup call at first, no copying in between and simply update the user
> >> sp
On Fri, 11 Feb 2011 22:07:11 +0100
Alexander Graf wrote:
>
> On 11.02.2011, at 21:53, Scott Wood wrote:
>
> > On Fri, 11 Feb 2011 02:41:35 +0100
> > Alexander Graf wrote:
> >
> >>>> Maybe we should go with Avi's proposal after all and simpl
On Sun, 13 Feb 2011 23:43:40 +0100
Alexander Graf wrote:
> > struct kvmppc_book3e_tlb_entry {
> > union {
> > __u64 mas8_1;
> > struct {
> > __u32 mas8;
> > __u32 mas1;
> > };
> > };
> > __u64 mas2;
> > un
On Mon, 14 Feb 2011 21:19:19 +0100
Alexander Graf wrote:
> There's no nack here :). The only thing that needs to change is the anonymous
> part, as that's a gnu extension. Just name the structs and unions and all is
> well.
Ah, I thought it was an aesthetic objection -- didn't realize it was a
On Tue, 15 Feb 2011 00:39:51 +0100
Alexander Graf wrote:
> On 14.02.2011, at 22:16, Scott Wood wrote:
>
> > On Mon, 14 Feb 2011 21:19:19 +0100
> > Alexander Graf wrote:
> >>>> The struct name should also have
> >>>> a version indicator -
Return the actual host SVR. On e500, qemu currently pretends in the device
tree to be an mpc8544 regardless of what the host is, but that's something
that ought to be changed.
Signed-off-by: Scott Wood
---
arch/powerpc/kvm/emulate.c |2 ++
1 files changed, 2 insertions(+), 0 dele
().
This patch moves SPEFSCR saving to flush_spe_to_thread(),
and cleans up the caller that needs to save SPEFSCR accordingly.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v2: added kvm-ppc (sorry for the resend)
Kumar, could you ack this to go via the KVM tree, since the KVM
SPE save
From: yu liu
This patch provide a lazy way to do SPE switch.
The SPE save/restore will be done only if it's needed.
Linux already switches SPEFSCR on context switch (non-lazily), so the
only remaining bit is to save it between qemu and the guest.
Signed-off-by: Liu Yu
Signed-off-by:
The exit type setting for mfspr/mtspr is moved from 44x to toplevel SPR
emulation. This enables it on e500, and makes sure that all SPRs
are covered.
Exit accounting for tlbwe and tlbsx is added to e500.
Signed-off-by: Stuart Yoder
Signed-off-by: Scott Wood
---
arch/powerpc/kvm/44x_emulate.c
From: Stuart Yoder
Convert to microseconds when displaying
(with fix from Bharat Bhushan ).
This reduces rounding error with large quantities of short exits.
Signed-off-by: Stuart Yoder
Signed-off-by: Scott Wood
---
arch/powerpc/kvm/timing.c | 30 +-
1 files
l MSR.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v2: added kvm-ppc... spelled right this time. :-P
arch/powerpc/include/asm/kvm_host.h |3 +++
arch/powerpc/kernel/asm-offsets.c |3 +++
arch/powerpc/kvm/booke.h| 17 +
arch/powerpc/kvm/booke_interru
From: yu liu
We need to save/restore SPE environment on e500 core.
Wrap __kvmppc_vcpu_run() so that we can put the SPE code in
e500.c.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v2: added kvm-ppc (sorry for the resend)
arch/powerpc/include/asm/kvm_ppc.h |1 +
arch/powerpc/kvm
On Tue, 29 Mar 2011 08:09:09 -0500
Jimi Xenidis wrote:
>
> On Mar 29, 2011, at 4:18 AM, Alexander Graf wrote:
>
> >
> > On 28.03.2011, at 21:15, Scott Wood wrote:
> >
> >> Return the actual host SVR. On e500, qemu currently pretends in the device
>
Return the actual host SVR for now, as we already do for PVR. Eventually
we may support Qemu overriding PVR/SVR if the situation is appropriate,
once we implement KVM_SET_SREGS on e500.
Signed-off-by: Scott Wood
---
v2: Move to e500 code, and use a backing variable, even though we don't
su
().
This patch moves SPEFSCR saving to flush_spe_to_thread(),
and cleans up the caller that needs to save SPEFSCR accordingly.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v3: no change
still waiting for Kumar's ack
arch/powerpc/kernel/head_fsl_booke.S |2 --
arch/powerpc/k
guest.
A vcpu field "msr_block" is introduced in order to be the subtractive
(and dynamic) equivalent of KVMPPC_MSR_MASK -- bits that are set in
msr_block are prevented from being set in the hardware MSR while in the
guest.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
Cha
On Wed, 30 Mar 2011 10:17:55 +0200
Alexander Graf wrote:
> On 30.03.2011, at 01:43, Scott Wood wrote:
>
> > + case BOOKE_INTERRUPT_SPE_UNAVAIL: {
> > + extern void kvmppc_vcpu_spe_load(struct kvm_vcpu *vcpu);
> > +
> > + /* reload the SPE en
context switch (non-lazily), so
the only remaining bit is to save it between qemu and the guest.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v4:
- use shadow_msr rather than msr_block
- restore guest SPE state only when shadow_msr[SPE] is set, not
when delivering an SPE exception to a
c_set_msr().
While we're modifying the guest entry code, reorder a few instructions
to bury some load latencies.
Signed-off-by: Scott Wood
---
v4 of patchset, first version of this patch
arch/powerpc/include/asm/kvm_host.h |2 +-
arch/powerpc/kernel/asm-offsets.c |2 +-
arch/power
This allows reuse for saving/restoring KVM SPE state.
Signed-off-by: Scott Wood
---
v4 of patchset, first version of this patch
Kumar, please ack (or comment).
arch/powerpc/include/asm/ppc_asm.h | 28
arch/powerpc/kernel/head_fsl_booke.S |6 +++---
2 files
On Thu, 31 Mar 2011 00:43:27 +0200
Alexander Graf wrote:
> > @@ -78,6 +79,43 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
> > }
> > }
> >
> > +#ifdef CONFIG_SPE
> > +static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
> > +{
> > + enable_kernel_spe();
> > + kvmppc_load_guest_spe
context switch (non-lazily), so
the only remaining bit is to save it between qemu and the guest.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v5: disable preemption when restoring SPE state
Saving SPE state is only done from a preempt notifier or vcpu_put(),
where preemption is already
On Thu, 31 Mar 2011 12:11:48 +0200
Alexander Graf wrote:
> >>> On 31.03.2011, at 05:21, Liu Yu-B13201 wrote:
> >>>
>
> I think the patch miss the bit to handle the case that
> if guest clear the MSR_SPE.
Doh.
> So that MSR[SPE] should always be traped.
On Thu, 31 Mar 2011 01:21:18 -0500
Kumar Gala wrote:
>
> On Mar 30, 2011, at 5:00 PM, Scott Wood wrote:
>
> > This allows reuse for saving/restoring KVM SPE state.
>
> Can you update commit comment to include a little about how we accomplish
> that. (something about
context switch (non-lazily), so
the only remaining bit is to save it between qemu and the guest.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v5: Clear shadow MSR[SPE] if guest clears MSR[SPE].
arch/powerpc/include/asm/kvm_host.h |6 ++
arch/powerpc/include/asm/reg_booke.h |1
On Thu, Mar 31, 2011 at 12:11:48PM +0200, Alexander Graf wrote:
> Scott, to verify that I don't completely screw up the lazy FPU work
> back when I did it, I wrote some small test program that would just
> initialize an fpu register with a value and then constantly loop to
> verify if it's still th
On Mon, 4 Apr 2011 17:01:31 +0200
Alexander Graf wrote:
> On 04/01/2011 09:17 PM, Scott Wood wrote:
> > diff --git a/arch/powerpc/kernel/asm-offsets.c
> > b/arch/powerpc/kernel/asm-offsets.c
> > index 5120a63..4d39f2d 100644
> > --- a/arch/powerpc/kernel/asm-offse
context switch (non-lazily), so
the only remaining bit is to save it between qemu and the guest.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
v6:
- guard asm-offset declarations with CONFIG_KVM
- pass VCPU_EVR directly to the 32EVRS macros
- Rest of patchset still v4
arch/powerpc
Signed-off-by: Scott Wood
---
Documentation/kvm/api.txt |6 +-
arch/powerpc/include/asm/kvm.h | 184 +++
arch/powerpc/include/asm/kvm_44x.h |1 -
arch/powerpc/include/asm/kvm_e500.h |1 +
arch/powerpc/include/asm/kvm_host.h |3
Linux doesn't use USPRG0 (now renamed VRSAVE in the architecture, even
when Altivec isn't involved), but a guest might.
Signed-off-by: Scott Wood
---
Sent to the right list this time...
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kernel/asm-offsets.c |1 +
ar
On Tue, 19 Apr 2011 00:43:51 +0200
Alexander Graf wrote:
> On 19.04.2011, at 00:31, Scott Wood wrote:
>
> > diff --git a/arch/powerpc/kvm/booke_interrupts.S
> > b/arch/powerpc/kvm/booke_interrupts.S
> > index 54c19d2..cde29c4 100644
> > --- a/arch/powerpc/kvm/boo
On Tue, 19 Apr 2011 01:19:39 +0200
Alexander Graf wrote:
> On 19.04.2011, at 00:31, Scott Wood wrote:
>
> > int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
> > struct kvm_sregs *sregs)
> > {
> > - return -ENOTSUPP;
>
Linux doesn't use USPRG0 (now renamed VRSAVE in the architecture, even
when Altivec isn't involved), but a guest might.
Signed-off-by: Scott Wood
---
v2: moved to vcpu load/put
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kernel/asm-offsets.c |1 +
arch/p
Signed-off-by: Scott Wood
---
v2: reject KVM_SET_SREGS that tries to change PVR, as requested
Documentation/kvm/api.txt |6 +-
arch/powerpc/include/asm/kvm.h | 184 +++
arch/powerpc/include/asm/kvm_44x.h |1 -
arch/powerpc/include/asm
().
This patch moves SPEFSCR saving to flush_spe_to_thread(),
and cleans up the caller that needs to save SPEFSCR accordingly.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
This is a resending of http://patchwork.ozlabs.org/patch/88677/
Kumar, please ack to go via kvm. This is holding up
Previously, these macros hardcoded THREAD_EVR0 as the base of the save
area, relative to the base register passed. This base offset is now
passed as a separate macro parameter, allowing reuse with other SPE
save areas, such as used by KVM.
Signed-off-by: Scott Wood
---
This is a resending of
c_set_msr().
While we're modifying the guest entry code, reorder a few instructions
to bury some load latencies.
Signed-off-by: Scott Wood
---
This is a resending of http://www.spinics.net/lists/kvm-ppc/msg02681.html
arch/powerpc/include/asm/kvm_host.h |2 +-
arch/powerpc/kernel/asm-offs
Since TLB1 loading doesn't check the shadow TLB before allocating another
entry, you can get duplicates.
Once shadow PIDs are enabled in a later patch, we won't need to
invalidate the TLB on every switch, so this optimization won't be
needed anyway.
Signed-off-by: Scott Wood
--
From: Liu Yu
Instead of a fully separate set of TLB entries, keep just the
pfn and dirty status.
Signed-off-by: Liu Yu
Signed-off-by: Scott Wood
---
arch/powerpc/include/asm/kvm_e500.h | 20 ++-
arch/powerpc/kvm/e500_tlb.c | 317 +++---
2 files changed
Only look in the 4 entries that could possibly contain the
entry we're looking for.
Signed-off-by: Scott Wood
---
arch/powerpc/kvm/e500_tlb.c | 18 ++
1 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_
This implements a shared-memory API for giving Qemu access to the guest's
TLB.
Signed-off-by: Scott Wood
---
Documentation/kvm/api.txt | 79 +++-
arch/powerpc/include/asm/kvm.h | 35 +++
arch/powerpc/include/asm/kvm_e500.h | 23 +-
arch/powerpc/include/asm/kvm_
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