Re: [PATCH v2 05/10] KVM: arm/arm64: vgic: Relax vgic_can_sample_irq for edge IRQs

On Wed, Jul 08, 2015 at 06:56:37PM +0100, Marc Zyngier wrote: > We only set the irq_queued flag for level interrupts, meaning > that "!vgic_irq_is_queued(vcpu, irq)" is a good enough predicate > for all interrupts. > > This will allow us to inject edge HW interrupts, for which the > state ACTIVE+P

Re: [PATCH v2 08/10] KVM: arm/arm64: vgic: Add vgic_{get,set}_phys_irq_active

On Wed, Jul 08, 2015 at 06:56:40PM +0100, Marc Zyngier wrote: > In order to control the active state of an interrupt, introduce > a pair of accessors allowing the state to be set/queried. > > This only affects the logical state, and the HW state will only be > applied at world-switch time. > > Si

Re: [PATCH v2 09/10] KVM: arm/arm64: timer: Allow the timer to control the active state

On Wed, Jul 08, 2015 at 06:56:41PM +0100, Marc Zyngier wrote: > In order to remove the crude hack where we sneak the masked bit > into the timer's control register, make use of the phys_irq_map > API control the active state of the interrupt. > > Signed-off-by: Marc Zyngier Reviewed-by: Christof

Re: [PATCH v2 03/10] KVM: arm/arm64: vgic: Convert struct vgic_lr to use bitfields

On Wed, Jul 08, 2015 at 06:56:35PM +0100, Marc Zyngier wrote: > As we're about to cram more information in the vgic_lr structure > (HW interrupt number and additional state information), we switch > to a layout similar to the HW's: > > - use bitfields to save space (we don't need more than 10 bits

Re: [PATCH v2 02/10] arm/arm64: KVM: Move vgic handling to a non-preemptible section

On Wed, Jul 08, 2015 at 06:56:34PM +0100, Marc Zyngier wrote: > As we're about to introduce some serious GIC-poking to the vgic code, > it is important to make sure that we're going to poke the part of > the GIC that belongs to the CPU we're about to run on (otherwise, > we'd end up with some unexp

Re: [PATCH v2 10/10] KVM: arm/arm64: vgic: Allow non-shared device HW interrupts

On Wed, Jul 08, 2015 at 06:56:42PM +0100, Marc Zyngier wrote: > So far, the only use of the HW interrupt facility is the timer, > implying that the active state is context-switched for each vcpu, > as the device is is shared across all vcpus. > > This does not work for a device that has been assig

Re: [PATCH v2 07/10] KVM: arm/arm64: vgic: Allow HW interrupts to be queued to a guest

On Wed, Jul 08, 2015 at 06:56:39PM +0100, Marc Zyngier wrote: > To allow a HW interrupt to be injected into a guest, we lookup the > guest virtual interrupt in the irq_phys_map rbtree, and if we have s/rbtree/list/ > a match, encode both interrupts in the LR. > > We also mark the interrupt as "a

Re: [PATCH v2 06/10] KVM: arm/arm64: vgic: Allow dynamic mapping of physical/virtual interrupts

On Wed, Jul 08, 2015 at 06:56:38PM +0100, Marc Zyngier wrote: > In order to be able to feed physical interrupts to a guest, we need > to be able to establish the virtual-physical mapping between the two > worlds. > > The mappings are kept in a set of RCU lists, indexed by virtual interrupts. > >

Re: [PATCH v2 04/10] KVM: arm/arm64: vgic: Allow HW irq to be encoded in LR

On Wed, Jul 08, 2015 at 06:56:36PM +0100, Marc Zyngier wrote: > Now that struct vgic_lr supports the LR_HW bit and carries a hwirq > field, we can encode that information into the list registers. > > This patch provides implementations for both GICv2 and GICv3. > > Signed-off-by: Marc Zyngier >

Re: [PATCH] arm64/kvm: Add generic v8 KVM target

> On Jul 17, 2015, at 3:19 AM, Marc Zyngier wrote: > > On 17/07/15 11:15, Christoffer Dall wrote: >> On Fri, Jul 17, 2015 at 10:56:39AM +0100, Marc Zyngier wrote: >>> On 17/07/15 10:33, Christoffer Dall wrote: On Fri, Jul 03, 2015 at 11:10:09AM +0100, Marc Zyngier wrote: > On 03/07/15 1

Re: [PATCH 11/12] avoid using predefined PAGE_SIZE

On 17/07/15 17:02, Andre Przywara wrote: > The musl-libc comes with a predefined PAGE_SIZE macro, which may be > wrong on systems which support multiple smallest page sizes. > Make sure we use our own (runtime evaluated) definition of PAGE_SIZE. > musl only provides PAGE_SIZE on archs where it is

Re: [PATCH v2 2/3] KVM: arm: Detect vGIC presence at runtime

On 14/07/15 13:06, Pavel Fedin wrote: > Allows to use KVM on hardware without vGIC. Interrupt controller has to be > emulated in userspace in this case. > > -ENODEV return code from probe function means there's no GIC at all. -ENXIO > happens when, for example, there is GIC node in the device tree

Re: [PATCH v2 0/3] KVM: arm/arm64: Allow to use KVM without in-kernel irqchip

On 14/07/15 13:06, Pavel Fedin wrote: > This patch set brings back functionality which was broken in v4.1. The > overall goal is to eventually enable using virtual timer too, but for now > changes affect only a possibility to run KVM itself. The guest currently > has to use another timer because th

Re: [PATCH 00/12] kvmtool: Improve portability

On Fri, Jul 17, 2015 at 05:02:06PM +0100, Andre Przywara wrote: > Hi, Hi Andre, > this is a collection of patches to bring kvmtool closer to standards > compliance (with standards not necessarily meaning GNU only). > With all those patches applied, you can compile kvmtool with newer > C standards

Re: [PATCH 07/12] util/util.c: avoid clang error on vsnprintf

On Fri, Jul 17, 2015 at 05:02:13PM +0100, Andre Przywara wrote: > clang by default doesn't seem to like printf calls with non-literal > format strings. > Add the proper pragma to disable this warning in the report function > to make kvmtool compile with clang. Despite its GCC name, clang also > acc

Re: [PATCH 06/12] kvm__set_dir(): avoid variable arguments call

On Fri, Jul 17, 2015 at 05:02:12PM +0100, Andre Przywara wrote: > The clang compiler by default dislikes non-literal format strings > in *printf functions, so it complains about kvm__set_dir() in kvm.c. > Instead of suppressing this warning, lets change the code to avoid > that unneeded var_args de

Re: [PATCH v2 1/3] KVM: arm: Fix NULL pointer dereference if KVM is used without in-kernel irqchip

On 14/07/15 13:06, Pavel Fedin wrote: > Makes qemu working again with kernel-irqchip=off option I'd appreciate a better commit log. Which patch broke it, why is that necessary. > > Signed-off-by: Pavel Fedin > --- > arch/arm/kvm/arm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >

[PATCH 11/12] avoid using predefined PAGE_SIZE

The musl-libc comes with a predefined PAGE_SIZE macro, which may be wrong on systems which support multiple smallest page sizes. Make sure we use our own (runtime evaluated) definition of PAGE_SIZE. Signed-off-by: Andre Przywara --- include/kvm/kvm.h | 4 1 file changed, 4 insertions(+) di

[PATCH 12/12] remove KVM_CAP_MAX_VCPUS hack

As we now have the header file in our repository, we can safely follow the recommendation in kvm.c and remove the hack adding the KVM_CAP_MAX_VCPUS macro. Signed-off-by: Andre Przywara --- kvm.c | 8 1 file changed, 8 deletions(-) diff --git a/kvm.c b/kvm.c index 5222e1e..53e5c6b 10064

[PATCH 04/12] Makefile: remove unneeded -s switch on compiling BIOS files

Stripping has no effect on object files, so having "-s -c" on the command line makes no sense. In fact clang complains about it and aborts with an error, so lets just remove the unneeded "-s" switch here. Signed-off-by: Andre Przywara --- Makefile | 10 +- 1 file changed, 5 insertions(+)

[PATCH 02/12] qcow: fix signedness bugs

Some functions in qcow.c return u64, but are checked against < 0 because they want to check for the -1 error return value. Do an explicit comparison against the casted -1 to express this properly. This was silently compiled out by gcc, but clang complained about it. Signed-off-by: Andre Przywara

[PATCH 09/12] use instead of

The manpage of poll(2) states that the prototype of poll is defined in . Use that header file instead of to allow compilation against musl-libc. Signed-off-by: Andre Przywara --- disk/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/disk/core.c b/disk/core.c index 309e

[PATCH 08/12] Fix call to connect()

According to the manpage and the prototype the second argument to connect(2) is a "const struct sockaddr*", so cast our protocol specific type back to the super type. This fixes compilation on musl-libc. Signed-off-by: Andre Przywara --- kvm-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deleti

[PATCH 01/12] avoid casts when initializing structures

Due to our kernel heritage we have code in kvmtool that relies on the (still) implicit -std=gnu89 compiler switch. It turns out that this just affects some structure initialization, where we currently provide a cast to the type, which upsets GCC for anything beyond -std=gnu89 (for instance gnu99 or

[PATCH 06/12] kvm__set_dir(): avoid variable arguments call

The clang compiler by default dislikes non-literal format strings in *printf functions, so it complains about kvm__set_dir() in kvm.c. Instead of suppressing this warning, lets change the code to avoid that unneeded var_args detour and use a literal format string. Signed-off-by: Andre Przywara --

[PATCH 03/12] kvm-ipc: use proper type for file descriptor

A socket (as any other file descriptor) is of type "int" to catch the negative error cases. Fix the declaration to allow errors to be detected. Found and needed by clang. Signed-off-by: Andre Przywara --- kvm-ipc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kvm-ipc.c b/k

[PATCH 07/12] util/util.c: avoid clang error on vsnprintf

clang by default doesn't seem to like printf calls with non-literal format strings. Add the proper pragma to disable this warning in the report function to make kvmtool compile with clang. Despite its GCC name, clang also accepts this. Signed-off-by: Andre Przywara --- util/util.c | 1 + 1 file

[PATCH 10/12] check for and use C library provided strlcpy and strlcat

The musl-libc library provides implementations of strlcpy and strlcat, so introduce a feature check for it and only use the kvmtool implementation if there is no library support for it. This avoids clashes with the public definition. Signed-off-by: Andre Przywara --- Makefile |

[PATCH 00/12] kvmtool: Improve portability

Hi, this is a collection of patches to bring kvmtool closer to standards compliance (with standards not necessarily meaning GNU only). With all those patches applied, you can compile kvmtool with newer C standards, with clang and against musl-libc. The first patch was already on the list, it allo

[PATCH 05/12] ui: remove pointless double const in keymap declarations

clang does not like two const specifiers in one declaration, so remove one to let clang compile kvmtool. Signed-off-by: Andre Przywara --- ui/gtk3.c | 2 +- ui/sdl.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/ui/gtk3.c b/ui/gtk3.c index b2335bc..1e08a8f 100644 --- a/

Re: [PATCH v2] target-arm: kvm: Differentiate registers based on write-back levels

On Fri, Jul 17, 2015 at 03:29:56PM +0100, Peter Maydell wrote: > On 16 July 2015 at 12:34, Christoffer Dall > wrote: > > Some registers like the CNTVCT register should only be written to the > > kernel as part of machine initialization or on vmload operations, but > > never during runtime, as thi

Re: [PATCH 18/18] KVM: ARM64: Add KVM_CAP_ARM_PMU and KVM_ARM_PMU_SET_IRQ

On Mon, Jul 06, 2015 at 10:17:48AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Add KVM_CAP_ARM_PMU for userspace to check whether KVM supports PMU. Add > KVM_ARM_PMU_SET_IRQ for userspace to set PMU IRQ number. > > Signed-off-by: Shannon Zhao > --- > arch/arm/kvm/arm.c

Re: [PATCH 17/18] KVM: ARM64: Add PMU overflow interrupt routing

On Mon, Jul 06, 2015 at 10:17:47AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > When calling perf_event_create_kernel_counter to create perf_event, > assign a overflow handler. Then when perf event overflows, if vcpu > doesn't run, call irq_work_queue to wake up vcpu. Otherwise

Re: [PATCH 16/18] KVM: ARM64: Add access handlers for PMEVCNTRn_EL0 and PMEVTYPERn_EL0 register

On Mon, Jul 06, 2015 at 10:17:46AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Add access handler which emulates writing and reading PMEVCNTRn_EL0 and > PMEVTYPERn_EL0. > > Signed-off-by: Shannon Zhao > --- > arch/arm64/kvm/sys_regs.c | 106 > +++

Re: [PATCH 15/18] KVM: ARM64: Add reset and access handlers for PMSWINC_EL0 register

On Mon, Jul 06, 2015 at 10:17:45AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Add access handler which emulates writing and reading PMSWINC_EL0 > register and add support for creating software increment event. > > Signed-off-by: Shannon Zhao > --- > arch/arm64/kvm/sys_regs.

Re: [PATCH 13/18] KVM: ARM64: Add reset and access handlers for PMOVSSET_EL0 and PMOVSCLR_EL0 register

On Mon, Jul 06, 2015 at 10:17:43AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMOVSSET_EL0 and PMOVSCLR_EL0 is UNKNOWN, use > reset_unknown for its reset handler. Add access handler which emulates > writing and reading PMOVSSET_EL0 or PMOVSCLR_EL0 regi

Re: [PATCH 14/18] KVM: ARM64: Add reset and access handlers for PMUSERENR_EL0 register

On Mon, Jul 06, 2015 at 10:17:44AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMUSERENR_EL0 is UNKNOWN, use reset_unknown for > its reset handler. Add access handler which emulates writing and reading > PMUSERENR_EL0 register. > > Signed-off-by: Shann

Re: [PATCH 13/18] KVM: ARM64: Add reset and access handlers for PMOVSSET_EL0 and PMOVSCLR_EL0 register

On Mon, Jul 06, 2015 at 10:17:43AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMOVSSET_EL0 and PMOVSCLR_EL0 is UNKNOWN, use > reset_unknown for its reset handler. Add access handler which emulates > writing and reading PMOVSSET_EL0 or PMOVSCLR_EL0 regi

Re: [PATCH 12/18] KVM: ARM64: Add reset and access handlers for PMINTENSET_EL1 and PMINTENCLR_EL1 register

On Mon, Jul 06, 2015 at 10:17:42AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMINTENSET_EL1 and PMINTENCLR_EL1 is UNKNOWN, > use reset_unknown for its reset handler. Add access handler which > emulates writing and reading PMINTENSET_EL1 or PMINTENCLR_

Re: [PATCH 11/18] KVM: ARM64: Add reset and access handlers for PMCNTENSET_EL0 and PMCNTENCLR_EL0 register

On Mon, Jul 06, 2015 at 10:17:41AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMCNTENSET_EL0 and PMCNTENCLR_EL0 is UNKNOWN, > use reset_unknown for its reset handler. Add access handler which > emulates writing and reading PMCNTENSET_EL0 or PMCNTENCLR_

Re: [PATCH 10/18] KVM: ARM64: Add reset and access handlers for PMCCNTR_EL0 register

On Mon, Jul 06, 2015 at 10:17:40AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMCCNTR_EL0 is UNKNOWN, use reset_unknown for > its reset handler. Add access handler which emulates writing and reading > PMCCNTR_EL0 register. > > Signed-off-by: Shannon Z

Re: [PATCH 09/18] KVM: ARM64: Add reset and access handlers for PMXEVCNTR_EL0 register

On Mon, Jul 06, 2015 at 10:17:39AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Since the reset value of PMXEVTYPER_EL0 is UNKNOWN, use reset_unknown > for its reset handler. Add access handler which emulates writing and > reading PMXEVTYPER_EL0 register. When reading PMXEVCNTR_

Re: [PATCH v2] target-arm: kvm: Differentiate registers based on write-back levels

On 16 July 2015 at 12:34, Christoffer Dall wrote: > Some registers like the CNTVCT register should only be written to the > kernel as part of machine initialization or on vmload operations, but > never during runtime, as this can potentially make time go backwards or > create inconsistent time obs

Re: [PATCH 07/18] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

On Mon, Jul 06, 2015 at 10:17:37AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > When we use tools like perf on host, perf passes the event type and the > id in this type category to kernel, then kernel will map them to event > number and write this number to PMU PMEVTYPER_EL0 re

Re: [PATCH 06/18] KVM: ARM64: Add reset and access handlers for PMCEID0_EL0 and PMCEID1_EL0 register

On Mon, Jul 06, 2015 at 10:17:36AM +0800, shannon.z...@linaro.org wrote: > From: Shannon Zhao > > Add reset handler which gets host value of PMCEID0_EL0 or PMCEID1_EL0. > Add access handler which emulates writing and reading PMCEID0_EL0 or > PMCEID1_EL0 register. > > Signed-off-by: Shannon Zhao

Re: [PATCH 02/18] KVM: ARM64: Add initial support for PMU

On Fri, Jul 17, 2015 at 07:34:58PM +0800, Shannon Zhao wrote: > > > On 2015/7/17 17:58, Christoffer Dall wrote: > >On Fri, Jul 17, 2015 at 04:13:35PM +0800, Shannon Zhao wrote: > >> > >> > >>On 2015/7/17 2:25, Christoffer Dall wrote: > >>>On Mon, Jul 06, 2015 at 10:17:32AM +0800, shannon.z...@lin

Re: [PATCH 03/18] KVM: ARM64: Add offset defines for PMU registers

On 2015/7/17 18:17, Christoffer Dall wrote: On Fri, Jul 17, 2015 at 04:25:06PM +0800, Shannon Zhao wrote: On 2015/7/17 2:45, Christoffer Dall wrote: On Mon, Jul 06, 2015 at 10:17:33AM +0800, shannon.z...@linaro.org wrote: From: Shannon Zhao We are about to trap and emulate acccesses to e

Re: [PATCH 02/18] KVM: ARM64: Add initial support for PMU

On 2015/7/17 17:58, Christoffer Dall wrote: On Fri, Jul 17, 2015 at 04:13:35PM +0800, Shannon Zhao wrote: On 2015/7/17 2:25, Christoffer Dall wrote: On Mon, Jul 06, 2015 at 10:17:32AM +0800, shannon.z...@linaro.org wrote: From: Shannon Zhao Here we plan to support virtual PMU for guest b

Re: [PATCH v4 0/2] arm/arm64: KVM: Optimize arm64 fp/simd, saves 30-50% on exits

On 16/07/15 22:29, Mario Smarduch wrote: > Currently we save/restore fp/simd on each exit. The first patch optimizes > arm64 > save/restore, we only do so on Guest access. hackbench and several lmbench > tests show anywhere from 30% to 50% of exits don't context switch the vfp/simd > registers. >

RE: [PATCH v2 3/7] KVM: irqchip: convey devid to kvm_set_msi

Hello! > >> > +} else if (!msi->flags) > >> > +return -EINVAL; > > Did you mean "if (msg->flags)" here (inverted condition)? > > Indeed, and also you need { } around the return for the QEMU coding > standard. It's kernel and not qemu :) Kind regards, Pavel Fedin Exper

Re: [PATCH 04/18] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register

On Fri, Jul 17, 2015 at 04:45:44PM +0800, Shannon Zhao wrote: > > > On 2015/7/17 3:55, Christoffer Dall wrote: > > On Mon, Jul 06, 2015 at 10:17:34AM +0800, shannon.z...@linaro.org wrote: > >> From: Shannon Zhao > >> > >> Add reset handler which gets host value of PMCR_EL0 and make writable > >>

Re: [PATCH] arm64/kvm: Add generic v8 KVM target

On 17/07/15 11:15, Christoffer Dall wrote: > On Fri, Jul 17, 2015 at 10:56:39AM +0100, Marc Zyngier wrote: >> On 17/07/15 10:33, Christoffer Dall wrote: >>> On Fri, Jul 03, 2015 at 11:10:09AM +0100, Marc Zyngier wrote: On 03/07/15 10:34, Peter Maydell wrote: > On 3 July 2015 at 09:28, Marc

Re: [PATCH 03/18] KVM: ARM64: Add offset defines for PMU registers

On Fri, Jul 17, 2015 at 04:25:06PM +0800, Shannon Zhao wrote: > > > On 2015/7/17 2:45, Christoffer Dall wrote: > > On Mon, Jul 06, 2015 at 10:17:33AM +0800, shannon.z...@linaro.org wrote: > >> From: Shannon Zhao > >> > >> We are about to trap and emulate acccesses to each PMU register > >> indiv

Re: [PATCH] arm64/kvm: Add generic v8 KVM target

On Fri, Jul 17, 2015 at 10:56:39AM +0100, Marc Zyngier wrote: > On 17/07/15 10:33, Christoffer Dall wrote: > > On Fri, Jul 03, 2015 at 11:10:09AM +0100, Marc Zyngier wrote: > >> On 03/07/15 10:34, Peter Maydell wrote: > >>> On 3 July 2015 at 09:28, Marc Zyngier wrote: > On 03/07/15 09:12, Pet

Re: [PATCH v2 3/7] KVM: irqchip: convey devid to kvm_set_msi

On 17/07/2015 09:27, Pavel Fedin wrote: >> > + } else if (!msi->flags) >> > + return -EINVAL; > Did you mean "if (msg->flags)" here (inverted condition)? Indeed, and also you need { } around the return for the QEMU coding standard. Paolo >> > + >> > + /* historically the route.type

Re: [PATCH 02/18] KVM: ARM64: Add initial support for PMU

On Fri, Jul 17, 2015 at 04:13:35PM +0800, Shannon Zhao wrote: > > > On 2015/7/17 2:25, Christoffer Dall wrote: > > On Mon, Jul 06, 2015 at 10:17:32AM +0800, shannon.z...@linaro.org wrote: > >> From: Shannon Zhao > >> > >> Here we plan to support virtual PMU for guest by full software > >> emulat

Re: [PATCH] arm64/kvm: Add generic v8 KVM target

On 17/07/15 10:33, Christoffer Dall wrote: > On Fri, Jul 03, 2015 at 11:10:09AM +0100, Marc Zyngier wrote: >> On 03/07/15 10:34, Peter Maydell wrote: >>> On 3 July 2015 at 09:28, Marc Zyngier wrote: On 03/07/15 09:12, Peter Maydell wrote: > I would still like to see the proponents of this

Re: [PATCH] arm64/kvm: Add generic v8 KVM target

On Fri, Jul 03, 2015 at 11:10:09AM +0100, Marc Zyngier wrote: > On 03/07/15 10:34, Peter Maydell wrote: > > On 3 July 2015 at 09:28, Marc Zyngier wrote: > >> On 03/07/15 09:12, Peter Maydell wrote: > >>> I would still like to see the proponents of this patch say > >>> what their model is for users

Re: [PATCH v4 0/2] arm/arm64: KVM: Optimize arm64 fp/simd, saves 30-50% on exits

On Thu, Jul 16, 2015 at 02:29:36PM -0700, Mario Smarduch wrote: > Currently we save/restore fp/simd on each exit. The first patch optimizes > arm64 > save/restore, we only do so on Guest access. hackbench and several lmbench > tests show anywhere from 30% to 50% of exits don't context switch the v

Re: [PATCH 04/18] KVM: ARM64: Add reset and access handlers for PMCR_EL0 register

On 2015/7/17 3:55, Christoffer Dall wrote: > On Mon, Jul 06, 2015 at 10:17:34AM +0800, shannon.z...@linaro.org wrote: >> From: Shannon Zhao >> >> Add reset handler which gets host value of PMCR_EL0 and make writable >> bits architecturally UNKNOWN. Add access handler which emulates >> writing an

Re: [PATCH 03/18] KVM: ARM64: Add offset defines for PMU registers

On 2015/7/17 2:45, Christoffer Dall wrote: > On Mon, Jul 06, 2015 at 10:17:33AM +0800, shannon.z...@linaro.org wrote: >> From: Shannon Zhao >> >> We are about to trap and emulate acccesses to each PMU register >> individually. This adds the context offsets for the AArch64 PMU >> registers and th

Re: [PATCH 02/18] KVM: ARM64: Add initial support for PMU

On 2015/7/17 2:25, Christoffer Dall wrote: > On Mon, Jul 06, 2015 at 10:17:32AM +0800, shannon.z...@linaro.org wrote: >> From: Shannon Zhao >> >> Here we plan to support virtual PMU for guest by full software >> emulation, so define some basic structs and functions preparing for >> futher steps.

RE: [PATCH v2 3/7] KVM: irqchip: convey devid to kvm_set_msi

> -Original Message- > From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf > Of Eric Auger > Sent: Thursday, July 09, 2015 11:22 AM > To: eric.au...@st.com; eric.au...@linaro.org; > linux-arm-ker...@lists.infradead.org; > marc.zyng...@arm.com; christoffer.d...@lin