Re: [PATCH 4/4] pre_init: add ARM implementations

2016-03-03 Thread Will Deacon
On Wed, Mar 02, 2016 at 11:38:34PM +, André Przywara wrote: > On 02/03/16 03:00, Will Deacon wrote: > > On Wed, Feb 24, 2016 at 03:33:08PM +, Andre Przywara wrote: > >> The pre_init stub consists of two syscalls mouting the host's FS > >> via 9pfs and then calling the actual init binary, wh

Re: [PATCH v2 2/6] KVM: arm/arm64: arch_timer: Rely on the arch timer to parse the firmware tables

2016-03-03 Thread Christoffer Dall
On Thu, Feb 11, 2016 at 03:33:20PM +, Julien Grall wrote: > The firmware table is currently parsed by the virt timer code in order > to retrieve the virtual interrupt. However, this is already done by the > arch timer driver and therefore make the parsing code duplicated twice. > > Introduce a

Re: [PATCH v2 16/17] arm64: KVM: vgic-v3: Only wipe LRs on vcpu exit

2016-03-03 Thread Christoffer Dall
On Wed, Feb 17, 2016 at 04:40:48PM +, Marc Zyngier wrote: > So far, we're always writing all possible LRs, setting the empty > ones with a zero value. This is obvious doing a low of work for > nothing, and we're better off clearing those we've actually > dirtied on the exit path (it is very rar

Re: [PATCH v2 17/17] arm64: KVM: vgic-v3: Do not save ICH_AP0Rn_EL2 for GICv2 emulation

2016-03-03 Thread Christoffer Dall
On Wed, Feb 17, 2016 at 04:40:49PM +, Marc Zyngier wrote: > The GICv3 specification mandates that ICH_AP0Rn_EL2 are set to > zero when running guests that use the memory mapped registers. > > This is fine, as we initialize all ICH_AP0Rn_EL2 registers to > zero, and restore them on entry. But i

Re: [PATCH v2 14/17] arm64: KVM: vgic-v3: Save maintenance interrupt state only if required

2016-03-03 Thread Christoffer Dall
On Wed, Feb 17, 2016 at 04:40:46PM +, Marc Zyngier wrote: > Next on our list of useless accesses is the maintenance interrupt > status registers (ICH_MISR_EL2, ICH_EISR_EL2). > > It is pointless to save them if we haven't asked for a maintenance > interrupt the first place, which can only happ

Re: [PATCH v2 15/17] arm64: KVM: vgic-v3: Do not save an LR known to be empty

2016-03-03 Thread Christoffer Dall
On Wed, Feb 17, 2016 at 04:40:47PM +, Marc Zyngier wrote: > On exit, any empty LR will be signaled in ICH_ELRSR_EL2. Which > means that we do not have to save it, and we can just clear > its state in the in-memory copy. > > Signed-off-by: Marc Zyngier > --- > arch/arm64/kvm/hyp/vgic-v3-sr.c

Re: [RFC v5 03/17] iommu: introduce a reserved iova cookie

2016-03-03 Thread Julien Grall
Hi Eric, On 01/03/16 18:27, Eric Auger wrote: diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 0e3b009..7b2bb94 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -1072,6 +1072,7 @@ static struct iommu_domain *__iommu_domain_alloc(struct bus_type *bus, do

Re: [PATCH v2 11/17] arm64: KVM: vgic-v2: Only wipe LRs on vcpu exit

2016-03-03 Thread Marc Zyngier
On 02/03/16 23:08, Christoffer Dall wrote: > On Wed, Feb 17, 2016 at 04:40:43PM +, Marc Zyngier wrote: >> So far, we're always writing all possible LRs, setting the empty >> ones with a zero value. This is obvious doing a low of work for > > s/low/lot/ > >> nothing, and we're better off clear

Re: Intermittent guest kernel crashes with v4.5-rc6.

2016-03-03 Thread Marc Zyngier
On 03/03/16 14:26, Shanker Donthineni wrote: > > > On 03/03/2016 08:03 AM, Marc Zyngier wrote: >> On 03/03/16 13:25, Shanker Donthineni wrote: >>> >>> On 03/02/2016 11:35 AM, Marc Zyngier wrote: On 02/03/16 15:48, Shanker Donthineni wrote: > We haven't started running heavy workload

Re: Intermittent guest kernel crashes with v4.5-rc6.

2016-03-03 Thread Shanker Donthineni
On 03/03/2016 08:03 AM, Marc Zyngier wrote: > On 03/03/16 13:25, Shanker Donthineni wrote: >> >> On 03/02/2016 11:35 AM, Marc Zyngier wrote: >>> On 02/03/16 15:48, Shanker Donthineni wrote: >>> We haven't started running heavy workloads in VMs. So far we have noticed this random nature

Re: Intermittent guest kernel crashes with v4.5-rc6.

2016-03-03 Thread Marc Zyngier
On 03/03/16 13:25, Shanker Donthineni wrote: > > > On 03/02/2016 11:35 AM, Marc Zyngier wrote: >> On 02/03/16 15:48, Shanker Donthineni wrote: >> >>> We haven't started running heavy workloads in VMs. So far we >>> have noticed this random nature behavior only during guest >>> kernel boot (at EL1

Re: Intermittent guest kernel crashes with v4.5-rc6.

2016-03-03 Thread Shanker Donthineni
On 03/02/2016 11:35 AM, Marc Zyngier wrote: > On 02/03/16 15:48, Shanker Donthineni wrote: > >> We haven't started running heavy workloads in VMs. So far we >> have noticed this random nature behavior only during guest >> kernel boot (at EL1). >> >> We didn't see this problem on 4.3 kernel. Do

Re: [PATCH 3/4] pre_init: add support for i386 also

2016-03-03 Thread Andre Przywara
Hi Will, On 02/03/16 02:57, Will Deacon wrote: > On Wed, Feb 24, 2016 at 03:33:07PM +, Andre Przywara wrote: >> Currently the pre_init support is provided only for x86_64. Since >> having 32-bit x86 supported as well is not far off, just add an >> implementation using i386 assembly instruction

Re: [PATCH v2 08/17] arm64: KVM: vgic-v2: Save maintenance interrupt state only if required

2016-03-03 Thread Marc Zyngier
On Thu, 3 Mar 2016 00:08:06 +0100 Christoffer Dall wrote: > On Wed, Feb 17, 2016 at 04:40:40PM +, Marc Zyngier wrote: > > Next on our list of useless accesses is the maintenance interrupt > > status registers (GICH_MISR, GICH_EISR{0,1}). > > > > It is pointless to save them if we haven't ask

Re: [PATCH v2 11/17] arm64: KVM: vgic-v2: Only wipe LRs on vcpu exit

2016-03-03 Thread Marc Zyngier
On Thu, 3 Mar 2016 00:08:19 +0100 Christoffer Dall wrote: > On Wed, Feb 17, 2016 at 04:40:43PM +, Marc Zyngier wrote: > > So far, we're always writing all possible LRs, setting the empty > > ones with a zero value. This is obvious doing a low of work for > > s/low/lot/ > > > nothing, and we