The changes for out-of-tree builds are here pretty much the same
as for the ARM Makefile.common.
Signed-off-by: Thomas Huth
---
powerpc/Makefile.common | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/powerpc/Makefile.common b/powerpc/Makefile.common
index e5
Hi Laszlo,
thanks.
On 2017/4/7 2:55, Laszlo Ersek wrote:
> On 04/06/17 14:35, gengdongjiu wrote:
>> Dear, Laszlo
>>Thanks for your detailed explanation.
>>
>> On 2017/3/29 19:58, Laszlo Ersek wrote:
>>> (This ought to be one of the longest address lists I've ever seen :)
>>> Thanks for the C
On Thu, Apr 06, 2017 at 06:31:59PM +0100, Marc Zyngier wrote:
> On 05/04/17 10:28, Christoffer Dall wrote:
> > This series is the second version of the rework of the patches to support
> > architected timers with a userspace irqchip sent by Alexander Graf [1].
> >
> > We first cleanup some of the
We still need to tell the compiler the correct search path for finding
headers and the like. This is slightly complicated by the "dynamic"
asm search path which is in our build tree but (may be) symlinked to
the right architectures headers.
Also we explicitly include SRCDIR for the linking scripts
I would of thought VPATH took care of this but apparently not.
Signed-off-by: Alex Bennée
---
Makefile | 8
arm/Makefile | 2 +-
arm/Makefile.arm | 2 +-
arm/Makefile.arm64 | 2 +-
powerpc/Makefile | 2 +-
powerpc/Makefile.ppc64 | 2 +-
x86/Makefi
Pass -C $(SRCDIR) to the git command that generates the build-head
stamp.
Signed-off-by: Alex Bennée
---
Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 16ce297..eba7b28 100644
--- a/Makefile
+++ b/Makefile
@@ -80,7 +80,7 @@ $(LIBFDT_archive
This is a first step to enabling out-of-tree builds for
kvm-unit-tests. When you invoke configure like this:
../tree.git/configure [args]
It will detect we the case and:
- link ../tree.git/Makefile to the build-dir
- ensure lib is created with a correct lib/asm
- set SRCDIR in the config
Setting the VPATH prompts make to search VPATH for source files. There
are still some fix-ups needed for linking and including other Makefile
fragments for each architecture.
Signed-off-by: Alex Bennée
---
Makefile | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Makefile b/Makefile
index
We still need to tell the compiler the correct search path for finding
headers and the like. This is slightly complicated by the "dynamic"
asm search path which is in our build tree but (may be) symlinked to
the right architectures headers.
Also we explicitly include SRCDIR for the linking scripts
When doing an out-of-src-tree build we still want access to the
various bits of common script machinery to run. This is handled by the
scripts-common list which sub-builds can add explicit extra stuff to.
The final rule is conditional so we don't attempt to link files when
we are doing an in-src-t
This is fairly direct way of ensuring the target build directories are
created before we build a binary blob. mkdir -p fails gracefully if
the directory is already there.
Signed-off-by: Alex Bennée
---
Makefile | 5 +
1 file changed, 5 insertions(+)
diff --git a/Makefile b/Makefile
index 78
Hi,
While I was working on MTTCG I did find it a pain to maintain 2 source
trees (one for 64bit and one for 32bit). After speaking to someone
about the changes they made to their tests to support out-of-tree
builds I thought it might be worth porting to kvm-unit-tests.
As it turns out there where
On Thu, Apr 06, 2017 at 06:12:10PM +0100, Marc Zyngier wrote:
> On 05/04/17 10:28, Christoffer Dall wrote:
> > From: Christoffer Dall
> >
> > When not using an in-kernel VGIC, but instead emulating an interrupt
> > controller in userspace, we should report the PMU overflow status to
> > that user
On 04/06/17 14:35, gengdongjiu wrote:
> Dear, Laszlo
>Thanks for your detailed explanation.
>
> On 2017/3/29 19:58, Laszlo Ersek wrote:
>> (This ought to be one of the longest address lists I've ever seen :)
>> Thanks for the CC. I'm glad Shannon is already on the CC list. For good
>> measure,
On 05/04/17 10:28, Christoffer Dall wrote:
> This series is the second version of the rework of the patches to support
> architected timers with a userspace irqchip sent by Alexander Graf [1].
>
> We first cleanup some of the timer code to make it easier to understand
> what is being done in the l
On 05/04/17 10:28, Christoffer Dall wrote:
> From: Christoffer Dall
>
> Now when we support both the virtual timer and PMU reporting interrupts
Now that... both timers...
> to userspace, we can advertise this support.
>
> Signed-off-by: Christoffer Dall
> ---
> arch/arm/kvm/arm.c | 7 +++
On 05/04/17 10:28, Christoffer Dall wrote:
> From: Christoffer Dall
>
> When not using an in-kernel VGIC, but instead emulating an interrupt
> controller in userspace, we should report the PMU overflow status to
> that userspace interrupt controller using the KVM_CAP_ARM_USER_IRQ
> feature.
>
>
Hi Rafael,
On Tue, Mar 28, 2017 at 01:30:30PM -0600, Tyler Baicar wrote:
> Tyler Baicar (9):
> acpi: apei: read ack upon ghes record consumption
> ras: acpi/apei: cper: generic error data entry v3 per ACPI 6.1
> efi: parse ARM processor error
> arm64: exception: handle Synchronous External
On 05/04/17 10:28, Christoffer Dall wrote:
> From: Alexander Graf
>
> If you're running with a userspace gic or other interrupt constroller
controller
> (that is no vgic in the kernel), then you have so far not been able to
> use the architected timers, because the output of the architected
> t
On Thu, Apr 06, 2017 at 04:37:51PM +0200, Christoffer Dall wrote:
> > FWIW, I first suggested using READ_ONCE() for the freshness argument,
>
> What is the 'freshness argument' ?
My own made-up lingo to state that each time the variable is accessed it
must be loaded anew, taken care of by the vol
Hi James,
thanks for the mail.
2017-04-06 17:25 GMT+08:00, James Morse :
> Hi gengdongjiu,
>
> On 05/04/17 00:05, gengdongjiu wrote:
>> thanks for the patch, have you consider to told Qemu or KVM tools
>> the reason for this bus error(SEA/SEI)?
>
> They should never need to know. We should treat
Hi Drew,
On Thu, Apr 06, 2017 at 02:02:12PM +0200, Andrew Jones wrote:
> On Wed, Apr 05, 2017 at 10:20:17PM +0200, Radim Krčmář wrote:
> > 2017-04-05 19:39+0200, Christoffer Dall:
> > > On Wed, Apr 05, 2017 at 03:10:50PM +0200, Radim Krčmář wrote:
> > >> 2017-04-04 18:41+0200, Andrew Jones:
> > >>
On Wed, Apr 05, 2017 at 10:46:07PM +0200, Radim Krčmář wrote:
> 2017-04-05 20:29+0200, Paolo Bonzini:
> > On 05/04/2017 19:45, Christoffer Dall wrote:
> But the problem is that kvm_make_all_cpus_request() only sends IPIs to
> CPUs where the mode was different from OUTSIDE_GUEST_MODE, so t
On Wed, Apr 05, 2017 at 08:29:12PM +0200, Paolo Bonzini wrote:
>
>
> On 05/04/2017 19:45, Christoffer Dall wrote:
> >>> But the problem is that kvm_make_all_cpus_request() only sends IPIs to
> >>> CPUs where the mode was different from OUTSIDE_GUEST_MODE, so there it's
> >>> about !OUTSIDE_GUEST_
On Wed, Apr 05, 2017 at 10:20:17PM +0200, Radim Krčmář wrote:
> 2017-04-05 19:39+0200, Christoffer Dall:
> > On Wed, Apr 05, 2017 at 03:10:50PM +0200, Radim Krčmář wrote:
> >> 2017-04-04 18:41+0200, Andrew Jones:
> >> > On Tue, Apr 04, 2017 at 05:30:14PM +0200, Christoffer Dall wrote:
> >> >> On Fr
On Wed, Apr 05, 2017 at 01:37:10PM +0200, Paolo Bonzini wrote:
>
>
> On 05/04/2017 09:09, Christoffer Dall wrote:
> >>> - In the explanation you wrote, you use the term 'we' a lot, but when
> >>>talking about SMP barriers, I think it only makes sense to talk about
> >>>actions and observ
Dear, Laszlo
Thanks for your detailed explanation.
On 2017/3/29 19:58, Laszlo Ersek wrote:
> (This ought to be one of the longest address lists I've ever seen :)
> Thanks for the CC. I'm glad Shannon is already on the CC list. For good
> measure, I'm adding MST and Igor.)
>
> On 03/29/17 12:36
2017-04-06 12:18+0200, Christian Borntraeger:
> On 03/31/2017 06:06 PM, Andrew Jones wrote:
>> Signed-off-by: Andrew Jones
>> +VCPU Requests and Guest Mode
>> +
>
> FWIW, s390 does not implement the guest mode. Maybe add some words that not
> all architectures implemen
On Thu, Apr 06, 2017 at 12:18:02PM +0200, Christian Borntraeger wrote:
> On 03/31/2017 06:06 PM, Andrew Jones wrote:
> > Signed-off-by: Andrew Jones
> > ---
> > Documentation/virtual/kvm/vcpu-requests.rst | 114
> >
> > 1 file changed, 114 insertions(+)
> > create m
On Wed, Apr 05, 2017 at 10:20:17PM +0200, Radim Krčmář wrote:
> 2017-04-05 19:39+0200, Christoffer Dall:
> > On Wed, Apr 05, 2017 at 03:10:50PM +0200, Radim Krčmář wrote:
> >> 2017-04-04 18:41+0200, Andrew Jones:
> >> > On Tue, Apr 04, 2017 at 05:30:14PM +0200, Christoffer Dall wrote:
> >> >> On Fr
On 03/31/2017 06:06 PM, Andrew Jones wrote:
> Signed-off-by: Andrew Jones
> ---
> Documentation/virtual/kvm/vcpu-requests.rst | 114
>
> 1 file changed, 114 insertions(+)
> create mode 100644 Documentation/virtual/kvm/vcpu-requests.rst
>
> diff --git a/Documentatio
Hi James,
Thanks for your comments.
On 2017/4/1 0:22, James Morse wrote:
> Hi Xie XiuQi,
>
> On 30/03/17 11:31, Xie XiuQi wrote:
>> On arm64 platform, SEI may interrupt code which had interrupts masked.
>> But SEI could be masked, so it's not treated as NMI, however SEA is
>> treated as NMI.
>>
Hi gengdongjiu,
On 05/04/17 00:05, gengdongjiu wrote:
> thanks for the patch, have you consider to told Qemu or KVM tools
> the reason for this bus error(SEA/SEI)?
They should never need to know. We should treat Qemu/kvmtool like any other
program. Programs should only need to know about the affe
Hi James,
Sorry for reply late, and thanks for your comments.
On 2017/4/1 0:20, James Morse wrote:
> Hi Xie XiuQi,
>
> On 30/03/17 11:31, Xie XiuQi wrote:
>> ARM APEI extension proposal added SEI (asynchronous SError interrupt)
>> notification type for ARMv8.
>>
>> Add a new GHES error source ha
Hi Steve,
Sorry for reply late.
On 2017/3/31 0:02, Steven Rostedt wrote:
> On Thu, 30 Mar 2017 18:31:01 +0800
> Xie XiuQi wrote:
>
>> Add a new trace event for ARM processor error information, so that
>> the user will know what error occurred. With this information the
>> user may take appropri
On 05.04.17 11:28, Christoffer Dall wrote:
This series is the second version of the rework of the patches to support
architected timers with a userspace irqchip sent by Alexander Graf [1].
We first cleanup some of the timer code to make it easier to understand
what is being done in the later p
On 06.04.17 10:25, Marc Zyngier wrote:
On 06/04/17 09:16, Alexander Graf wrote:
On 05.04.17 11:28, Christoffer Dall wrote:
From: Alexander Graf
@@ -559,6 +628,13 @@ int kvm_timer_enable(struct kvm_vcpu *vcpu)
if (timer->enabled)
return 0;
+ /* Without a V
On 06/04/17 09:16, Alexander Graf wrote:
>
>
> On 05.04.17 11:28, Christoffer Dall wrote:
>> From: Alexander Graf
>>
>> If you're running with a userspace gic or other interrupt constroller
>> (that is no vgic in the kernel), then you have so far not been able to
>> use the architected timers, b
On 05.04.17 11:28, Christoffer Dall wrote:
From: Alexander Graf
If you're running with a userspace gic or other interrupt constroller
(that is no vgic in the kernel), then you have so far not been able to
use the architected timers, because the output of the architected
timers, which are driv
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