On Thu, Jan 04, 2018 at 06:43:32PM +, Marc Zyngier wrote:
> As we're moving towards a much more dynamic way to compute our
> HYP VA, let's express the mask in a slightly different way.
>
> Instead of comparing the idmap position to the "low" VA mask,
> we directly compute the mask by taking
On Thu, Jan 04, 2018 at 06:43:33PM +, Marc Zyngier wrote:
> The main idea behind randomising the EL2 VA is that we usually have
> a few spare bits between the most significant bit of the VA mask
> and the most significant bit of the linear mapping.
>
> Those bits could be a bunch of zeroes,
On Thu, Jan 04, 2018 at 06:43:34PM +, Marc Zyngier wrote:
> Update the documentation to reflect the new tricks we play on the
> EL2 mappings...
>
> Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
> ---
>
On Thu, Jan 04, 2018 at 06:43:30PM +, Marc Zyngier wrote:
> Add an encoder for the EXTR instruction, which also implements the ROR
> variant (where Rn == Rm).
>
> Signed-off-by: Marc Zyngier
> ---
> arch/arm64/include/asm/insn.h | 6 ++
> arch/arm64/kernel/insn.c
On Thu, Jan 04, 2018 at 06:43:31PM +, Marc Zyngier wrote:
> The encoder for ADD/SUB (immediate) can only cope with 12bit
> immediates, while there is an encoding for a 12bit immediate shifted
> by 12 bits to the left.
>
> Let's fix this small oversight by allowing the LSL_12 bit to be set.
>
On Thu, Jan 04, 2018 at 06:43:28PM +, Marc Zyngier wrote:
> As we're about to change the way we map devices at HYP, we need
> to move away from kern_hyp_va on an IO address.
>
> One way of achieving this is to store the VAs in kvm_vgic_global_state,
> and use that directly from the HYP code.
On Thu, Jan 04, 2018 at 06:43:29PM +, Marc Zyngier wrote:
> We so far mapped our HYP IO (which is essencially the GICv2 control
> registers) using the same method as for memory. It recently appeared
> that is a bit unsafe:
>
> We compute the HYP VA using the kern_hyp_va helper, but that
On 18/01/18 13:08, Christoffer Dall wrote:
On Wed, Jan 17, 2018 at 05:52:21PM +, Julien Thierry wrote:
On 12/01/18 12:07, Christoffer Dall wrote:
We are about to defer saving and restoring some groups of system
registers to vcpu_put and vcpu_load on supported systems. This means
that
On Thu, Jan 18, 2018 at 03:18:21PM +0300, Yury Norov wrote:
> On Thu, Jan 18, 2018 at 12:16:32PM +0100, Christoffer Dall wrote:
> > Hi Yury,
> >
> > [cc'ing Alex Bennee who had some thoughts on this]
> >
> > On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote:
> > > On Fri, Jan 12, 2018
On Wed, Jan 17, 2018 at 06:22:29PM +, Julien Thierry wrote:
> Hi,
>
> On 12/01/18 12:07, Christoffer Dall wrote:
> >32-bit registers are not used by a 64-bit host kernel and can be
> >deferred, but we need to rework the accesses to this register to access
> >the latest value depending on
On Wed, Jan 17, 2018 at 05:52:21PM +, Julien Thierry wrote:
>
>
> On 12/01/18 12:07, Christoffer Dall wrote:
> >We are about to defer saving and restoring some groups of system
> >registers to vcpu_put and vcpu_load on supported systems. This means
> >that we need some infrastructure to
On Wed, Jan 17, 2018 at 02:44:32PM +, Julien Thierry wrote:
> Hi Christoffer,
>
> On 12/01/18 12:07, Christoffer Dall wrote:
> >We have numerous checks around that checks if the HCR_EL2 has the RW bit
> >set to figure out if we're running an AArch64 or AArch32 VM. In some
> >cases, directly
On Thu, Jan 18, 2018 at 12:16:32PM +0100, Christoffer Dall wrote:
> Hi Yury,
>
> [cc'ing Alex Bennee who had some thoughts on this]
>
> On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote:
> > On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christoffer Dall wrote:
> > > This series redesigns
On Thu, Jan 18, 2018 at 11:37:37AM +0100, Andrew Jones wrote:
> On Thu, Jan 18, 2018 at 01:09:58PM +0300, Yury Norov wrote:
> > On Wed, Jan 17, 2018 at 04:46:36PM -0500, Shih-Wei Li wrote:
> > > Here we provide the support for measuring various micro level
> > > operations on arm64. We iterate
Hi Yury,
[cc'ing Alex Bennee who had some thoughts on this]
On Mon, Jan 15, 2018 at 05:14:23PM +0300, Yury Norov wrote:
> On Fri, Jan 12, 2018 at 01:07:06PM +0100, Christoffer Dall wrote:
> > This series redesigns parts of KVM/ARM to optimize the performance on
> > VHE systems. The general
On Thu, Jan 18, 2018 at 01:09:58PM +0300, Yury Norov wrote:
> On Wed, Jan 17, 2018 at 04:46:36PM -0500, Shih-Wei Li wrote:
> > Here we provide the support for measuring various micro level
> > operations on arm64. We iterate each of the tests and output
> > their average, minimum and maximum cost
On Wed, Jan 17, 2018 at 04:46:36PM -0500, Shih-Wei Li wrote:
> Here we provide the support for measuring various micro level
> operations on arm64. We iterate each of the tests and output
> their average, minimum and maximum cost in microseconds.
> Instruction barriers were used before taking
On 12/01/18 12:07, Christoffer Dall wrote:
There is no need to enable/disable traps to FP registers on every switch
to/from the VM, because the host kernel does not use this resource
without calling vcpu_put. We can therefore move things around enough
that we still always write FPEXC32_EL2
On Wed, Jan 17, 2018 at 04:46:36PM -0500, Shih-Wei Li wrote:
> Here we provide the support for measuring various micro level
> operations on arm64. We iterate each of the tests and output
> their average, minimum and maximum cost in microseconds.
> Instruction barriers were used before taking
On Wed, Jan 17, 2018 at 04:46:34PM -0500, Shih-Wei Li wrote:
> The patch provides support for quantifying the cost of micro level
> operations on arm64 hardware. The supported operations include hypercall,
> mmio accesses, EOI virtual interrupt, and IPI send. Measurements are
> currently obtained
20 matches
Mail list logo