On Tue, Jan 23, 2018 at 01:48:43PM -0500, Shih-Wei Li wrote:
> On Mon, Jan 22, 2018 at 3:48 AM, Andrew Jones wrote:
> > On Fri, Jan 19, 2018 at 04:57:55PM -0500, Shih-Wei Li wrote:
> >> Thanks for the feedback about the mistakes in math and some issues in
> >> naming, print msg, and coding style.
Hi Dongjiu Geng,
On 06/01/18 16:02, Dongjiu Geng wrote:
> RAS Extension add a VSESR_EL2 register which can provide
> the syndrome value reported to software on taking a virtual
> SError interrupt exception. This patch supports to specify
> this Syndrome.
>
> In the RAS Extensions we can not set a
Hi Dongjiu Geng,
On 06/01/18 16:02, Dongjiu Geng wrote:
> The ARM64 RAS SError Interrupt(SEI) syndrome value is specific to the
> guest and user space needs a way to tell KVM this value. So we add a
> new ioctl. Before user space specifies the Exception Syndrome Register
> ESR(ESR), it firstly che
Hi gengdongjiu,
On 23/01/18 09:06, gengdongjiu wrote:
> On 2018/1/23 3:32, James Morse wrote:
>>> it seems this "CONFIG_ARM64_RAS_EXTN" is not enabled in the
>>> "arch/arm64/configs/defconfig",
>>> if not, I want to enable this config to enable RAS feature in the
>>> defconfig. do you agree?
>>
On Mon, Jan 22, 2018 at 3:48 AM, Andrew Jones wrote:
> On Fri, Jan 19, 2018 at 04:57:55PM -0500, Shih-Wei Li wrote:
>> Thanks for the feedback about the mistakes in math and some issues in
>> naming, print msg, and coding style. I'll be careful and try to avoid
>> the same problems the next patch
On Fri, Jan 12, 2018 at 01:07:32PM +0100, Christoffer Dall wrote:
> We are about to defer saving and restoring some groups of system
> registers to vcpu_put and vcpu_load on supported systems. This means
> that we need some infrastructure to access system registes which
> supports either accessing
The trailing semicolon is an empty statement that does no operation.
Removing it since it doesn't do anything.
Signed-off-by: Luis de Bethencourt
---
Hi,
After fixing the same thing in drivers/staging/rtl8723bs/, Joe Perches
suggested I fix it treewide [0].
Best regards
Luis
[0]
http://dri
On Mon, Jan 22, 2018 at 06:18:54PM +, James Morse wrote:
> Hi Christoffer,
>
> On 19/01/18 19:20, Christoffer Dall wrote:
> > On Mon, Jan 15, 2018 at 07:39:04PM +, James Morse wrote:
> >> We expect to have firmware-first handling of RAS SErrors, with errors
> >> notified via an APEI method
On Mon, Jan 22, 2018 at 06:19:06PM +, James Morse wrote:
> cpu_pm_enter() calls the pm notifier chain with CPU_PM_ENTER, then if
> there is a failure: CPU_PM_ENTER_FAILED.
>
> When KVM receives CPU_PM_ENTER it calls cpu_hyp_reset() which will
> return us to the hyp-stub. If we subsequently get
sorry fix a typo.
On 2018/1/23 17:23, gengdongjiu wrote:
>> There are problems with doing this:
>>
>> Oct. 18, 2017, 10:26 a.m. James Morse wrote:
>> | How do SEA and SEI interact?
>> |
>> | As far as I can see they can both interrupt each other, which isn't
>> something
>> | the single in_nmi()
Hi James,
On 2018/1/23 3:39, James Morse wrote:
> Hi Dongjiu Geng,
>
> (versions of patches 1,2 and 4 have been queued by Catalin)
>
> (Nit 'ACPI / APEI:' is the normal subject prefix for ghes.c, this helps the
> maintainers know which patches they need to pay attention to when you are
> touchin
Hi James,
On 2018/1/23 3:32, James Morse wrote:
>> it seems this "CONFIG_ARM64_RAS_EXTN" is not enabled in the
>> "arch/arm64/configs/defconfig",
>> if not, I want to enable this config to enable RAS feature in the defconfig.
>> do you agree?
> Sure. This series doesn't do a lot on its own, it e
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