On 01.02.2018 17:15, Yury Norov wrote:
On Thu, Feb 01, 2018 at 02:57:59PM +0100, Tomasz Nowicki wrote:
Hi Christoffer,
I created simple module for VM kernel. It is spinning on PSCI version
hypercall to measure the base exit cost as you suggested. Also, I measured
CPU cycles for each loop and he
On 01.02.2018 14:57, Tomasz Nowicki wrote:
Hi Christoffer,
I created simple module for VM kernel. It is spinning on PSCI version
hypercall to measure the base exit cost as you suggested. Also, I
measured CPU cycles for each loop and here are my results:
My setup:
1-socket ThunderX2 running V
On Thu, Feb 01, 2018 at 11:46:43AM +, Marc Zyngier wrote:
> As we're about to update the PSCI support, and because I'm lazy,
> let's move the PSCI include file to include/kvm so that both
> ARM architectures can find it.
>
Acked-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> ar
On Thu, Feb 01, 2018 at 11:46:44AM +, Marc Zyngier wrote:
> As we're about to trigger a PSCI version explosion, it doesn't
> hurt to introduce a PSCI_VERSION helper that is going to be
> used everywhere.
>
Reviewed-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> include/kvm/arm
On Thu, Feb 01, 2018 at 11:46:45AM +, Marc Zyngier wrote:
> Instead of open coding the accesses to the various registers,
> let's add explicit SMCCC accessors.
>
Reviewed-by: Christoffer Dall
> Signed-off-by: Marc Zyngier
> ---
> virt/kvm/arm/psci.c | 52 ++
On Thu, Feb 01, 2018 at 11:46:42AM +, Marc Zyngier wrote:
> When handling an SMC trap, the "preferred return address" is set
> to that of the SMC, and not the next PC (which is a departure from
> the behaviour of an SMC that isn't trapped).
>
> Increment PC in the handler, as the guest is othe
On Thu, Feb 01, 2018 at 11:46:46AM +, Marc Zyngier wrote:
> PSCI 1.0 can be trivially implemented by having PSCI 0.2 and
> the FEATURES call. Of, and returning 1.0 as the PSCI version.
Of? (Oh ?)
>
> We happily ignore everything else, as it is optional.
nit: Might be worth mentioning that
On 02/02/18 04:05, Hanjun Guo wrote:
> Hi Marc,
>
> Thank you for keeping me in the loop, just minor comments below.
>
> On 2018/2/1 19:46, Marc Zyngier wrote:
>> Now that we've standardised on SMCCC v1.1 to perform the branch
>> prediction invalidation, let's drop the previous band-aid.
>> If ve
In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")'
statement to allow compilation of a multi-CPU kernel for ARMv6
and older ARMv7-A that don't normally support access to the banked
registers.
This is considered to be a programming error by the gcc developers
and will no longer wo
On 02/02/18 15:07, Arnd Bergmann wrote:
In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")'
statement to allow compilation of a multi-CPU kernel for ARMv6
and older ARMv7-A that don't normally support access to the banked
registers.
This is considered to be a programming error b
On 02/02/18 15:55, Robin Murphy wrote:
On 02/02/18 15:07, Arnd Bergmann wrote:
In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")'
statement to allow compilation of a multi-CPU kernel for ARMv6
and older ARMv7-A that don't normally support access to the banked
registers.
This i
On Fri, Feb 2, 2018 at 5:23 PM, Robin Murphy wrote:
> On 02/02/18 15:55, Robin Murphy wrote:
>>
>> On 02/02/18 15:07, Arnd Bergmann wrote:
>>>
>>> In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")'
>>> statement to allow compilation of a multi-CPU kernel for ARMv6
>>> and older A
On 02/02/18 16:29, Arnd Bergmann wrote:
On Fri, Feb 2, 2018 at 5:23 PM, Robin Murphy wrote:
On 02/02/18 15:55, Robin Murphy wrote:
On 02/02/18 15:07, Arnd Bergmann wrote:
In banked-sr.c, we use a top-level '__asm__(".arch_extension virt")'
statement to allow compilation of a multi-CPU kerne
On Thu, Feb 01, 2018 at 11:46:47AM +, Marc Zyngier wrote:
> Although we've implemented PSCI 1.0 and 1.1, nothing can select them
> Since all the new PSCI versions are backward compatible, we decide to
> default to the latest version of the PSCI implementation. This is no
> different from doing
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